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ath9k: Enable TSF Out of Range Interrupt
This patch lays the groundwork for handling TSF Out of Range interrupt, which will be used for power save later on. Signed-off-by: Sujith <Sujith.Manoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -753,6 +753,9 @@ void ath_beacon_config(struct ath_softc *sc, int if_id)
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if (bs.bs_sleepduration > bs.bs_dtimperiod)
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bs.bs_sleepduration = bs.bs_dtimperiod;
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/* TSF out of range threshold fixed at 1 second */
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bs.bs_tsfoor_threshold = ATH9K_TSFOOR_THRESHOLD;
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DPRINTF(sc, ATH_DBG_BEACON,
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"tsf %llu "
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"tsf:tu %u "
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@ -2803,6 +2803,8 @@ bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked)
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mask2 |= ATH9K_INT_GTT;
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if (isr2 & AR_ISR_S2_CST)
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mask2 |= ATH9K_INT_CST;
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if (isr2 & AR_ISR_S2_TSFOOR)
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mask2 |= ATH9K_INT_TSFOOR;
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}
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isr = REG_READ(ah, AR_ISR_RAC);
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@ -2948,7 +2950,9 @@ enum ath9k_int ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints)
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if (ints & ATH9K_INT_DTIMSYNC)
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mask2 |= AR_IMR_S2_DTIMSYNC;
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if (ints & ATH9K_INT_CABEND)
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mask2 |= (AR_IMR_S2_CABEND);
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mask2 |= AR_IMR_S2_CABEND;
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if (ints & ATH9K_INT_TSFOOR)
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mask2 |= AR_IMR_S2_TSFOOR;
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}
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if (ints & (ATH9K_INT_GTT | ATH9K_INT_CST)) {
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@ -3118,6 +3122,8 @@ void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah,
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AR_TBTT_TIMER_EN | AR_TIM_TIMER_EN |
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AR_DTIM_TIMER_EN);
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/* TSF Out of Range Threshold */
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REG_WRITE(ah, AR_TSFOOR_THRESHOLD, bs->bs_tsfoor_threshold);
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}
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/*******************/
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@ -249,6 +249,7 @@ enum ath9k_int {
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ATH9K_INT_DTIMSYNC = 0x00800000,
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ATH9K_INT_GPIO = 0x01000000,
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ATH9K_INT_CABEND = 0x02000000,
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ATH9K_INT_TSFOOR = 0x04000000,
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ATH9K_INT_CST = 0x10000000,
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ATH9K_INT_GTT = 0x20000000,
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ATH9K_INT_FATAL = 0x40000000,
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@ -256,6 +257,7 @@ enum ath9k_int {
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ATH9K_INT_BMISC = ATH9K_INT_TIM |
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ATH9K_INT_DTIM |
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ATH9K_INT_DTIMSYNC |
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ATH9K_INT_TSFOOR |
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ATH9K_INT_CABEND,
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ATH9K_INT_COMMON = ATH9K_INT_RXNOFRM |
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ATH9K_INT_RXDESC |
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@ -385,6 +387,7 @@ struct ath9k_beacon_state {
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#define ATH9K_BEACON_PERIOD 0x0000ffff
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#define ATH9K_BEACON_ENA 0x00800000
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#define ATH9K_BEACON_RESET_TSF 0x01000000
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#define ATH9K_TSFOOR_THRESHOLD 0x00004240 /* 16k us */
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u32 bs_dtimperiod;
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u16 bs_cfpperiod;
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u16 bs_cfpmaxduration;
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@ -392,6 +395,7 @@ struct ath9k_beacon_state {
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u16 bs_timoffset;
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u16 bs_bmissthreshold;
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u32 bs_sleepduration;
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u32 bs_tsfoor_threshold;
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};
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struct chan_centers {
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@ -574,6 +574,10 @@ irqreturn_t ath_isr(int irq, void *dev)
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sc->sc_flags |= SC_OP_WAIT_FOR_BEACON;
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}
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}
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if (status & ATH9K_INT_TSFOOR) {
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/* FIXME: Handle this interrupt for power save */
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sched = true;
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}
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}
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} while (0);
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@ -2165,10 +2169,13 @@ static int ath9k_add_interface(struct ieee80211_hw *hw,
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* Enable MIB interrupts when there are hardware phy counters.
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* Note we only do this (at the moment) for station mode.
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*/
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if (ath9k_hw_phycounters(sc->sc_ah) &&
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((conf->type == NL80211_IFTYPE_STATION) ||
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(conf->type == NL80211_IFTYPE_ADHOC)))
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sc->imask |= ATH9K_INT_MIB;
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if ((conf->type == NL80211_IFTYPE_STATION) ||
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(conf->type == NL80211_IFTYPE_ADHOC)) {
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if (ath9k_hw_phycounters(sc->sc_ah))
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sc->imask |= ATH9K_INT_MIB;
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sc->imask |= ATH9K_INT_TSFOOR;
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}
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/*
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* Some hardware processes the TIM IE and fires an
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* interrupt when the TIM bit is set. For hardware
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@ -1385,8 +1385,8 @@ enum {
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#define AR_PHY_COUNTMAX (3 << 22)
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#define AR_MIBCNT_INTRMASK (3 << 22)
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#define AR_TSF_THRESHOLD 0x813c
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#define AR_TSF_THRESHOLD_VAL 0x0000FFFF
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#define AR_TSFOOR_THRESHOLD 0x813c
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#define AR_TSFOOR_THRESHOLD_VAL 0x0000FFFF
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#define AR_PHY_ERR_EIFS_MASK 8144
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