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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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dmaengine: sprd: Support DMA link-list mode
The Spreadtrum DMA can support the link-list transaction mode, which means DMA controller can do transaction one by one automatically once we linked these transaction by link-list register. Signed-off-by: Eric Long <eric.long@spreadtrum.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Eric Long
Vinod Koul
parent
5b394b2ddf
commit
4ac6954647
@ -68,6 +68,7 @@
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/* SPRD_DMA_CHN_CFG register definition */
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#define SPRD_DMA_CHN_EN BIT(0)
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#define SPRD_DMA_LINKLIST_EN BIT(4)
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#define SPRD_DMA_WAIT_BDONE_OFFSET 24
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#define SPRD_DMA_DONOT_WAIT_BDONE 1
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@ -103,7 +104,7 @@
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#define SPRD_DMA_REQ_MODE_MASK GENMASK(1, 0)
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#define SPRD_DMA_FIX_SEL_OFFSET 21
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#define SPRD_DMA_FIX_EN_OFFSET 20
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#define SPRD_DMA_LLIST_END_OFFSET 19
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#define SPRD_DMA_LLIST_END BIT(19)
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#define SPRD_DMA_FRG_LEN_MASK GENMASK(16, 0)
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/* SPRD_DMA_CHN_BLK_LEN register definition */
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@ -164,6 +165,7 @@ struct sprd_dma_desc {
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struct sprd_dma_chn {
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struct virt_dma_chan vc;
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void __iomem *chn_base;
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struct sprd_dma_linklist linklist;
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struct dma_slave_config slave_cfg;
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u32 chn_num;
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u32 dev_id;
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@ -582,7 +584,8 @@ static int sprd_dma_get_step(enum dma_slave_buswidth buswidth)
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}
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static int sprd_dma_fill_desc(struct dma_chan *chan,
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struct sprd_dma_desc *sdesc,
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struct sprd_dma_chn_hw *hw,
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unsigned int sglen, int sg_index,
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dma_addr_t src, dma_addr_t dst, u32 len,
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enum dma_transfer_direction dir,
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unsigned long flags,
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@ -590,7 +593,6 @@ static int sprd_dma_fill_desc(struct dma_chan *chan,
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{
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struct sprd_dma_dev *sdev = to_sprd_dma_dev(chan);
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struct sprd_dma_chn *schan = to_sprd_dma_chan(chan);
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struct sprd_dma_chn_hw *hw = &sdesc->chn_hw;
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u32 req_mode = (flags >> SPRD_DMA_REQ_SHIFT) & SPRD_DMA_REQ_MODE_MASK;
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u32 int_mode = flags & SPRD_DMA_INT_MASK;
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int src_datawidth, dst_datawidth, src_step, dst_step;
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@ -670,12 +672,52 @@ static int sprd_dma_fill_desc(struct dma_chan *chan,
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temp |= (src_step & SPRD_DMA_TRSF_STEP_MASK) << SPRD_DMA_SRC_TRSF_STEP_OFFSET;
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hw->trsf_step = temp;
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/* link-list configuration */
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if (schan->linklist.phy_addr) {
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if (sg_index == sglen - 1)
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hw->frg_len |= SPRD_DMA_LLIST_END;
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hw->cfg |= SPRD_DMA_LINKLIST_EN;
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/* link-list index */
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temp = (sg_index + 1) % sglen;
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/* Next link-list configuration's physical address offset */
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temp = temp * sizeof(*hw) + SPRD_DMA_CHN_SRC_ADDR;
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/*
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* Set the link-list pointer point to next link-list
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* configuration's physical address.
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*/
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hw->llist_ptr = schan->linklist.phy_addr + temp;
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} else {
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hw->llist_ptr = 0;
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}
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hw->frg_step = 0;
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hw->src_blk_step = 0;
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hw->des_blk_step = 0;
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return 0;
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}
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static int sprd_dma_fill_linklist_desc(struct dma_chan *chan,
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unsigned int sglen, int sg_index,
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dma_addr_t src, dma_addr_t dst, u32 len,
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enum dma_transfer_direction dir,
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unsigned long flags,
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struct dma_slave_config *slave_cfg)
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{
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struct sprd_dma_chn *schan = to_sprd_dma_chan(chan);
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struct sprd_dma_chn_hw *hw;
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if (!schan->linklist.virt_addr)
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return -EINVAL;
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hw = (struct sprd_dma_chn_hw *)(schan->linklist.virt_addr +
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sg_index * sizeof(*hw));
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return sprd_dma_fill_desc(chan, hw, sglen, sg_index, src, dst, len,
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dir, flags, slave_cfg);
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}
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static struct dma_async_tx_descriptor *
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sprd_dma_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
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size_t len, unsigned long flags)
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@ -744,10 +786,20 @@ sprd_dma_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
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u32 len = 0;
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int ret, i;
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/* TODO: now we only support one sg for each DMA configuration. */
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if (!is_slave_direction(dir) || sglen > 1)
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if (!is_slave_direction(dir))
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return NULL;
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if (context) {
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struct sprd_dma_linklist *ll_cfg =
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(struct sprd_dma_linklist *)context;
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schan->linklist.phy_addr = ll_cfg->phy_addr;
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schan->linklist.virt_addr = ll_cfg->virt_addr;
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} else {
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schan->linklist.phy_addr = 0;
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schan->linklist.virt_addr = 0;
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}
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sdesc = kzalloc(sizeof(*sdesc), GFP_NOWAIT);
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if (!sdesc)
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return NULL;
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@ -762,10 +814,25 @@ sprd_dma_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
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src = slave_cfg->src_addr;
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dst = sg_dma_address(sg);
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}
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/*
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* The link-list mode needs at least 2 link-list
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* configurations. If there is only one sg, it doesn't
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* need to fill the link-list configuration.
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*/
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if (sglen < 2)
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break;
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ret = sprd_dma_fill_linklist_desc(chan, sglen, i, src, dst, len,
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dir, flags, slave_cfg);
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if (ret) {
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kfree(sdesc);
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return NULL;
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}
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}
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ret = sprd_dma_fill_desc(chan, sdesc, src, dst, len, dir, flags,
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slave_cfg);
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ret = sprd_dma_fill_desc(chan, &sdesc->chn_hw, 0, 0, src, dst, len,
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dir, flags, slave_cfg);
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if (ret) {
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kfree(sdesc);
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return NULL;
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@ -58,4 +58,73 @@ enum sprd_dma_int_type {
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SPRD_DMA_CFGERR_INT,
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};
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/*
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* struct sprd_dma_linklist - DMA link-list address structure
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* @virt_addr: link-list virtual address to configure link-list node
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* @phy_addr: link-list physical address to link DMA transfer
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*
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* The Spreadtrum DMA controller supports the link-list mode, that means slaves
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* can supply several groups configurations (each configuration represents one
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* DMA transfer) saved in memory, and DMA controller will link these groups
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* configurations by writing the physical address of each configuration into the
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* link-list register.
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*
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* Just as shown below, the link-list pointer register will be pointed to the
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* physical address of 'configuration 1', and the 'configuration 1' link-list
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* pointer will be pointed to 'configuration 2', and so on.
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* Once trigger the DMA transfer, the DMA controller will load 'configuration
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* 1' to its registers automatically, after 'configuration 1' transaction is
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* done, DMA controller will load 'configuration 2' automatically, until all
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* DMA transactions are done.
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*
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* Note: The last link-list pointer should point to the physical address
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* of 'configuration 1', which can avoid DMA controller loads incorrect
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* configuration when the last configuration transaction is done.
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*
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* DMA controller linklist memory
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* ====================== -----------------------
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*| | | configuration 1 |<---
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*| DMA controller | ------->| | |
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*| | | | | |
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*| | | | | |
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*| | | | | |
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*| linklist pointer reg |---- ----| linklist pointer | |
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* ====================== | ----------------------- |
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* | |
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* | ----------------------- |
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* | | configuration 2 | |
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* --->| | |
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* | | |
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* | | |
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* | | |
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* ----| linklist pointer | |
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* | ----------------------- |
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* | |
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* | ----------------------- |
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* | | configuration 3 | |
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* --->| | |
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* | | |
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* | . | |
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* . |
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* . |
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* . |
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* | . |
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* | ----------------------- |
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* | | configuration n | |
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* --->| | |
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* | | |
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* | | |
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* | | |
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* | linklist pointer |----
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* -----------------------
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*
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* To support the link-list mode, DMA slaves should allocate one segment memory
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* from always-on IRAM or dma coherent memory to store these groups of DMA
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* configuration, and pass the virtual and physical address to DMA controller.
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*/
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struct sprd_dma_linklist {
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unsigned long virt_addr;
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phys_addr_t phy_addr;
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};
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#endif
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