mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-14 21:36:46 +07:00
ARM: dts: imx6q-icore-mipi: Use 1.5 version of i.Core MX6DL
The EDIMM STARTER KIT i.Core 1.5 MIPI Evaluation is based on
the 1.5 version of the i.Core MX6 cpu module. The 1.5 version
differs from the original one for a few details, including the
ethernet PHY interface clock provider.
With this commit, the ethernet interface works properly:
SMSC LAN8710/LAN8720 2188000.ethernet-1:00: attached PHY driver
While before using the 1.5 version, ethernet failed to startup
do to un-clocked PHY interface:
fec 2188000.ethernet eth0: could not attach to PHY
Similar fix has merged for i.Core MX6Q but missed to update for DL.
Fixes: a8039f2dd0
("ARM: dts: imx6dl: Add Engicam i.CoreM6 1.5 Quad/Dual MIPI starter kit support")
Cc: Jacopo Mondi <jacopo@jmondi.org>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
parent
106f7b3bf9
commit
4a132f6080
@ -8,7 +8,7 @@
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx6dl.dtsi"
|
||||
#include "imx6qdl-icore.dtsi"
|
||||
#include "imx6qdl-icore-1.5.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Engicam i.CoreM6 DualLite/Solo MIPI Starter Kit";
|
||||
|
Loading…
Reference in New Issue
Block a user