mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-22 23:40:25 +07:00
ARM: dts: aspeed: Make G4 clocks fixed
We do not yet have a clk driver upstream. So that users can boot the unmodified upstream kernel, add fixed-clock and clock-frequency properties to all of the clocks. The values are taken from the Palmetto system. This is the only upstream dts. It also happens to match all of the systems seen so far. Acked-by: Cédric Le Goater <clg@kaod.org> Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
This commit is contained in:
parent
8b9102da97
commit
491bdcfa8c
@ -18,15 +18,6 @@ cpu@0 {
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
clocks {
|
|
||||||
clk_clkin: clk_clkin {
|
|
||||||
#clock-cells = <0>;
|
|
||||||
compatible = "fixed-clock";
|
|
||||||
clock-frequency = <48000000>;
|
|
||||||
};
|
|
||||||
|
|
||||||
};
|
|
||||||
|
|
||||||
ahb {
|
ahb {
|
||||||
compatible = "simple-bus";
|
compatible = "simple-bus";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
@ -92,16 +83,48 @@ apb {
|
|||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
ranges;
|
ranges;
|
||||||
|
|
||||||
clk_hpll: clk_hpll@1e6e2070 {
|
|
||||||
#clock-cells = <0>;
|
|
||||||
compatible = "aspeed,g4-hpll-clock";
|
|
||||||
reg = <0x1e6e2070 0x4>;
|
|
||||||
clocks = <&clk_clkin>;
|
|
||||||
};
|
|
||||||
|
|
||||||
syscon: syscon@1e6e2000 {
|
syscon: syscon@1e6e2000 {
|
||||||
compatible = "aspeed,g4-scu", "syscon", "simple-mfd";
|
compatible = "aspeed,g4-scu", "syscon", "simple-mfd";
|
||||||
reg = <0x1e6e2000 0x1a8>;
|
reg = <0x1e6e2000 0x1a8>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
clk_clkin: clk_clkin {
|
||||||
|
#clock-cells = <0>;
|
||||||
|
compatible = "fixed-clock";
|
||||||
|
clock-frequency = <48000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
clk_hpll: clk_hpll@70 {
|
||||||
|
#clock-cells = <0>;
|
||||||
|
compatible = "aspeed,g4-hpll-clock", "fixed-clock";
|
||||||
|
reg = <0x70>;
|
||||||
|
clocks = <&clk_clkin>;
|
||||||
|
clock-frequency = <384000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
clk_ahb: clk_ahb@70 {
|
||||||
|
#clock-cells = <0>;
|
||||||
|
compatible = "aspeed,g4-ahb-clock", "fixed-clock";
|
||||||
|
reg = <0x70>;
|
||||||
|
clocks = <&clk_hpll>;
|
||||||
|
clock-frequency = <192000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
clk_apb: clk_apb@08 {
|
||||||
|
#clock-cells = <0>;
|
||||||
|
compatible = "aspeed,g4-apb-clock", "fixed-clock";
|
||||||
|
reg = <0x08>;
|
||||||
|
clocks = <&clk_hpll>;
|
||||||
|
clock-frequency = <48000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
clk_uart: clk_uart@2c{
|
||||||
|
#clock-cells = <0>;
|
||||||
|
compatible = "aspeed,g4-uart-clock", "fixed-clock";
|
||||||
|
reg = <0x2c>;
|
||||||
|
clock-frequency = <24000000>;
|
||||||
|
};
|
||||||
|
|
||||||
pinctrl: pinctrl {
|
pinctrl: pinctrl {
|
||||||
compatible = "aspeed,g4-pinctrl";
|
compatible = "aspeed,g4-pinctrl";
|
||||||
@ -849,19 +872,6 @@ pinctrl_wdtrst2_default: wdtrst2_default {
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
clk_apb: clk_apb@1e6e2008 {
|
|
||||||
#clock-cells = <0>;
|
|
||||||
compatible = "aspeed,g4-apb-clock";
|
|
||||||
reg = <0x1e6e2008 0x4>;
|
|
||||||
clocks = <&clk_hpll>;
|
|
||||||
};
|
|
||||||
|
|
||||||
clk_uart: clk_uart@1e6e2008 {
|
|
||||||
#clock-cells = <0>;
|
|
||||||
compatible = "aspeed,uart-clock";
|
|
||||||
reg = <0x1e6e202c 0x4>;
|
|
||||||
};
|
|
||||||
|
|
||||||
sram@1e720000 {
|
sram@1e720000 {
|
||||||
compatible = "mmio-sram";
|
compatible = "mmio-sram";
|
||||||
reg = <0x1e720000 0x8000>; // 32K
|
reg = <0x1e720000 0x8000>; // 32K
|
||||||
|
Loading…
Reference in New Issue
Block a user