Merge branch 'marvell_cleanup_for_v3.5' of git://git.infradead.org/users/jcooper/linux into next/cleanup

* 'marvell_cleanup_for_v3.5' of git://git.infradead.org/users/jcooper/linux:
  Dove: Fix Section mismatch warnings
  ARM: orion5x: ts78xx debugging changes
  ARM: orion5x: remove PM dependency from ts78xx
  ARM: orion5x: ts78xx fix NAND resource off by one
  ARM: orion5x: ts78xx whitespace cleanups
  Orion5x: Fix Section mismatch warnings
  Orion5x: Fix warning: struct pci_dev declared inside paramter list

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2012-05-15 16:54:15 +02:00
commit 48b9bf0953
8 changed files with 35 additions and 39 deletions

View File

@ -181,7 +181,7 @@ static int get_tclk(void)
return 166666667;
}
static void dove_timer_init(void)
static void __init dove_timer_init(void)
{
orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
IRQ_DOVE_BRIDGE, get_tclk());

View File

@ -56,7 +56,7 @@ static void dove_mpp_gpio_mode(int start, int end, int gpio_mode)
/* Dump all the extra MPP registers. The platform code will dump the
registers for pins 0-23. */
static void dove_mpp_dump_regs(void)
static void __init dove_mpp_dump_regs(void)
{
pr_debug("PMU_CTRL4_CTRL: %08x\n",
readl(DOVE_MPP_CTRL4_VIRT_BASE));
@ -67,7 +67,7 @@ static void dove_mpp_dump_regs(void)
pr_debug("MPP_GENERAL: %08x\n", readl(DOVE_MPP_GENERAL_VIRT_BASE));
}
static void dove_mpp_cfg_nfc(int sel)
static void __init dove_mpp_cfg_nfc(int sel)
{
u32 mpp_gen_cfg = readl(DOVE_MPP_GENERAL_VIRT_BASE);
@ -78,7 +78,7 @@ static void dove_mpp_cfg_nfc(int sel)
dove_mpp_gpio_mode(64, 71, GPIO_OUTPUT_OK);
}
static void dove_mpp_cfg_au1(int sel)
static void __init dove_mpp_cfg_au1(int sel)
{
u32 mpp_ctrl4 = readl(DOVE_MPP_CTRL4_VIRT_BASE);
u32 ssp_ctrl1 = readl(DOVE_SSP_CTRL_STATUS_1);
@ -118,7 +118,7 @@ static void dove_mpp_cfg_au1(int sel)
/* Configure the group registers, enabling GPIO if sel indicates the
pin is to be used for GPIO */
static void dove_mpp_conf_grp(unsigned int *mpp_grp_list)
static void __init dove_mpp_conf_grp(unsigned int *mpp_grp_list)
{
u32 mpp_ctrl4 = readl(DOVE_MPP_CTRL4_VIRT_BASE);
int gpio_mode;

View File

@ -86,7 +86,6 @@ config MACH_WRT350N_V2
config MACH_TS78XX
bool "Technologic Systems TS-78xx"
select PM
help
Say 'Y' here if you want your kernel to support the
Technologic Systems TS-78xx platform.

View File

@ -76,7 +76,7 @@ static int __init cpu_win_can_remap(const struct orion_addr_map_cfg *cfg,
/*
* Description of the windows needed by the platform code
*/
static struct __initdata orion_addr_map_cfg addr_map_cfg = {
static struct orion_addr_map_cfg addr_map_cfg __initdata = {
.num_wins = 8,
.cpu_win_can_remap = cpu_win_can_remap,
.bridge_virt_base = ORION5X_BRIDGE_VIRT_BASE,

View File

@ -205,7 +205,7 @@ int __init orion5x_find_tclk(void)
return 166666667;
}
static void orion5x_timer_init(void)
static void __init orion5x_timer_init(void)
{
orion5x_tclk = orion5x_find_tclk();

View File

@ -45,6 +45,7 @@ void orion5x_restart(char, const char *);
*/
struct pci_bus;
struct pci_sys_data;
struct pci_dev;
void orion5x_pcie_id(u32 *dev, u32 *rev);
void orion5x_pci_disable(void);

View File

@ -28,9 +28,9 @@ struct fpga_device {
struct fpga_devices {
/* Technologic Systems */
struct fpga_device ts_rtc;
struct fpga_device ts_nand;
struct fpga_device ts_rng;
struct fpga_device ts_rtc;
struct fpga_device ts_nand;
struct fpga_device ts_rng;
};
struct ts78xx_fpga_data {

View File

@ -8,6 +8,8 @@
* warranty of any kind, whether express or implied.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/sysfs.h>
@ -115,7 +117,7 @@ static struct platform_device ts78xx_ts_rtc_device = {
* I've used the method TS use in their rtc7800.c example for the detection
*
* TODO: track down a guinea pig without an RTC to see if we can work out a
* better RTC detection routine
* better RTC detection routine
*/
static int ts78xx_ts_rtc_load(void)
{
@ -141,10 +143,14 @@ static int ts78xx_ts_rtc_load(void)
} else
rc = platform_device_add(&ts78xx_ts_rtc_device);
if (rc)
pr_info("RTC could not be registered: %d\n",
rc);
return rc;
}
}
pr_info("RTC not found\n");
return -ENODEV;
};
@ -292,11 +298,8 @@ static struct platform_nand_data ts78xx_ts_nand_data = {
},
};
static struct resource ts78xx_ts_nand_resources = {
.start = TS_NAND_DATA,
.end = TS_NAND_DATA + 4,
.flags = IORESOURCE_MEM,
};
static struct resource ts78xx_ts_nand_resources
= DEFINE_RES_MEM(TS_NAND_DATA, 4);
static struct platform_device ts78xx_ts_nand_device = {
.name = "gen_nand",
@ -319,6 +322,8 @@ static int ts78xx_ts_nand_load(void)
} else
rc = platform_device_add(&ts78xx_ts_nand_device);
if (rc)
pr_info("NAND could not be registered: %d\n", rc);
return rc;
};
@ -332,11 +337,8 @@ static void ts78xx_ts_nand_unload(void)
****************************************************************************/
#define TS_RNG_DATA (TS78XX_FPGA_REGS_PHYS_BASE | 0x044)
static struct resource ts78xx_ts_rng_resource = {
.flags = IORESOURCE_MEM,
.start = TS_RNG_DATA,
.end = TS_RNG_DATA + 4 - 1,
};
static struct resource ts78xx_ts_rng_resource
= DEFINE_RES_MEM(TS_RNG_DATA, 4);
static struct timeriomem_rng_data ts78xx_ts_rng_data = {
.period = 1000000, /* one second */
@ -363,6 +365,8 @@ static int ts78xx_ts_rng_load(void)
} else
rc = platform_device_add(&ts78xx_ts_rng_device);
if (rc)
pr_info("RNG could not be registered: %d\n", rc);
return rc;
};
@ -402,7 +406,7 @@ static void ts78xx_fpga_supports(void)
/* enable devices if magic matches */
switch ((ts78xx_fpga.id >> 8) & 0xffffff) {
case TS7800_FPGA_MAGIC:
pr_warning("TS-7800 FPGA: unrecognized revision 0x%.2x\n",
pr_warning("unrecognised FPGA revision 0x%.2x\n",
ts78xx_fpga.id & 0xff);
ts78xx_fpga.supports.ts_rtc.present = 1;
ts78xx_fpga.supports.ts_nand.present = 1;
@ -422,26 +426,20 @@ static int ts78xx_fpga_load_devices(void)
if (ts78xx_fpga.supports.ts_rtc.present == 1) {
tmp = ts78xx_ts_rtc_load();
if (tmp) {
pr_info("TS-78xx: RTC not registered\n");
if (tmp)
ts78xx_fpga.supports.ts_rtc.present = 0;
}
ret |= tmp;
}
if (ts78xx_fpga.supports.ts_nand.present == 1) {
tmp = ts78xx_ts_nand_load();
if (tmp) {
pr_info("TS-78xx: NAND not registered\n");
if (tmp)
ts78xx_fpga.supports.ts_nand.present = 0;
}
ret |= tmp;
}
if (ts78xx_fpga.supports.ts_rng.present == 1) {
tmp = ts78xx_ts_rng_load();
if (tmp) {
pr_info("TS-78xx: RNG not registered\n");
if (tmp)
ts78xx_fpga.supports.ts_rng.present = 0;
}
ret |= tmp;
}
@ -466,7 +464,7 @@ static int ts78xx_fpga_load(void)
{
ts78xx_fpga.id = readl(TS78XX_FPGA_REGS_VIRT_BASE);
pr_info("TS-78xx FPGA: magic=0x%.6x, rev=0x%.2x\n",
pr_info("FPGA magic=0x%.6x, rev=0x%.2x\n",
(ts78xx_fpga.id >> 8) & 0xffffff,
ts78xx_fpga.id & 0xff);
@ -494,7 +492,7 @@ static int ts78xx_fpga_unload(void)
* UrJTAG SVN since r1381 can be used to reprogram the FPGA
*/
if (ts78xx_fpga.id != fpga_id) {
pr_err("TS-78xx FPGA: magic/rev mismatch\n"
pr_err("FPGA magic/rev mismatch\n"
"TS-78xx FPGA: was 0x%.6x/%.2x but now 0x%.6x/%.2x\n",
(ts78xx_fpga.id >> 8) & 0xffffff, ts78xx_fpga.id & 0xff,
(fpga_id >> 8) & 0xffffff, fpga_id & 0xff);
@ -525,7 +523,7 @@ static ssize_t ts78xx_fpga_store(struct kobject *kobj,
int value, ret;
if (ts78xx_fpga.state < 0) {
pr_err("TS-78xx FPGA: borked, you must powercycle asap\n");
pr_err("FPGA borked, you must powercycle ASAP\n");
return -EBUSY;
}
@ -533,10 +531,8 @@ static ssize_t ts78xx_fpga_store(struct kobject *kobj,
value = 1;
else if (strncmp(buf, "offline", sizeof("offline") - 1) == 0)
value = 0;
else {
pr_err("ts78xx_fpga_store: Invalid value\n");
else
return -EINVAL;
}
if (ts78xx_fpga.state == value)
return n;
@ -614,7 +610,7 @@ static void __init ts78xx_init(void)
/* FPGA init */
ts78xx_fpga_devices_zero_init();
ret = ts78xx_fpga_load();
ret = sysfs_create_file(power_kobj, &ts78xx_fpga_attr.attr);
ret = sysfs_create_file(firmware_kobj, &ts78xx_fpga_attr.attr);
if (ret)
pr_err("sysfs_create_file failed: %d\n", ret);
}