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e1000e: fix spelling errors in comments
Fix some spelling errors and inconsistencies in comment blocks. Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
Auke Kok
Jeff Garzik
parent
de92d84ec2
commit
489815ce22
@ -438,7 +438,7 @@ static void e1000_release_nvm_82571(struct e1000_hw *hw)
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* For non-82573 silicon, write data to EEPROM at offset using SPI interface.
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*
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* If e1000e_update_nvm_checksum is not called after this function, the
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* EEPROM will most likley contain an invalid checksum.
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* EEPROM will most likely contain an invalid checksum.
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**/
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static s32 e1000_write_nvm_82571(struct e1000_hw *hw, u16 offset, u16 words,
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u16 *data)
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@ -547,7 +547,7 @@ static s32 e1000_validate_nvm_checksum_82571(struct e1000_hw *hw)
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* poll for completion.
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*
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* If e1000e_update_nvm_checksum is not called after this function, the
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* EEPROM will most likley contain an invalid checksum.
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* EEPROM will most likely contain an invalid checksum.
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**/
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static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,
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u16 words, u16 *data)
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@ -1053,7 +1053,7 @@ static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw)
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/* If SerDes loopback mode is entered, there is no form
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* of reset to take the adapter out of that mode. So we
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* have to explicitly take the adapter out of loopback
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* mode. This prevents drivers from twidling their thumbs
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* mode. This prevents drivers from twiddling their thumbs
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* if another tool failed to take it out of loopback mode.
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*/
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ew32(SCTL,
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@ -1098,7 +1098,7 @@ static s32 e1000_valid_led_default_82571(struct e1000_hw *hw, u16 *data)
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* e1000e_get_laa_state_82571 - Get locally administered address state
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* @hw: pointer to the HW structure
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*
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* Retrieve and return the current locally administed address state.
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* Retrieve and return the current locally administered address state.
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**/
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bool e1000e_get_laa_state_82571(struct e1000_hw *hw)
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{
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@ -1113,7 +1113,7 @@ bool e1000e_get_laa_state_82571(struct e1000_hw *hw)
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* @hw: pointer to the HW structure
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* @state: enable/disable locally administered address
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*
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* Enable/Disable the current locally administed address state.
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* Enable/Disable the current locally administers address state.
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**/
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void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state)
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{
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@ -66,7 +66,7 @@
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#define E1000_WUFC_ARP 0x00000020 /* ARP Request Packet Wakeup Enable */
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/* Extended Device Control */
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#define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Defineable Pin 7 */
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#define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Definable Pin 7 */
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#define E1000_CTRL_EXT_EE_RST 0x00002000 /* Reinitialize from EEPROM */
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#define E1000_CTRL_EXT_RO_DIS 0x00020000 /* Relaxed Ordering disable */
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#define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000
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@ -75,12 +75,12 @@
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#define E1000_CTRL_EXT_IAME 0x08000000 /* Interrupt acknowledge Auto-mask */
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#define E1000_CTRL_EXT_INT_TIMER_CLR 0x20000000 /* Clear Interrupt timers after IMS clear */
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/* Receive Decriptor bit definitions */
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/* Receive Descriptor bit definitions */
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#define E1000_RXD_STAT_DD 0x01 /* Descriptor Done */
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#define E1000_RXD_STAT_EOP 0x02 /* End of Packet */
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#define E1000_RXD_STAT_IXSM 0x04 /* Ignore checksum */
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#define E1000_RXD_STAT_VP 0x08 /* IEEE VLAN Packet */
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#define E1000_RXD_STAT_UDPCS 0x10 /* UDP xsum caculated */
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#define E1000_RXD_STAT_UDPCS 0x10 /* UDP xsum calculated */
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#define E1000_RXD_STAT_TCPCS 0x20 /* TCP xsum calculated */
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#define E1000_RXD_ERR_CE 0x01 /* CRC Error */
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#define E1000_RXD_ERR_SE 0x02 /* Symbol Error */
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@ -223,7 +223,7 @@
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#define E1000_STATUS_LAN_INIT_DONE 0x00000200 /* Lan Init Completion by NVM */
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#define E1000_STATUS_GIO_MASTER_ENABLE 0x00080000 /* Status of Master requests. */
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/* Constants used to intrepret the masked PCI-X bus speed. */
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/* Constants used to interpret the masked PCI-X bus speed. */
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#define HALF_DUPLEX 1
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#define FULL_DUPLEX 2
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@ -517,7 +517,7 @@
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/* PHY 1000 MII Register/Bit Definitions */
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/* PHY Registers defined by IEEE */
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#define PHY_CONTROL 0x00 /* Control Register */
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#define PHY_STATUS 0x01 /* Status Regiser */
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#define PHY_STATUS 0x01 /* Status Register */
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#define PHY_ID1 0x02 /* Phy Id Reg (word 1) */
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#define PHY_ID2 0x03 /* Phy Id Reg (word 2) */
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#define PHY_AUTONEG_ADV 0x04 /* Autoneg Advertisement */
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@ -184,7 +184,7 @@ enum e1e_registers {
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E1000_ICRXDMTC = 0x04120, /* Irq Cause Rx Desc MinThreshold Count */
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E1000_ICRXOC = 0x04124, /* Irq Cause Receiver Overrun Count */
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E1000_RXCSUM = 0x05000, /* RX Checksum Control - RW */
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E1000_RFCTL = 0x05008, /* Receive Filter Control*/
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E1000_RFCTL = 0x05008, /* Receive Filter Control */
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E1000_MTA = 0x05200, /* Multicast Table Array - RW Array */
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E1000_RA = 0x05400, /* Receive Address - RW Array */
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E1000_VFTA = 0x05600, /* VLAN Filter Table Array - RW Array */
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@ -202,7 +202,7 @@ enum e1e_registers {
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E1000_FACTPS = 0x05B30, /* Function Active and Power State to MNG */
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E1000_SWSM = 0x05B50, /* SW Semaphore */
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E1000_FWSM = 0x05B54, /* FW Semaphore */
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E1000_HICR = 0x08F00, /* Host Inteface Control */
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E1000_HICR = 0x08F00, /* Host Interface Control */
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};
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/* RSS registers */
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@ -671,7 +671,7 @@ static s32 e1000_get_phy_info_ich8lan(struct e1000_hw *hw)
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* e1000_check_polarity_ife_ich8lan - Check cable polarity for IFE PHY
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* @hw: pointer to the HW structure
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*
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* Polarity is determined on the polarity reveral feature being enabled.
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* Polarity is determined on the polarity reversal feature being enabled.
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* This function is only called by other family-specific
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* routines.
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**/
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@ -947,7 +947,7 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw)
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/* Either we should have a hardware SPI cycle in progress
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* bit to check against, in order to start a new cycle or
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* FDONE bit should be changed in the hardware so that it
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* is 1 after harware reset, which can then be used as an
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* is 1 after hardware reset, which can then be used as an
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* indication whether a cycle is in progress or has been
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* completed.
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*/
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@ -1155,7 +1155,7 @@ static s32 e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
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* which writes the checksum to the shadow ram. The changes in the shadow
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* ram are then committed to the EEPROM by processing each bank at a time
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* checking for the modified bit and writing only the pending changes.
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* After a succesful commit, the shadow ram is cleared and is ready for
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* After a successful commit, the shadow ram is cleared and is ready for
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* future writes.
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**/
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static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw)
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@ -1680,7 +1680,7 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
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* - initialize LED identification
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* - setup receive address registers
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* - setup flow control
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* - setup transmit discriptors
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* - setup transmit descriptors
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* - clear statistics
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**/
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static s32 e1000_init_hw_ich8lan(struct e1000_hw *hw)
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@ -1961,7 +1961,7 @@ static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw)
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E1000_PHY_CTRL_NOND0A_GBE_DISABLE);
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ew32(PHY_CTRL, phy_ctrl);
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/* Call gig speed drop workaround on Giga disable before accessing
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/* Call gig speed drop workaround on Gig disable before accessing
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* any PHY registers */
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e1000e_gig_downshift_workaround_ich8lan(hw);
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@ -1972,7 +1972,7 @@ static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw)
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/**
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* e1000_set_kmrn_lock_loss_workaound_ich8lan - Set Kumeran workaround state
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* @hw: pointer to the HW structure
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* @state: boolean value used to set the current Kumaran workaround state
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* @state: boolean value used to set the current Kumeran workaround state
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*
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* If ICH8, set the current Kumeran workaround state (enabled - TRUE
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* /disabled - FALSE).
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@ -2017,7 +2017,7 @@ void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw)
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E1000_PHY_CTRL_NOND0A_GBE_DISABLE);
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ew32(PHY_CTRL, reg);
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/* Call gig speed drop workaround on Giga disable before
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/* Call gig speed drop workaround on Gig disable before
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* accessing any PHY registers */
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if (hw->mac.type == e1000_ich8lan)
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e1000e_gig_downshift_workaround_ich8lan(hw);
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@ -2045,7 +2045,7 @@ void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw)
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* @hw: pointer to the HW structure
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*
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* Steps to take when dropping from 1Gb/s (eg. link cable removal (LSC),
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* LPLU, Giga disable, MDIC PHY reset):
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* LPLU, Gig disable, MDIC PHY reset):
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* 1) Set Kumeran Near-end loopback
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* 2) Clear Kumeran Near-end loopback
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* Should only be called for ICH8[m] devices with IGP_3 Phy.
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@ -2089,10 +2089,10 @@ static s32 e1000_cleanup_led_ich8lan(struct e1000_hw *hw)
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}
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/**
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* e1000_led_on_ich8lan - Turn LED's on
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* e1000_led_on_ich8lan - Turn LEDs on
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* @hw: pointer to the HW structure
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*
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* Turn on the LED's.
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* Turn on the LEDs.
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**/
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static s32 e1000_led_on_ich8lan(struct e1000_hw *hw)
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{
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@ -2105,10 +2105,10 @@ static s32 e1000_led_on_ich8lan(struct e1000_hw *hw)
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}
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/**
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* e1000_led_off_ich8lan - Turn LED's off
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* e1000_led_off_ich8lan - Turn LEDs off
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* @hw: pointer to the HW structure
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*
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* Turn off the LED's.
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* Turn off the LEDs.
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**/
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static s32 e1000_led_off_ich8lan(struct e1000_hw *hw)
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{
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@ -1140,7 +1140,7 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
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}
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/**
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* e1000e_get_speed_and_duplex_copper - Retreive current speed/duplex
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* e1000e_get_speed_and_duplex_copper - Retrieve current speed/duplex
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* @hw: pointer to the HW structure
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* @speed: stores the current speed
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* @duplex: stores the current duplex
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@ -1176,7 +1176,7 @@ s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, u16 *dup
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}
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/**
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* e1000e_get_speed_and_duplex_fiber_serdes - Retreive current speed/duplex
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* e1000e_get_speed_and_duplex_fiber_serdes - Retrieve current speed/duplex
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* @hw: pointer to the HW structure
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* @speed: stores the current speed
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* @duplex: stores the current duplex
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@ -1386,7 +1386,7 @@ s32 e1000e_cleanup_led_generic(struct e1000_hw *hw)
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* e1000e_blink_led - Blink LED
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* @hw: pointer to the HW structure
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*
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* Blink the led's which are set to be on.
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* Blink the LEDs which are set to be on.
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**/
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s32 e1000e_blink_led(struct e1000_hw *hw)
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{
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@ -1491,7 +1491,7 @@ void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop)
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* @hw: pointer to the HW structure
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*
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* Returns 0 if successful, else returns -10
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* (-E1000_ERR_MASTER_REQUESTS_PENDING) if master disable bit has not casued
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* (-E1000_ERR_MASTER_REQUESTS_PENDING) if master disable bit has not caused
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* the master requests to be disabled.
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*
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* Disables PCI-Express master access and verifies there are no pending
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@ -1852,7 +1852,7 @@ static s32 e1000_ready_nvm_eeprom(struct e1000_hw *hw)
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}
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/**
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* e1000e_read_nvm_spi - Read EEPROM's using SPI
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* e1000e_read_nvm_spi - Reads EEPROM using SPI
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* @hw: pointer to the HW structure
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* @offset: offset of word in the EEPROM to read
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* @words: number of words to read
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@ -1956,7 +1956,7 @@ s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
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* Writes data to EEPROM at offset using SPI interface.
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*
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* If e1000e_update_nvm_checksum is not called after this function , the
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* EEPROM will most likley contain an invalid checksum.
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* EEPROM will most likely contain an invalid checksum.
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**/
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s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
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{
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@ -2198,7 +2198,7 @@ static u8 e1000_calculate_checksum(u8 *buffer, u32 length)
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*
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* Returns E1000_success upon success, else E1000_ERR_HOST_INTERFACE_COMMAND
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*
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* This function checks whether the HOST IF is enabled for command operaton
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* This function checks whether the HOST IF is enabled for command operation
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* and also checks whether the previous command is completed. It busy waits
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* in case of previous command is not completed.
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**/
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@ -2230,7 +2230,7 @@ static s32 e1000_mng_enable_host_if(struct e1000_hw *hw)
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}
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/**
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* e1000e_check_mng_mode - check managament mode
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* e1000e_check_mng_mode - check management mode
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* @hw: pointer to the HW structure
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*
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* Reads the firmware semaphore register and returns true (>0) if
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@ -1006,7 +1006,7 @@ static void e1000_irq_enable(struct e1000_adapter *adapter)
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* e1000_get_hw_control - get control of the h/w from f/w
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* @adapter: address of board private structure
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*
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* e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
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* e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
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* For ASF and Pass Through versions of f/w this means that
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* the driver is loaded. For AMT version (only with 82573)
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* of the f/w this means that the network i/f is open.
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@ -1032,7 +1032,7 @@ static void e1000_get_hw_control(struct e1000_adapter *adapter)
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* e1000_release_hw_control - release control of the h/w to f/w
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* @adapter: address of board private structure
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*
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* e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
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* e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
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* For ASF and Pass Through versions of f/w this means that the
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* driver is no longer loaded. For AMT version (only with 82573) i
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* of the f/w this means that the network i/f is closed.
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@ -1241,6 +1241,11 @@ void e1000e_free_rx_resources(struct e1000_adapter *adapter)
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/**
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* e1000_update_itr - update the dynamic ITR value based on statistics
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* @adapter: pointer to adapter
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* @itr_setting: current adapter->itr
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* @packets: the number of packets during this measurement interval
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* @bytes: the number of bytes during this measurement interval
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*
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* Stores a new ITR value based on packets and byte
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* counts during the last interrupt. The advantage of per interrupt
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* computation is faster updates and more accurate ITR for the current
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@ -1250,10 +1255,6 @@ void e1000e_free_rx_resources(struct e1000_adapter *adapter)
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* while increasing bulk throughput.
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* this functionality is controlled by the InterruptThrottleRate module
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* parameter (see e1000_param.c)
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* @adapter: pointer to adapter
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* @itr_setting: current adapter->itr
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* @packets: the number of packets during this measurement interval
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* @bytes: the number of bytes during this measurement interval
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**/
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static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
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u16 itr_setting, int packets,
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@ -1366,6 +1367,7 @@ static void e1000_set_itr(struct e1000_adapter *adapter)
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/**
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* e1000_clean - NAPI Rx polling callback
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* @adapter: board private structure
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* @budget: amount of packets driver is allowed to process this poll
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**/
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static int e1000_clean(struct napi_struct *napi, int budget)
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{
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@ -2000,7 +2002,7 @@ static void e1000_power_down_phy(struct e1000_adapter *adapter)
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e1000_check_reset_block(hw))
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return;
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/* managebility (AMT) is enabled */
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/* manageability (AMT) is enabled */
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if (er32(MANC) & E1000_MANC_SMBUS_EN)
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return;
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@ -121,7 +121,7 @@ s32 e1000e_phy_reset_dsp(struct e1000_hw *hw)
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* @offset: register offset to be read
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* @data: pointer to the read data
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*
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* Reads the MDI control regsiter in the PHY at offset and stores the
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* Reads the MDI control register in the PHY at offset and stores the
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* information read to data.
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**/
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static s32 e1000_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)
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@ -1172,7 +1172,7 @@ s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active)
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}
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/**
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* e1000e_check_downshift - Checks whether a downshift in speed occured
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* e1000e_check_downshift - Checks whether a downshift in speed occurred
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* @hw: pointer to the HW structure
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*
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* Success returns 0, Failure returns 1
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@ -1388,8 +1388,8 @@ s32 e1000e_get_cable_length_m88(struct e1000_hw *hw)
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*
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* The automatic gain control (agc) normalizes the amplitude of the
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* received signal, adjusting for the attenuation produced by the
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* cable. By reading the AGC registers, which reperesent the
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* cobination of course and fine gain value, the value can be put
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* cable. By reading the AGC registers, which represent the
|
||||
* combination of course and fine gain value, the value can be put
|
||||
* into a lookup table to obtain the approximate cable length
|
||||
* for each channel.
|
||||
**/
|
||||
@ -1619,7 +1619,7 @@ s32 e1000e_phy_sw_reset(struct e1000_hw *hw)
|
||||
* Verify the reset block is not blocking us from resetting. Acquire
|
||||
* semaphore (if necessary) and read/set/write the device control reset
|
||||
* bit in the PHY. Wait the appropriate delay time for the device to
|
||||
* reset and relase the semaphore (if necessary).
|
||||
* reset and release the semaphore (if necessary).
|
||||
**/
|
||||
s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw)
|
||||
{
|
||||
|
||||
Loading…
Reference in New Issue
Block a user