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usb: dwc2: gadget: use reset detect interrupt
ResetDet interrupt is used to detect a reset of the bus while the controller is suspended. This may happens for example when using Command Verifier. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Gregory Herrero <gregory.herrero@intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
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@ -2308,8 +2308,9 @@ void s3c_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
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writel(GINTSTS_ERLYSUSP | GINTSTS_SESSREQINT |
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GINTSTS_GOUTNAKEFF | GINTSTS_GINNAKEFF |
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GINTSTS_CONIDSTSCHNG | GINTSTS_USBRST |
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GINTSTS_ENUMDONE | GINTSTS_OTGINT |
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GINTSTS_USBSUSP | GINTSTS_WKUPINT,
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GINTSTS_RESETDET | GINTSTS_ENUMDONE |
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GINTSTS_OTGINT | GINTSTS_USBSUSP |
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GINTSTS_WKUPINT,
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hsotg->regs + GINTMSK);
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if (using_dma(hsotg))
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@ -2475,7 +2476,19 @@ static irqreturn_t s3c_hsotg_irq(int irq, void *pw)
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}
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}
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if (gintsts & GINTSTS_USBRST) {
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if (gintsts & GINTSTS_RESETDET) {
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dev_dbg(hsotg->dev, "%s: USBRstDet\n", __func__);
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writel(GINTSTS_RESETDET, hsotg->regs + GINTSTS);
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/* This event must be used only if controller is suspended */
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if (hsotg->lx_state == DWC2_L2) {
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dwc2_exit_hibernation(hsotg, true);
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hsotg->lx_state = DWC2_L0;
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}
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}
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if (gintsts & (GINTSTS_USBRST | GINTSTS_RESETDET)) {
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u32 usb_status = readl(hsotg->regs + GOTGCTL);
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