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mips/cavium-octeon: Fix typo *must* in comment
Fixes: 5b3b16880f
("MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon.")
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@mips.com>
Cc: James Hogan <jhogan@kernel.org>
Cc: linux-mips@vger.kernel.org
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@ -844,7 +844,7 @@ void __init prom_init(void)
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* BIST should always be enabled when doing a soft reset. L2
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* Cache locking for instance is not cleared unless BIST is
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* enabled. Unfortunately due to a chip errata G-200 for
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* Cn38XX and CN31XX, BIST msut be disabled on these parts.
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* Cn38XX and CN31XX, BIST must be disabled on these parts.
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*/
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if (OCTEON_IS_MODEL(OCTEON_CN38XX_PASS2) ||
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OCTEON_IS_MODEL(OCTEON_CN31XX))
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