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spi: npcm-pspi: fix 16 bit send and receive support
Fixing NPCM BMC Peripheral SPI controller 16 bit send and receive support by writing and reading the SPI data in the right order. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Link: https://lore.kernel.org/r/20200115162301.235926-2-tmaimon77@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -195,6 +195,7 @@ static void npcm_pspi_setup_transfer(struct spi_device *spi,
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static void npcm_pspi_send(struct npcm_pspi *priv)
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{
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int wsize;
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u16 val;
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wsize = min(bytes_per_word(priv->bits_per_word), priv->tx_bytes);
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priv->tx_bytes -= wsize;
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@ -204,17 +205,18 @@ static void npcm_pspi_send(struct npcm_pspi *priv)
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switch (wsize) {
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case 1:
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iowrite8(*priv->tx_buf, NPCM_PSPI_DATA + priv->base);
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val = *priv->tx_buf++;
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iowrite8(val, NPCM_PSPI_DATA + priv->base);
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break;
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case 2:
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iowrite16(*priv->tx_buf, NPCM_PSPI_DATA + priv->base);
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val = *priv->tx_buf++;
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val = *priv->tx_buf++ | (val << 8);
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iowrite16(val, NPCM_PSPI_DATA + priv->base);
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break;
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default:
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WARN_ON_ONCE(1);
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return;
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}
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priv->tx_buf += wsize;
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}
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static void npcm_pspi_recv(struct npcm_pspi *priv)
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@ -230,18 +232,17 @@ static void npcm_pspi_recv(struct npcm_pspi *priv)
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switch (rsize) {
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case 1:
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val = ioread8(priv->base + NPCM_PSPI_DATA);
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*priv->rx_buf++ = ioread8(priv->base + NPCM_PSPI_DATA);
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break;
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case 2:
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val = ioread16(priv->base + NPCM_PSPI_DATA);
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*priv->rx_buf++ = (val >> 8);
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*priv->rx_buf++ = val & 0xff;
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break;
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default:
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WARN_ON_ONCE(1);
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return;
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}
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*priv->rx_buf = val;
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priv->rx_buf += rsize;
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}
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static int npcm_pspi_transfer_one(struct spi_master *master,
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