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bnx2x: PHY lock list
Some dual port PHY require HW lock since they are used by both interfaces (different driver instances). Since this list is getting longer, update a parameter at load time instead of calculating it on runtime Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -570,6 +570,7 @@ struct bnx2x_port {
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/* used to synchronize phy accesses */
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struct mutex phy_mutex;
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int need_hw_lock;
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u32 port_stx;
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@ -1816,22 +1816,16 @@ static int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource)
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/* HW Lock for shared dual port PHYs */
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static void bnx2x_acquire_phy_lock(struct bnx2x *bp)
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{
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u32 ext_phy_type = XGXS_EXT_PHY_TYPE(bp->link_params.ext_phy_config);
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mutex_lock(&bp->port.phy_mutex);
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if ((ext_phy_type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8072) ||
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(ext_phy_type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073))
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bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_8072_MDIO);
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if (bp->port.need_hw_lock)
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bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_MDIO);
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}
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static void bnx2x_release_phy_lock(struct bnx2x *bp)
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{
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u32 ext_phy_type = XGXS_EXT_PHY_TYPE(bp->link_params.ext_phy_config);
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if ((ext_phy_type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8072) ||
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(ext_phy_type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073))
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bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_8072_MDIO);
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if (bp->port.need_hw_lock)
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bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_MDIO);
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mutex_unlock(&bp->port.phy_mutex);
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}
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@ -5705,6 +5699,12 @@ static int bnx2x_init_common(struct bnx2x *bp)
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}
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switch (XGXS_EXT_PHY_TYPE(bp->link_params.ext_phy_config)) {
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case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8072:
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case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073:
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case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726:
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bp->port.need_hw_lock = 1;
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break;
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case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101:
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/* Fan failure is indicated by SPIO 5 */
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bnx2x_set_spio(bp, MISC_REGISTERS_SPIO_5,
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@ -5228,8 +5228,8 @@
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#define MISC_REGISTERS_SPIO_OUTPUT_LOW 0
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#define MISC_REGISTERS_SPIO_SET_POS 8
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#define HW_LOCK_MAX_RESOURCE_VALUE 31
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#define HW_LOCK_RESOURCE_8072_MDIO 0
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#define HW_LOCK_RESOURCE_GPIO 1
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#define HW_LOCK_RESOURCE_MDIO 0
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#define HW_LOCK_RESOURCE_PORT0_ATT_MASK 3
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#define HW_LOCK_RESOURCE_SPIO 2
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#define HW_LOCK_RESOURCE_UNDI 5
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