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dt-bindings: pwm: Convert imx tpm pwm to json-schema

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Convert the imx tpm pwm binding to DT schema format using json-schema.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Anson Huang 2020-05-14 14:54:19 +08:00 committed by Rob Herring
parent f1ea970395
commit 44f50b8d40
2 changed files with 55 additions and 22 deletions
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22
Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt
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Freescale i.MX TPM PWM controller
Required properties:
- compatible : Should be "fsl,imx7ulp-pwm".
- reg: Physical base address and length of the controller's registers.
- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of the cells format.
- clocks : The clock provided by the SoC to drive the PWM.
- interrupts: The interrupt for the PWM controller.
Note: The TPM counter and period counter are shared between multiple channels, so all channels
should use same period setting.
Example:
tpm4: pwm@40250000 {
compatible = "fsl,imx7ulp-pwm";
reg = <0x40250000 0x1000>;
assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
#pwm-cells = <3>;
};

55
Documentation/devicetree/bindings/pwm/imx-tpm-pwm.yaml Normal file
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pwm/imx-tpm-pwm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale i.MX TPM PWM controller
maintainers:
- Anson Huang <anson.huang@nxp.com>
description: |
The TPM counter and period counter are shared between multiple
channels, so all channels should use same period setting.
properties:
"#pwm-cells":
const: 3
compatible:
enum:
- fsl,imx7ulp-pwm
reg:
maxItems: 1
assigned-clocks:
maxItems: 1
assigned-clock-parents:
maxItems: 1
clocks:
maxItems: 1
required:
- "#pwm-cells"
- compatible
- reg
- clocks
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/imx7ulp-clock.h>
pwm@40250000 {
compatible = "fsl,imx7ulp-pwm";
reg = <0x40250000 0x1000>;
assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
#pwm-cells = <3>;
};