mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 00:10:51 +07:00
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
We got slightly different patches removing a double word
in a comment in net/ipv4/raw.c - picked the version from net.
Simple conflict in drivers/net/ethernet/ibm/ibmvnic.c. Use cached
values instead of VNIC login response buffer (following what
commit 507ebe6444 ("ibmvnic: Fix use-after-free of VNIC login
response buffer") did).
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski
commit
44a8c4f33c
@ -49,7 +49,7 @@ checking of rcu_dereference() primitives:
|
||||
is invoked by both RCU-sched readers and updaters.
|
||||
srcu_dereference_check(p, c):
|
||||
Use explicit check expression "c" along with
|
||||
srcu_read_lock_held()(). This is useful in code that
|
||||
srcu_read_lock_held(). This is useful in code that
|
||||
is invoked by both SRCU readers and updaters.
|
||||
rcu_dereference_raw(p):
|
||||
Don't check. (Use sparingly, if at all.)
|
||||
|
||||
@ -1662,7 +1662,7 @@
|
||||
|
||||
98 block User-mode virtual block device
|
||||
0 = /dev/ubda First user-mode block device
|
||||
16 = /dev/udbb Second user-mode block device
|
||||
16 = /dev/ubdb Second user-mode block device
|
||||
...
|
||||
|
||||
Partitions are handled in the same way as for IDE
|
||||
|
||||
@ -1434,7 +1434,7 @@ on the feature, restricting the viewing angles.
|
||||
|
||||
|
||||
DYTC Lapmode sensor
|
||||
------------------
|
||||
-------------------
|
||||
|
||||
sysfs: dytc_lapmode
|
||||
|
||||
|
||||
@ -123,7 +123,9 @@ Energy-Performance Bias (EPB) knob (otherwise), which means that the processor's
|
||||
internal P-state selection logic is expected to focus entirely on performance.
|
||||
|
||||
This will override the EPP/EPB setting coming from the ``sysfs`` interface
|
||||
(see `Energy vs Performance Hints`_ below).
|
||||
(see `Energy vs Performance Hints`_ below). Moreover, any attempts to change
|
||||
the EPP/EPB to a value different from 0 ("performance") via ``sysfs`` in this
|
||||
configuration will be rejected.
|
||||
|
||||
Also, in this configuration the range of P-states available to the processor's
|
||||
internal P-state selection logic is always restricted to the upper boundary
|
||||
@ -564,8 +566,8 @@ Energy-Performance Preference (EPP) knob (if supported) or its
|
||||
Energy-Performance Bias (EPB) knob. It is also possible to write a positive
|
||||
integer value between 0 to 255, if the EPP feature is present. If the EPP
|
||||
feature is not present, writing integer value to this attribute is not
|
||||
supported. In this case, user can use
|
||||
"/sys/devices/system/cpu/cpu*/power/energy_perf_bias" interface.
|
||||
supported. In this case, user can use the
|
||||
"/sys/devices/system/cpu/cpu*/power/energy_perf_bias" interface.
|
||||
|
||||
[Note that tasks may by migrated from one CPU to another by the scheduler's
|
||||
load-balancing algorithm and if different energy vs performance hints are
|
||||
|
||||
@ -1,66 +0,0 @@
|
||||
Texas Instruments K3 Interrupt Aggregator
|
||||
=========================================
|
||||
|
||||
The Interrupt Aggregator (INTA) provides a centralized machine
|
||||
which handles the termination of system events to that they can
|
||||
be coherently processed by the host(s) in the system. A maximum
|
||||
of 64 events can be mapped to a single interrupt.
|
||||
|
||||
|
||||
Interrupt Aggregator
|
||||
+-----------------------------------------+
|
||||
| Intmap VINT |
|
||||
| +--------------+ +------------+ |
|
||||
m ------>| | vint | bit | | 0 |.....|63| vint0 |
|
||||
. | +--------------+ +------------+ | +------+
|
||||
. | . . | | HOST |
|
||||
Globalevents ------>| . . |------>| IRQ |
|
||||
. | . . | | CTRL |
|
||||
. | . . | +------+
|
||||
n ------>| +--------------+ +------------+ |
|
||||
| | vint | bit | | 0 |.....|63| vintx |
|
||||
| +--------------+ +------------+ |
|
||||
| |
|
||||
+-----------------------------------------+
|
||||
|
||||
Configuration of these Intmap registers that maps global events to vint is done
|
||||
by a system controller (like the Device Memory and Security Controller on K3
|
||||
AM654 SoC). Driver should request the system controller to get the range
|
||||
of global events and vints assigned to the requesting host. Management
|
||||
of these requested resources should be handled by driver and requests
|
||||
system controller to map specific global event to vint, bit pair.
|
||||
|
||||
Communication between the host processor running an OS and the system
|
||||
controller happens through a protocol called TI System Control Interface
|
||||
(TISCI protocol). For more details refer:
|
||||
Documentation/devicetree/bindings/arm/keystone/ti,sci.txt
|
||||
|
||||
TISCI Interrupt Aggregator Node:
|
||||
-------------------------------
|
||||
- compatible: Must be "ti,sci-inta".
|
||||
- reg: Should contain registers location and length.
|
||||
- interrupt-controller: Identifies the node as an interrupt controller
|
||||
- msi-controller: Identifies the node as an MSI controller.
|
||||
- interrupt-parent: phandle of irq parent.
|
||||
- ti,sci: Phandle to TI-SCI compatible System controller node.
|
||||
- ti,sci-dev-id: TISCI device ID of the Interrupt Aggregator.
|
||||
- ti,sci-rm-range-vint: Array of TISCI subtype ids representing vints(inta
|
||||
outputs) range within this INTA, assigned to the
|
||||
requesting host context.
|
||||
- ti,sci-rm-range-global-event: Array of TISCI subtype ids representing the
|
||||
global events range reaching this IA and are assigned
|
||||
to the requesting host context.
|
||||
|
||||
Example:
|
||||
--------
|
||||
main_udmass_inta: interrupt-controller@33d00000 {
|
||||
compatible = "ti,sci-inta";
|
||||
reg = <0x0 0x33d00000 0x0 0x100000>;
|
||||
interrupt-controller;
|
||||
msi-controller;
|
||||
interrupt-parent = <&main_navss_intr>;
|
||||
ti,sci = <&dmsc>;
|
||||
ti,sci-dev-id = <179>;
|
||||
ti,sci-rm-range-vint = <0x0>;
|
||||
ti,sci-rm-range-global-event = <0x1>;
|
||||
};
|
||||
@ -0,0 +1,98 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/interrupt-controller/ti,sci-inta.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Texas Instruments K3 Interrupt Aggregator
|
||||
|
||||
maintainers:
|
||||
- Lokesh Vutla <lokeshvutla@ti.com>
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
|
||||
|
||||
description: |
|
||||
The Interrupt Aggregator (INTA) provides a centralized machine
|
||||
which handles the termination of system events to that they can
|
||||
be coherently processed by the host(s) in the system. A maximum
|
||||
of 64 events can be mapped to a single interrupt.
|
||||
|
||||
Interrupt Aggregator
|
||||
+-----------------------------------------+
|
||||
| Intmap VINT |
|
||||
| +--------------+ +------------+ |
|
||||
m ------>| | vint | bit | | 0 |.....|63| vint0 |
|
||||
. | +--------------+ +------------+ | +------+
|
||||
. | . . | | HOST |
|
||||
Globalevents ------>| . . |----->| IRQ |
|
||||
. | . . | | CTRL |
|
||||
. | . . | +------+
|
||||
n ------>| +--------------+ +------------+ |
|
||||
| | vint | bit | | 0 |.....|63| vintx |
|
||||
| +--------------+ +------------+ |
|
||||
| |
|
||||
+-----------------------------------------+
|
||||
|
||||
Configuration of these Intmap registers that maps global events to vint is
|
||||
done by a system controller (like the Device Memory and Security Controller
|
||||
on AM654 SoC). Driver should request the system controller to get the range
|
||||
of global events and vints assigned to the requesting host. Management
|
||||
of these requested resources should be handled by driver and requests
|
||||
system controller to map specific global event to vint, bit pair.
|
||||
|
||||
Communication between the host processor running an OS and the system
|
||||
controller happens through a protocol called TI System Control Interface
|
||||
(TISCI protocol).
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: ti,sci-inta
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupt-controller: true
|
||||
|
||||
msi-controller: true
|
||||
|
||||
ti,interrupt-ranges:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-matrix
|
||||
description: |
|
||||
Interrupt ranges that converts the INTA output hw irq numbers
|
||||
to parents's input interrupt numbers.
|
||||
items:
|
||||
items:
|
||||
- description: |
|
||||
"output_irq" specifies the base for inta output irq
|
||||
- description: |
|
||||
"parent's input irq" specifies the base for parent irq
|
||||
- description: |
|
||||
"limit" specifies the limit for translation
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupt-controller
|
||||
- msi-controller
|
||||
- ti,sci
|
||||
- ti,sci-dev-id
|
||||
- ti,interrupt-ranges
|
||||
|
||||
examples:
|
||||
- |
|
||||
bus {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
main_udmass_inta: msi-controller@33d00000 {
|
||||
compatible = "ti,sci-inta";
|
||||
reg = <0x0 0x33d00000 0x0 0x100000>;
|
||||
interrupt-controller;
|
||||
msi-controller;
|
||||
interrupt-parent = <&main_navss_intr>;
|
||||
ti,sci = <&dmsc>;
|
||||
ti,sci-dev-id = <179>;
|
||||
ti,interrupt-ranges = <0 0 256>;
|
||||
};
|
||||
};
|
||||
@ -1,82 +0,0 @@
|
||||
Texas Instruments K3 Interrupt Router
|
||||
=====================================
|
||||
|
||||
The Interrupt Router (INTR) module provides a mechanism to mux M
|
||||
interrupt inputs to N interrupt outputs, where all M inputs are selectable
|
||||
to be driven per N output. An Interrupt Router can either handle edge triggered
|
||||
or level triggered interrupts and that is fixed in hardware.
|
||||
|
||||
Interrupt Router
|
||||
+----------------------+
|
||||
| Inputs Outputs |
|
||||
+-------+ | +------+ +-----+ |
|
||||
| GPIO |----------->| | irq0 | | 0 | | Host IRQ
|
||||
+-------+ | +------+ +-----+ | controller
|
||||
| . . | +-------+
|
||||
+-------+ | . . |----->| IRQ |
|
||||
| INTA |----------->| . . | +-------+
|
||||
+-------+ | . +-----+ |
|
||||
| +------+ | N | |
|
||||
| | irqM | +-----+ |
|
||||
| +------+ |
|
||||
| |
|
||||
+----------------------+
|
||||
|
||||
There is one register per output (MUXCNTL_N) that controls the selection.
|
||||
Configuration of these MUXCNTL_N registers is done by a system controller
|
||||
(like the Device Memory and Security Controller on K3 AM654 SoC). System
|
||||
controller will keep track of the used and unused registers within the Router.
|
||||
Driver should request the system controller to get the range of GIC IRQs
|
||||
assigned to the requesting hosts. It is the drivers responsibility to keep
|
||||
track of Host IRQs.
|
||||
|
||||
Communication between the host processor running an OS and the system
|
||||
controller happens through a protocol called TI System Control Interface
|
||||
(TISCI protocol). For more details refer:
|
||||
Documentation/devicetree/bindings/arm/keystone/ti,sci.txt
|
||||
|
||||
TISCI Interrupt Router Node:
|
||||
----------------------------
|
||||
Required Properties:
|
||||
- compatible: Must be "ti,sci-intr".
|
||||
- ti,intr-trigger-type: Should be one of the following:
|
||||
1: If intr supports edge triggered interrupts.
|
||||
4: If intr supports level triggered interrupts.
|
||||
- interrupt-controller: Identifies the node as an interrupt controller
|
||||
- #interrupt-cells: Specifies the number of cells needed to encode an
|
||||
interrupt source. The value should be 2.
|
||||
First cell should contain the TISCI device ID of source
|
||||
Second cell should contain the interrupt source offset
|
||||
within the device.
|
||||
- ti,sci: Phandle to TI-SCI compatible System controller node.
|
||||
- ti,sci-dst-id: TISCI device ID of the destination IRQ controller.
|
||||
- ti,sci-rm-range-girq: Array of TISCI subtype ids representing the host irqs
|
||||
assigned to this interrupt router. Each subtype id
|
||||
corresponds to a range of host irqs.
|
||||
|
||||
For more details on TISCI IRQ resource management refer:
|
||||
https://downloads.ti.com/tisci/esd/latest/2_tisci_msgs/rm/rm_irq.html
|
||||
|
||||
Example:
|
||||
--------
|
||||
The following example demonstrates both interrupt router node and the consumer
|
||||
node(main gpio) on the AM654 SoC:
|
||||
|
||||
main_intr: interrupt-controller0 {
|
||||
compatible = "ti,sci-intr";
|
||||
ti,intr-trigger-type = <1>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gic500>;
|
||||
#interrupt-cells = <2>;
|
||||
ti,sci = <&dmsc>;
|
||||
ti,sci-dst-id = <56>;
|
||||
ti,sci-rm-range-girq = <0x1>;
|
||||
};
|
||||
|
||||
main_gpio0: gpio@600000 {
|
||||
...
|
||||
interrupt-parent = <&main_intr>;
|
||||
interrupts = <57 256>, <57 257>, <57 258>,
|
||||
<57 259>, <57 260>, <57 261>;
|
||||
...
|
||||
};
|
||||
@ -0,0 +1,102 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/interrupt-controller/ti,sci-intr.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Texas Instruments K3 Interrupt Router
|
||||
|
||||
maintainers:
|
||||
- Lokesh Vutla <lokeshvutla@ti.com>
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
|
||||
|
||||
description: |
|
||||
The Interrupt Router (INTR) module provides a mechanism to mux M
|
||||
interrupt inputs to N interrupt outputs, where all M inputs are selectable
|
||||
to be driven per N output. An Interrupt Router can either handle edge
|
||||
triggered or level triggered interrupts and that is fixed in hardware.
|
||||
|
||||
Interrupt Router
|
||||
+----------------------+
|
||||
| Inputs Outputs |
|
||||
+-------+ | +------+ +-----+ |
|
||||
| GPIO |----------->| | irq0 | | 0 | | Host IRQ
|
||||
+-------+ | +------+ +-----+ | controller
|
||||
| . . | +-------+
|
||||
+-------+ | . . |----->| IRQ |
|
||||
| INTA |----------->| . . | +-------+
|
||||
+-------+ | . +-----+ |
|
||||
| +------+ | N | |
|
||||
| | irqM | +-----+ |
|
||||
| +------+ |
|
||||
| |
|
||||
+----------------------+
|
||||
|
||||
There is one register per output (MUXCNTL_N) that controls the selection.
|
||||
Configuration of these MUXCNTL_N registers is done by a system controller
|
||||
(like the Device Memory and Security Controller on K3 AM654 SoC). System
|
||||
controller will keep track of the used and unused registers within the Router.
|
||||
Driver should request the system controller to get the range of GIC IRQs
|
||||
assigned to the requesting hosts. It is the drivers responsibility to keep
|
||||
track of Host IRQs.
|
||||
|
||||
Communication between the host processor running an OS and the system
|
||||
controller happens through a protocol called TI System Control Interface
|
||||
(TISCI protocol).
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: ti,sci-intr
|
||||
|
||||
ti,intr-trigger-type:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [1, 4]
|
||||
description: |
|
||||
Should be one of the following.
|
||||
1 = If intr supports edge triggered interrupts.
|
||||
4 = If intr supports level triggered interrupts.
|
||||
|
||||
interrupt-controller: true
|
||||
|
||||
'#interrupt-cells':
|
||||
const: 1
|
||||
description: |
|
||||
The 1st cell should contain interrupt router input hw number.
|
||||
|
||||
ti,interrupt-ranges:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-matrix
|
||||
description: |
|
||||
Interrupt ranges that converts the INTR output hw irq numbers
|
||||
to parents's input interrupt numbers.
|
||||
items:
|
||||
items:
|
||||
- description: |
|
||||
"output_irq" specifies the base for intr output irq
|
||||
- description: |
|
||||
"parent's input irq" specifies the base for parent irq
|
||||
- description: |
|
||||
"limit" specifies the limit for translation
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- ti,intr-trigger-type
|
||||
- interrupt-controller
|
||||
- '#interrupt-cells'
|
||||
- ti,sci
|
||||
- ti,sci-dev-id
|
||||
- ti,interrupt-ranges
|
||||
|
||||
examples:
|
||||
- |
|
||||
main_gpio_intr: interrupt-controller0 {
|
||||
compatible = "ti,sci-intr";
|
||||
ti,intr-trigger-type = <1>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gic500>;
|
||||
#interrupt-cells = <1>;
|
||||
ti,sci = <&dmsc>;
|
||||
ti,sci-dev-id = <131>;
|
||||
ti,interrupt-ranges = <0 360 32>;
|
||||
};
|
||||
@ -30,9 +30,13 @@ allOf:
|
||||
then:
|
||||
properties:
|
||||
clock-output-names:
|
||||
items:
|
||||
- const: clk_out_sd0
|
||||
- const: clk_in_sd0
|
||||
oneOf:
|
||||
- items:
|
||||
- const: clk_out_sd0
|
||||
- const: clk_in_sd0
|
||||
- items:
|
||||
- const: clk_out_sd1
|
||||
- const: clk_in_sd1
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
||||
@ -50,6 +50,8 @@ Optional properties:
|
||||
error caused by stop clock(fifo full)
|
||||
Valid range = [0:0x7]. if not present, default value is 0.
|
||||
applied to compatible "mediatek,mt2701-mmc".
|
||||
- resets: Phandle and reset specifier pair to softreset line of MSDC IP.
|
||||
- reset-names: Should be "hrst".
|
||||
|
||||
Examples:
|
||||
mmc0: mmc@11230000 {
|
||||
|
||||
@ -15,8 +15,15 @@ Required properties:
|
||||
- "nvidia,tegra210-sdhci": for Tegra210
|
||||
- "nvidia,tegra186-sdhci": for Tegra186
|
||||
- "nvidia,tegra194-sdhci": for Tegra194
|
||||
- clocks : Must contain one entry, for the module clock.
|
||||
See ../clocks/clock-bindings.txt for details.
|
||||
- clocks: For Tegra210, Tegra186 and Tegra194 must contain two entries.
|
||||
One for the module clock and one for the timeout clock.
|
||||
For all other Tegra devices, must contain a single entry for
|
||||
the module clock. See ../clocks/clock-bindings.txt for details.
|
||||
- clock-names: For Tegra210, Tegra186 and Tegra194 must contain the
|
||||
strings 'sdhci' and 'tmclk' to represent the module and
|
||||
the timeout clocks, respectively.
|
||||
For all other Tegra devices must contain the string 'sdhci'
|
||||
to represent the module clock.
|
||||
- resets : Must contain an entry for each entry in reset-names.
|
||||
See ../reset/reset.txt for details.
|
||||
- reset-names : Must include the following entries:
|
||||
@ -99,7 +106,7 @@ Optional properties for Tegra210, Tegra186 and Tegra194:
|
||||
|
||||
Example:
|
||||
sdhci@700b0000 {
|
||||
compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
|
||||
compatible = "nvidia,tegra124-sdhci";
|
||||
reg = <0x0 0x700b0000 0x0 0x200>;
|
||||
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
|
||||
@ -115,3 +122,22 @@ sdhci@700b0000 {
|
||||
nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdhci@700b0000 {
|
||||
compatible = "nvidia,tegra210-sdhci";
|
||||
reg = <0x0 0x700b0000 0x0 0x200>;
|
||||
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&tegra_car TEGRA210_CLK_SDMMC1>,
|
||||
<&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
resets = <&tegra_car 14>;
|
||||
reset-names = "sdhci";
|
||||
pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
|
||||
pinctrl-0 = <&sdmmc1_3v3>;
|
||||
pinctrl-1 = <&sdmmc1_1v8>;
|
||||
nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>;
|
||||
nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>;
|
||||
nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>;
|
||||
nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
Distributed Switch Architecture Device Tree Bindings
|
||||
----------------------------------------------------
|
||||
|
||||
See Documentation/devicetree/bindings/net/dsa/dsa.yaml for the documenation.
|
||||
See Documentation/devicetree/bindings/net/dsa/dsa.yaml for the documentation.
|
||||
|
||||
@ -6,9 +6,9 @@ API to implement a new FPGA bridge
|
||||
|
||||
* struct :c:type:`fpga_bridge` — The FPGA Bridge structure
|
||||
* struct :c:type:`fpga_bridge_ops` — Low level Bridge driver ops
|
||||
* :c:func:`devm_fpga_bridge_create()` — Allocate and init a bridge struct
|
||||
* :c:func:`fpga_bridge_register()` — Register a bridge
|
||||
* :c:func:`fpga_bridge_unregister()` — Unregister a bridge
|
||||
* devm_fpga_bridge_create() — Allocate and init a bridge struct
|
||||
* fpga_bridge_register() — Register a bridge
|
||||
* fpga_bridge_unregister() — Unregister a bridge
|
||||
|
||||
.. kernel-doc:: include/linux/fpga/fpga-bridge.h
|
||||
:functions: fpga_bridge
|
||||
|
||||
@ -104,9 +104,9 @@ API for implementing a new FPGA Manager driver
|
||||
* ``fpga_mgr_states`` — Values for :c:member:`fpga_manager->state`.
|
||||
* struct :c:type:`fpga_manager` — the FPGA manager struct
|
||||
* struct :c:type:`fpga_manager_ops` — Low level FPGA manager driver ops
|
||||
* :c:func:`devm_fpga_mgr_create` — Allocate and init a manager struct
|
||||
* :c:func:`fpga_mgr_register` — Register an FPGA manager
|
||||
* :c:func:`fpga_mgr_unregister` — Unregister an FPGA manager
|
||||
* devm_fpga_mgr_create() — Allocate and init a manager struct
|
||||
* fpga_mgr_register() — Register an FPGA manager
|
||||
* fpga_mgr_unregister() — Unregister an FPGA manager
|
||||
|
||||
.. kernel-doc:: include/linux/fpga/fpga-mgr.h
|
||||
:functions: fpga_mgr_states
|
||||
|
||||
@ -6,9 +6,9 @@ Overview
|
||||
|
||||
The in-kernel API for FPGA programming is a combination of APIs from
|
||||
FPGA manager, bridge, and regions. The actual function used to
|
||||
trigger FPGA programming is :c:func:`fpga_region_program_fpga()`.
|
||||
trigger FPGA programming is fpga_region_program_fpga().
|
||||
|
||||
:c:func:`fpga_region_program_fpga()` uses functionality supplied by
|
||||
fpga_region_program_fpga() uses functionality supplied by
|
||||
the FPGA manager and bridges. It will:
|
||||
|
||||
* lock the region's mutex
|
||||
@ -20,8 +20,8 @@ the FPGA manager and bridges. It will:
|
||||
* release the locks
|
||||
|
||||
The struct fpga_image_info specifies what FPGA image to program. It is
|
||||
allocated/freed by :c:func:`fpga_image_info_alloc()` and freed with
|
||||
:c:func:`fpga_image_info_free()`
|
||||
allocated/freed by fpga_image_info_alloc() and freed with
|
||||
fpga_image_info_free()
|
||||
|
||||
How to program an FPGA using a region
|
||||
-------------------------------------
|
||||
@ -84,10 +84,10 @@ will generate that list. Here's some sample code of what to do next::
|
||||
API for programming an FPGA
|
||||
---------------------------
|
||||
|
||||
* :c:func:`fpga_region_program_fpga` — Program an FPGA
|
||||
* :c:type:`fpga_image_info` — Specifies what FPGA image to program
|
||||
* :c:func:`fpga_image_info_alloc()` — Allocate an FPGA image info struct
|
||||
* :c:func:`fpga_image_info_free()` — Free an FPGA image info struct
|
||||
* fpga_region_program_fpga() — Program an FPGA
|
||||
* fpga_image_info() — Specifies what FPGA image to program
|
||||
* fpga_image_info_alloc() — Allocate an FPGA image info struct
|
||||
* fpga_image_info_free() — Free an FPGA image info struct
|
||||
|
||||
.. kernel-doc:: drivers/fpga/fpga-region.c
|
||||
:functions: fpga_region_program_fpga
|
||||
|
||||
@ -46,18 +46,18 @@ API to add a new FPGA region
|
||||
----------------------------
|
||||
|
||||
* struct :c:type:`fpga_region` — The FPGA region struct
|
||||
* :c:func:`devm_fpga_region_create` — Allocate and init a region struct
|
||||
* :c:func:`fpga_region_register` — Register an FPGA region
|
||||
* :c:func:`fpga_region_unregister` — Unregister an FPGA region
|
||||
* devm_fpga_region_create() — Allocate and init a region struct
|
||||
* fpga_region_register() — Register an FPGA region
|
||||
* fpga_region_unregister() — Unregister an FPGA region
|
||||
|
||||
The FPGA region's probe function will need to get a reference to the FPGA
|
||||
Manager it will be using to do the programming. This usually would happen
|
||||
during the region's probe function.
|
||||
|
||||
* :c:func:`fpga_mgr_get` — Get a reference to an FPGA manager, raise ref count
|
||||
* :c:func:`of_fpga_mgr_get` — Get a reference to an FPGA manager, raise ref count,
|
||||
* fpga_mgr_get() — Get a reference to an FPGA manager, raise ref count
|
||||
* of_fpga_mgr_get() — Get a reference to an FPGA manager, raise ref count,
|
||||
given a device node.
|
||||
* :c:func:`fpga_mgr_put` — Put an FPGA manager
|
||||
* fpga_mgr_put() — Put an FPGA manager
|
||||
|
||||
The FPGA region will need to specify which bridges to control while programming
|
||||
the FPGA. The region driver can build a list of bridges during probe time
|
||||
@ -66,11 +66,11 @@ the list of bridges to program just before programming
|
||||
(:c:member:`fpga_region->get_bridges`). The FPGA bridge framework supplies the
|
||||
following APIs to handle building or tearing down that list.
|
||||
|
||||
* :c:func:`fpga_bridge_get_to_list` — Get a ref of an FPGA bridge, add it to a
|
||||
* fpga_bridge_get_to_list() — Get a ref of an FPGA bridge, add it to a
|
||||
list
|
||||
* :c:func:`of_fpga_bridge_get_to_list` — Get a ref of an FPGA bridge, add it to a
|
||||
* of_fpga_bridge_get_to_list() — Get a ref of an FPGA bridge, add it to a
|
||||
list, given a device node
|
||||
* :c:func:`fpga_bridges_put` — Given a list of bridges, put them
|
||||
* fpga_bridges_put() — Given a list of bridges, put them
|
||||
|
||||
.. kernel-doc:: include/linux/fpga/fpga-region.h
|
||||
:functions: fpga_region
|
||||
|
||||
@ -11,10 +11,10 @@ Industrial I/O Devices
|
||||
----------------------
|
||||
|
||||
* struct :c:type:`iio_dev` - industrial I/O device
|
||||
* :c:func:`iio_device_alloc()` - allocate an :c:type:`iio_dev` from a driver
|
||||
* :c:func:`iio_device_free()` - free an :c:type:`iio_dev` from a driver
|
||||
* :c:func:`iio_device_register()` - register a device with the IIO subsystem
|
||||
* :c:func:`iio_device_unregister()` - unregister a device from the IIO
|
||||
* iio_device_alloc() - allocate an :c:type:`iio_dev` from a driver
|
||||
* iio_device_free() - free an :c:type:`iio_dev` from a driver
|
||||
* iio_device_register() - register a device with the IIO subsystem
|
||||
* iio_device_unregister() - unregister a device from the IIO
|
||||
subsystem
|
||||
|
||||
An IIO device usually corresponds to a single hardware sensor and it
|
||||
@ -34,17 +34,17 @@ A typical IIO driver will register itself as an :doc:`I2C <../i2c>` or
|
||||
|
||||
At probe:
|
||||
|
||||
1. Call :c:func:`iio_device_alloc()`, which allocates memory for an IIO device.
|
||||
1. Call iio_device_alloc(), which allocates memory for an IIO device.
|
||||
2. Initialize IIO device fields with driver specific information (e.g.
|
||||
device name, device channels).
|
||||
3. Call :c:func:`iio_device_register()`, this registers the device with the
|
||||
3. Call iio_device_register(), this registers the device with the
|
||||
IIO core. After this call the device is ready to accept requests from user
|
||||
space applications.
|
||||
|
||||
At remove, we free the resources allocated in probe in reverse order:
|
||||
|
||||
1. :c:func:`iio_device_unregister()`, unregister the device from the IIO core.
|
||||
2. :c:func:`iio_device_free()`, free the memory allocated for the IIO device.
|
||||
1. iio_device_unregister(), unregister the device from the IIO core.
|
||||
2. iio_device_free(), free the memory allocated for the IIO device.
|
||||
|
||||
IIO device sysfs interface
|
||||
==========================
|
||||
|
||||
@ -3,7 +3,7 @@ NVMe Fault Injection
|
||||
Linux's fault injection framework provides a systematic way to support
|
||||
error injection via debugfs in the /sys/kernel/debug directory. When
|
||||
enabled, the default NVME_SC_INVALID_OPCODE with no retry will be
|
||||
injected into the nvme_end_request. Users can change the default status
|
||||
injected into the nvme_try_complete_req. Users can change the default status
|
||||
code and no retry flag via the debugfs. The list of Generic Command
|
||||
Status can be found in include/linux/nvme.h
|
||||
|
||||
|
||||
@ -110,13 +110,15 @@ The Amiga protection flags RWEDRWEDHSPARWED are handled as follows:
|
||||
|
||||
- R maps to r for user, group and others. On directories, R implies x.
|
||||
|
||||
- If both W and D are allowed, w will be set.
|
||||
- W maps to w.
|
||||
|
||||
- E maps to x.
|
||||
|
||||
- H and P are always retained and ignored under Linux.
|
||||
- D is ignored.
|
||||
|
||||
- A is always reset when a file is written to.
|
||||
- H, S and P are always retained and ignored under Linux.
|
||||
|
||||
- A is cleared when a file is written to.
|
||||
|
||||
User id and group id will be used unless set[gu]id are given as mount
|
||||
options. Since most of the Amiga file systems are single user systems
|
||||
@ -128,11 +130,13 @@ Linux -> Amiga:
|
||||
|
||||
The Linux rwxrwxrwx file mode is handled as follows:
|
||||
|
||||
- r permission will set R for user, group and others.
|
||||
- r permission will allow R for user, group and others.
|
||||
|
||||
- w permission will set W and D for user, group and others.
|
||||
- w permission will allow W for user, group and others.
|
||||
|
||||
- x permission of the user will set E for plain files.
|
||||
- x permission of the user will allow E for plain files.
|
||||
|
||||
- D will be allowed for user, group and others.
|
||||
|
||||
- All other flags (suid, sgid, ...) are ignored and will
|
||||
not be retained.
|
||||
|
||||
@ -68,7 +68,7 @@ See below for all known bank addresses, numbers of sensors in that bank,
|
||||
number of bytes data per sensor and contents/meaning of those bytes.
|
||||
|
||||
Although both this document and the kernel driver have kept the sensor
|
||||
terminoligy for the addressing within a bank this is not 100% correct, in
|
||||
terminology for the addressing within a bank this is not 100% correct, in
|
||||
bank 0x24 for example the addressing within the bank selects a PWM output not
|
||||
a sensor.
|
||||
|
||||
@ -155,7 +155,7 @@ After wider testing of the Linux kernel driver some variants of the uGuru have
|
||||
turned up which do not hold 0x08 at DATA within 250 reads after writing the
|
||||
bank address. With these versions this happens quite frequent, using larger
|
||||
timeouts doesn't help, they just go offline for a second or 2, doing some
|
||||
internal callibration or whatever. Your code should be prepared to handle
|
||||
internal calibration or whatever. Your code should be prepared to handle
|
||||
this and in case of no response in this specific case just goto sleep for a
|
||||
while and then retry.
|
||||
|
||||
@ -331,6 +331,6 @@ the voltage / clock programming out, I tried reading and only reading banks
|
||||
0-0x30 with the reading code used for the sensor banks (0x20-0x28) and this
|
||||
resulted in a _permanent_ reprogramming of the voltages, luckily I had the
|
||||
sensors part configured so that it would shutdown my system on any out of spec
|
||||
voltages which proprably safed my computer (after a reboot I managed to
|
||||
voltages which probably safed my computer (after a reboot I managed to
|
||||
immediately enter the bios and reload the defaults). This probably means that
|
||||
the read/write cycle for the non sensor part is different from the sensor part.
|
||||
|
||||
@ -17,7 +17,7 @@ Supported chips:
|
||||
Note:
|
||||
The uGuru is a microcontroller with onboard firmware which programs
|
||||
it to behave as a hwmon IC. There are many different revisions of the
|
||||
firmware and thus effectivly many different revisions of the uGuru.
|
||||
firmware and thus effectively many different revisions of the uGuru.
|
||||
Below is an incomplete list with which revisions are used for which
|
||||
Motherboards:
|
||||
|
||||
@ -33,7 +33,7 @@ Supported chips:
|
||||
sensortype (Volt or Temp) for bank1 sensors, for revision 1 uGuru's
|
||||
this does not always work. For these uGuru's the autodetection can
|
||||
be overridden with the bank1_types module param. For all 3 known
|
||||
revison 1 motherboards the correct use of this param is:
|
||||
revision 1 motherboards the correct use of this param is:
|
||||
bank1_types=1,1,0,0,0,0,0,2,0,0,0,0,2,0,0,1
|
||||
You may also need to specify the fan_sensors option for these boards
|
||||
fan_sensors=5
|
||||
|
||||
@ -13,7 +13,7 @@ Supported chips:
|
||||
Note:
|
||||
The uGuru is a microcontroller with onboard firmware which programs
|
||||
it to behave as a hwmon IC. There are many different revisions of the
|
||||
firmware and thus effectivly many different revisions of the uGuru.
|
||||
firmware and thus effectively many different revisions of the uGuru.
|
||||
Below is an incomplete list with which revisions are used for which
|
||||
Motherboards:
|
||||
|
||||
@ -24,7 +24,7 @@ Supported chips:
|
||||
- uGuru 3.0.0.0 ~ 3.0.x.x (AW8, AL8, AT8, NI8 SLI, AT8 32X, AN8 32X,
|
||||
AW9D-MAX)
|
||||
|
||||
The abituguru3 driver is only for revison 3.0.x.x motherboards,
|
||||
The abituguru3 driver is only for revision 3.0.x.x motherboards,
|
||||
this driver will not work on older motherboards. For older
|
||||
motherboards use the abituguru (without the 3 !) driver.
|
||||
|
||||
|
||||
@ -23,8 +23,8 @@ supports C and the GNU C extensions required by the kernel, and is pronounced
|
||||
Clang
|
||||
-----
|
||||
|
||||
The compiler used can be swapped out via `CC=` command line argument to `make`.
|
||||
`CC=` should be set when selecting a config and during a build.
|
||||
The compiler used can be swapped out via ``CC=`` command line argument to ``make``.
|
||||
``CC=`` should be set when selecting a config and during a build. ::
|
||||
|
||||
make CC=clang defconfig
|
||||
|
||||
@ -34,33 +34,33 @@ Cross Compiling
|
||||
---------------
|
||||
|
||||
A single Clang compiler binary will typically contain all supported backends,
|
||||
which can help simplify cross compiling.
|
||||
which can help simplify cross compiling. ::
|
||||
|
||||
ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make CC=clang
|
||||
|
||||
`CROSS_COMPILE` is not used to prefix the Clang compiler binary, instead
|
||||
`CROSS_COMPILE` is used to set a command line flag: `--target <triple>`. For
|
||||
example:
|
||||
``CROSS_COMPILE`` is not used to prefix the Clang compiler binary, instead
|
||||
``CROSS_COMPILE`` is used to set a command line flag: ``--target <triple>``. For
|
||||
example: ::
|
||||
|
||||
clang --target aarch64-linux-gnu foo.c
|
||||
|
||||
LLVM Utilities
|
||||
--------------
|
||||
|
||||
LLVM has substitutes for GNU binutils utilities. Kbuild supports `LLVM=1`
|
||||
to enable them.
|
||||
LLVM has substitutes for GNU binutils utilities. Kbuild supports ``LLVM=1``
|
||||
to enable them. ::
|
||||
|
||||
make LLVM=1
|
||||
|
||||
They can be enabled individually. The full list of the parameters:
|
||||
They can be enabled individually. The full list of the parameters: ::
|
||||
|
||||
make CC=clang LD=ld.lld AR=llvm-ar NM=llvm-nm STRIP=llvm-strip \\
|
||||
OBJCOPY=llvm-objcopy OBJDUMP=llvm-objdump OBJSIZE=llvm-size \\
|
||||
READELF=llvm-readelf HOSTCC=clang HOSTCXX=clang++ HOSTAR=llvm-ar \\
|
||||
make CC=clang LD=ld.lld AR=llvm-ar NM=llvm-nm STRIP=llvm-strip \
|
||||
OBJCOPY=llvm-objcopy OBJDUMP=llvm-objdump OBJSIZE=llvm-size \
|
||||
READELF=llvm-readelf HOSTCC=clang HOSTCXX=clang++ HOSTAR=llvm-ar \
|
||||
HOSTLD=ld.lld
|
||||
|
||||
Currently, the integrated assembler is disabled by default. You can pass
|
||||
`LLVM_IAS=1` to enable it.
|
||||
``LLVM_IAS=1`` to enable it.
|
||||
|
||||
Getting Help
|
||||
------------
|
||||
|
||||
@ -16,7 +16,7 @@ This document describes the Linux kernel Makefiles.
|
||||
--- 3.5 Library file goals - lib-y
|
||||
--- 3.6 Descending down in directories
|
||||
--- 3.7 Compilation flags
|
||||
--- 3.8 Command line dependency
|
||||
--- 3.8 <deleted>
|
||||
--- 3.9 Dependency tracking
|
||||
--- 3.10 Special Rules
|
||||
--- 3.11 $(CC) support functions
|
||||
@ -39,8 +39,8 @@ This document describes the Linux kernel Makefiles.
|
||||
|
||||
=== 7 Architecture Makefiles
|
||||
--- 7.1 Set variables to tweak the build to the architecture
|
||||
--- 7.2 Add prerequisites to archheaders:
|
||||
--- 7.3 Add prerequisites to archprepare:
|
||||
--- 7.2 Add prerequisites to archheaders
|
||||
--- 7.3 Add prerequisites to archprepare
|
||||
--- 7.4 List directories to visit when descending
|
||||
--- 7.5 Architecture-specific boot images
|
||||
--- 7.6 Building non-kbuild targets
|
||||
@ -129,7 +129,7 @@ The preferred name for the kbuild files are 'Makefile' but 'Kbuild' can
|
||||
be used and if both a 'Makefile' and a 'Kbuild' file exists, then the 'Kbuild'
|
||||
file will be used.
|
||||
|
||||
Section 3.1 "Goal definitions" is a quick intro, further chapters provide
|
||||
Section 3.1 "Goal definitions" is a quick intro; further chapters provide
|
||||
more details, with real examples.
|
||||
|
||||
3.1 Goal definitions
|
||||
@ -965,7 +965,7 @@ When kbuild executes, the following steps are followed (roughly):
|
||||
KBUILD_LDFLAGS := -m elf_s390
|
||||
|
||||
Note: ldflags-y can be used to further customise
|
||||
the flags used. See chapter 3.7.
|
||||
the flags used. See section 3.7.
|
||||
|
||||
LDFLAGS_vmlinux
|
||||
Options for $(LD) when linking vmlinux
|
||||
@ -1121,7 +1121,7 @@ When kbuild executes, the following steps are followed (roughly):
|
||||
|
||||
In this example, the file target maketools will be processed
|
||||
before descending down in the subdirectories.
|
||||
See also chapter XXX-TODO that describe how kbuild supports
|
||||
See also chapter XXX-TODO that describes how kbuild supports
|
||||
generating offset header files.
|
||||
|
||||
|
||||
@ -1261,7 +1261,7 @@ When kbuild executes, the following steps are followed (roughly):
|
||||
always be built.
|
||||
Assignments to $(targets) are without $(obj)/ prefix.
|
||||
if_changed may be used in conjunction with custom commands as
|
||||
defined in 6.8 "Custom kbuild commands".
|
||||
defined in 7.8 "Custom kbuild commands".
|
||||
|
||||
Note: It is a typical mistake to forget the FORCE prerequisite.
|
||||
Another common pitfall is that whitespace is sometimes
|
||||
@ -1411,7 +1411,7 @@ When kbuild executes, the following steps are followed (roughly):
|
||||
that may be shared between individual architectures.
|
||||
The recommended approach how to use a generic header file is
|
||||
to list the file in the Kbuild file.
|
||||
See "7.2 generic-y" for further info on syntax etc.
|
||||
See "8.2 generic-y" for further info on syntax etc.
|
||||
|
||||
7.11 Post-link pass
|
||||
-------------------
|
||||
@ -1601,4 +1601,4 @@ is the right choice.
|
||||
|
||||
- Describe how kbuild supports shipped files with _shipped.
|
||||
- Generating offset header files.
|
||||
- Add more variables to section 7?
|
||||
- Add more variables to chapters 7 or 9?
|
||||
|
||||
@ -164,14 +164,14 @@ by disabling preemption or interrupts.
|
||||
On non-PREEMPT_RT kernels local_lock operations map to the preemption and
|
||||
interrupt disabling and enabling primitives:
|
||||
|
||||
=========================== ======================
|
||||
local_lock(&llock) preempt_disable()
|
||||
local_unlock(&llock) preempt_enable()
|
||||
local_lock_irq(&llock) local_irq_disable()
|
||||
local_unlock_irq(&llock) local_irq_enable()
|
||||
local_lock_save(&llock) local_irq_save()
|
||||
local_lock_restore(&llock) local_irq_save()
|
||||
=========================== ======================
|
||||
=============================== ======================
|
||||
local_lock(&llock) preempt_disable()
|
||||
local_unlock(&llock) preempt_enable()
|
||||
local_lock_irq(&llock) local_irq_disable()
|
||||
local_unlock_irq(&llock) local_irq_enable()
|
||||
local_lock_irqsave(&llock) local_irq_save()
|
||||
local_unlock_irqrestore(&llock) local_irq_restore()
|
||||
=============================== ======================
|
||||
|
||||
The named scope of local_lock has two advantages over the regular
|
||||
primitives:
|
||||
@ -353,14 +353,14 @@ protection scope. So the following substitution is wrong::
|
||||
{
|
||||
local_irq_save(flags); -> local_lock_irqsave(&local_lock_1, flags);
|
||||
func3();
|
||||
local_irq_restore(flags); -> local_lock_irqrestore(&local_lock_1, flags);
|
||||
local_irq_restore(flags); -> local_unlock_irqrestore(&local_lock_1, flags);
|
||||
}
|
||||
|
||||
func2()
|
||||
{
|
||||
local_irq_save(flags); -> local_lock_irqsave(&local_lock_2, flags);
|
||||
func3();
|
||||
local_irq_restore(flags); -> local_lock_irqrestore(&local_lock_2, flags);
|
||||
local_irq_restore(flags); -> local_unlock_irqrestore(&local_lock_2, flags);
|
||||
}
|
||||
|
||||
func3()
|
||||
@ -379,14 +379,14 @@ PREEMPT_RT-specific semantics of spinlock_t. The correct substitution is::
|
||||
{
|
||||
local_irq_save(flags); -> local_lock_irqsave(&local_lock, flags);
|
||||
func3();
|
||||
local_irq_restore(flags); -> local_lock_irqrestore(&local_lock, flags);
|
||||
local_irq_restore(flags); -> local_unlock_irqrestore(&local_lock, flags);
|
||||
}
|
||||
|
||||
func2()
|
||||
{
|
||||
local_irq_save(flags); -> local_lock_irqsave(&local_lock, flags);
|
||||
func3();
|
||||
local_irq_restore(flags); -> local_lock_irqrestore(&local_lock, flags);
|
||||
local_irq_restore(flags); -> local_unlock_irqrestore(&local_lock, flags);
|
||||
}
|
||||
|
||||
func3()
|
||||
|
||||
@ -101,3 +101,4 @@ to do something different in the near future.
|
||||
|
||||
../doc-guide/maintainer-profile
|
||||
../nvdimm/maintainer-entry-profile
|
||||
../riscv/patch-acceptance
|
||||
|
||||
@ -180,7 +180,7 @@ The configuration can only be set up via VLAN tagging and bridge setup.
|
||||
|
||||
# bring up the slave interfaces
|
||||
ip link set lan1 up
|
||||
ip link set lan1 up
|
||||
ip link set lan2 up
|
||||
ip link set lan3 up
|
||||
|
||||
# create bridge
|
||||
|
||||
@ -49,16 +49,18 @@ Register preservation rules
|
||||
Register preservation rules match the ELF ABI calling sequence with the
|
||||
following differences:
|
||||
|
||||
=========== ============= ========================================
|
||||
--- For the sc instruction, differences with the ELF ABI ---
|
||||
=========== ============= ========================================
|
||||
r0 Volatile (System call number.)
|
||||
r3 Volatile (Parameter 1, and return value.)
|
||||
r4-r8 Volatile (Parameters 2-6.)
|
||||
cr0 Volatile (cr0.SO is the return error condition.)
|
||||
cr1, cr5-7 Nonvolatile
|
||||
lr Nonvolatile
|
||||
=========== ============= ========================================
|
||||
|
||||
--- For the scv 0 instruction, differences with the ELF ABI ---
|
||||
=========== ============= ========================================
|
||||
r0 Volatile (System call number.)
|
||||
r3 Volatile (Parameter 1, and return value.)
|
||||
r4-r8 Volatile (Parameters 2-6.)
|
||||
|
||||
@ -142,7 +142,7 @@ only NUL-terminated strings. The safe replacement is strscpy().
|
||||
(Users of strscpy() still needing NUL-padding should instead
|
||||
use strscpy_pad().)
|
||||
|
||||
If a caller is using non-NUL-terminated strings, strncpy()() can
|
||||
If a caller is using non-NUL-terminated strings, strncpy() can
|
||||
still be used, but destinations should be marked with the `__nonstring
|
||||
<https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html>`_
|
||||
attribute to avoid future compiler warnings.
|
||||
|
||||
@ -332,7 +332,7 @@ WO 9901953 (A1)
|
||||
|
||||
|
||||
US Patents (https://www.uspto.gov/)
|
||||
----------------------------------
|
||||
-----------------------------------
|
||||
|
||||
US 5925841
|
||||
Digital Sampling Instrument employing cache memory (Jul. 20, 1999)
|
||||
|
||||
@ -337,7 +337,7 @@ WO 9901953 (A1)
|
||||
|
||||
|
||||
US Patents (https://www.uspto.gov/)
|
||||
----------------------------------
|
||||
-----------------------------------
|
||||
|
||||
US 5925841
|
||||
Digital Sampling Instrument employing cache memory (Jul. 20, 1999)
|
||||
|
||||
@ -143,7 +143,7 @@ timestamp shows when the information is put together by the driver
|
||||
before returning from the ``STATUS`` and ``STATUS_EXT`` ioctl. in most cases
|
||||
this driver_timestamp will be identical to the regular system tstamp.
|
||||
|
||||
Examples of typestamping with HDaudio:
|
||||
Examples of timestamping with HDAudio:
|
||||
|
||||
1. DMA timestamp, no compensation for DMA+analog delay
|
||||
::
|
||||
|
||||
@ -130,7 +130,7 @@ chi usa solo stringe terminate. La versione sicura da usare è
|
||||
strscpy(). (chi usa strscpy() e necessita di estendere la
|
||||
terminazione con NUL deve aggiungere una chiamata a memset())
|
||||
|
||||
Se il chiamate no usa stringhe terminate con NUL, allore strncpy()()
|
||||
Se il chiamate no usa stringhe terminate con NUL, allore strncpy()
|
||||
può continuare ad essere usata, ma i buffer di destinazione devono essere
|
||||
marchiati con l'attributo `__nonstring <https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html>`_
|
||||
per evitare avvisi durante la compilazione.
|
||||
|
||||
40
MAINTAINERS
40
MAINTAINERS
@ -3205,6 +3205,7 @@ S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git
|
||||
F: block/
|
||||
F: drivers/block/
|
||||
F: include/linux/blk*
|
||||
F: kernel/trace/blktrace.c
|
||||
F: lib/sbitmap.c
|
||||
|
||||
@ -3388,6 +3389,7 @@ M: Florian Fainelli <f.fainelli@gmail.com>
|
||||
L: netdev@vger.kernel.org
|
||||
L: openwrt-devel@lists.openwrt.org (subscribers-only)
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/net/dsa/b53.txt
|
||||
F: drivers/net/dsa/b53/*
|
||||
F: include/linux/platform_data/b53.h
|
||||
|
||||
@ -3573,13 +3575,28 @@ L: bcm-kernel-feedback-list@broadcom.com
|
||||
S: Maintained
|
||||
F: drivers/phy/broadcom/phy-brcm-usb*
|
||||
|
||||
BROADCOM ETHERNET PHY DRIVERS
|
||||
M: Florian Fainelli <f.fainelli@gmail.com>
|
||||
L: bcm-kernel-feedback-list@broadcom.com
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/net/broadcom-bcm87xx.txt
|
||||
F: drivers/net/phy/bcm*.[ch]
|
||||
F: drivers/net/phy/broadcom.c
|
||||
F: include/linux/brcmphy.h
|
||||
|
||||
BROADCOM GENET ETHERNET DRIVER
|
||||
M: Doug Berger <opendmb@gmail.com>
|
||||
M: Florian Fainelli <f.fainelli@gmail.com>
|
||||
L: bcm-kernel-feedback-list@broadcom.com
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/net/brcm,bcmgenet.txt
|
||||
F: Documentation/devicetree/bindings/net/brcm,unimac-mdio.txt
|
||||
F: drivers/net/ethernet/broadcom/genet/
|
||||
F: drivers/net/mdio/mdio-bcm-unimac.c
|
||||
F: include/linux/platform_data/bcmgenet.h
|
||||
F: include/linux/platform_data/mdio-bcm-unimac.h
|
||||
|
||||
BROADCOM IPROC ARM ARCHITECTURE
|
||||
M: Ray Jui <rjui@broadcom.com>
|
||||
@ -5248,6 +5265,7 @@ DOCUMENTATION
|
||||
M: Jonathan Corbet <corbet@lwn.net>
|
||||
L: linux-doc@vger.kernel.org
|
||||
S: Maintained
|
||||
P: Documentation/doc-guide/maintainer-profile.rst
|
||||
T: git git://git.lwn.net/linux.git docs-next
|
||||
F: Documentation/
|
||||
F: scripts/documentation-file-ref-check
|
||||
@ -6503,7 +6521,6 @@ F: net/bridge/
|
||||
|
||||
ETHERNET PHY LIBRARY
|
||||
M: Andrew Lunn <andrew@lunn.ch>
|
||||
M: Florian Fainelli <f.fainelli@gmail.com>
|
||||
M: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
R: Russell King <linux@armlinux.org.uk>
|
||||
L: netdev@vger.kernel.org
|
||||
@ -13588,12 +13605,18 @@ F: kernel/events/*
|
||||
F: tools/lib/perf/
|
||||
F: tools/perf/
|
||||
|
||||
PERFORMANCE EVENTS SUBSYSTEM ARM64 PMU EVENTS
|
||||
PERFORMANCE EVENTS TOOLING ARM64
|
||||
R: John Garry <john.garry@huawei.com>
|
||||
R: Will Deacon <will@kernel.org>
|
||||
R: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
R: Leo Yan <leo.yan@linaro.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: tools/build/feature/test-libopencsd.c
|
||||
F: tools/perf/arch/arm*/
|
||||
F: tools/perf/pmu-events/arch/arm64/
|
||||
F: tools/perf/util/arm-spe*
|
||||
F: tools/perf/util/cs-etm*
|
||||
|
||||
PERSONALITY HANDLING
|
||||
M: Christoph Hellwig <hch@infradead.org>
|
||||
@ -17136,8 +17159,8 @@ S: Maintained
|
||||
F: Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml
|
||||
F: Documentation/devicetree/bindings/arm/keystone/ti,sci.txt
|
||||
F: Documentation/devicetree/bindings/clock/ti,sci-clk.txt
|
||||
F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.txt
|
||||
F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt
|
||||
F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml
|
||||
F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml
|
||||
F: Documentation/devicetree/bindings/reset/ti,sci-reset.txt
|
||||
F: Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
|
||||
F: drivers/clk/keystone/sci-clk.c
|
||||
@ -18894,6 +18917,15 @@ S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/core
|
||||
F: arch/x86/platform
|
||||
|
||||
X86 PLATFORM UV HPE SUPERDOME FLEX
|
||||
M: Steve Wahl <steve.wahl@hpe.com>
|
||||
R: Dimitri Sivanich <dimitri.sivanich@hpe.com>
|
||||
R: Russ Anderson <russ.anderson@hpe.com>
|
||||
S: Supported
|
||||
F: arch/x86/include/asm/uv/
|
||||
F: arch/x86/kernel/apic/x2apic_uv_x.c
|
||||
F: arch/x86/platform/uv/
|
||||
|
||||
X86 VDSO
|
||||
M: Andy Lutomirski <luto@kernel.org>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
|
||||
2
Makefile
2
Makefile
@ -2,7 +2,7 @@
|
||||
VERSION = 5
|
||||
PATCHLEVEL = 9
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc1
|
||||
EXTRAVERSION = -rc3
|
||||
NAME = Kleptomaniac Octopus
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
||||
@ -212,7 +212,7 @@ apply_relocate_add(Elf64_Shdr *sechdrs, const char *strtab,
|
||||
STO_ALPHA_STD_GPLOAD)
|
||||
/* Omit the prologue. */
|
||||
value += 8;
|
||||
/* FALLTHRU */
|
||||
fallthrough;
|
||||
case R_ALPHA_BRADDR:
|
||||
value -= (u64)location + 4;
|
||||
if (value & 3)
|
||||
|
||||
@ -453,7 +453,7 @@ syscall_restart(unsigned long r0, unsigned long r19,
|
||||
regs->r0 = EINTR;
|
||||
break;
|
||||
}
|
||||
/* fallthrough */
|
||||
fallthrough;
|
||||
case ERESTARTNOINTR:
|
||||
regs->r0 = r0; /* reset v0 and a3 and replay syscall */
|
||||
regs->r19 = r19;
|
||||
|
||||
@ -883,7 +883,7 @@ do_entUnaUser(void __user * va, unsigned long opcode,
|
||||
|
||||
case 0x26: /* sts */
|
||||
fake_reg = s_reg_to_mem(alpha_read_fp_reg(reg));
|
||||
/* FALLTHRU */
|
||||
fallthrough;
|
||||
|
||||
case 0x2c: /* stl */
|
||||
__asm__ __volatile__(
|
||||
@ -911,7 +911,7 @@ do_entUnaUser(void __user * va, unsigned long opcode,
|
||||
|
||||
case 0x27: /* stt */
|
||||
fake_reg = alpha_read_fp_reg(reg);
|
||||
/* FALLTHRU */
|
||||
fallthrough;
|
||||
|
||||
case 0x2d: /* stq */
|
||||
__asm__ __volatile__(
|
||||
|
||||
@ -339,7 +339,7 @@ void __kprobes disasm_instr(unsigned long addr, struct disasm_state *state,
|
||||
|
||||
case op_LDWX_S: /* LDWX_S c, [b, u6] */
|
||||
state->x = 1;
|
||||
/* intentional fall-through */
|
||||
fallthrough;
|
||||
|
||||
case op_LDW_S: /* LDW_S c, [b, u6] */
|
||||
state->zz = 2;
|
||||
|
||||
@ -321,7 +321,7 @@ static void arc_restart_syscall(struct k_sigaction *ka, struct pt_regs *regs)
|
||||
regs->r0 = -EINTR;
|
||||
break;
|
||||
}
|
||||
/* fallthrough */
|
||||
fallthrough;
|
||||
|
||||
case -ERESTARTNOINTR:
|
||||
/*
|
||||
|
||||
@ -572,7 +572,7 @@ static unsigned long read_pointer(const u8 **pLoc, const void *end,
|
||||
#else
|
||||
BUILD_BUG_ON(sizeof(u32) != sizeof(value));
|
||||
#endif
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
case DW_EH_PE_native:
|
||||
if (end < (const void *)(ptr.pul + 1))
|
||||
return 0;
|
||||
@ -827,7 +827,7 @@ static int processCFI(const u8 *start, const u8 *end, unsigned long targetLoc,
|
||||
case DW_CFA_def_cfa:
|
||||
state->cfa.reg = get_uleb128(&ptr.p8, end);
|
||||
unw_debug("cfa_def_cfa: r%lu ", state->cfa.reg);
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case DW_CFA_def_cfa_offset:
|
||||
state->cfa.offs = get_uleb128(&ptr.p8, end);
|
||||
unw_debug("cfa_def_cfa_offset: 0x%lx ",
|
||||
@ -835,7 +835,7 @@ static int processCFI(const u8 *start, const u8 *end, unsigned long targetLoc,
|
||||
break;
|
||||
case DW_CFA_def_cfa_sf:
|
||||
state->cfa.reg = get_uleb128(&ptr.p8, end);
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case DW_CFA_def_cfa_offset_sf:
|
||||
state->cfa.offs = get_sleb128(&ptr.p8, end)
|
||||
* state->dataAlign;
|
||||
|
||||
@ -547,7 +547,7 @@ static int arch_build_bp_info(struct perf_event *bp,
|
||||
if ((hw->ctrl.type != ARM_BREAKPOINT_EXECUTE)
|
||||
&& max_watchpoint_len >= 8)
|
||||
break;
|
||||
/* Else, fall through */
|
||||
fallthrough;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
@ -612,12 +612,12 @@ int hw_breakpoint_arch_parse(struct perf_event *bp,
|
||||
/* Allow halfword watchpoints and breakpoints. */
|
||||
if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2)
|
||||
break;
|
||||
/* Else, fall through */
|
||||
fallthrough;
|
||||
case 3:
|
||||
/* Allow single byte watchpoint. */
|
||||
if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1)
|
||||
break;
|
||||
/* Else, fall through */
|
||||
fallthrough;
|
||||
default:
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
@ -884,7 +884,7 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr,
|
||||
break;
|
||||
case ARM_ENTRY_ASYNC_WATCHPOINT:
|
||||
WARN(1, "Asynchronous watchpoint exception taken. Debugging results may be unreliable\n");
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
case ARM_ENTRY_SYNC_WATCHPOINT:
|
||||
watchpoint_handler(addr, fsr, regs);
|
||||
break;
|
||||
@ -933,7 +933,7 @@ static bool core_has_os_save_restore(void)
|
||||
ARM_DBG_READ(c1, c1, 4, oslsr);
|
||||
if (oslsr & ARM_OSLSR_OSLM0)
|
||||
return true;
|
||||
/* Else, fall through */
|
||||
fallthrough;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -596,7 +596,7 @@ static int do_signal(struct pt_regs *regs, int syscall)
|
||||
switch (retval) {
|
||||
case -ERESTART_RESTARTBLOCK:
|
||||
restart -= 2;
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
case -ERESTARTNOHAND:
|
||||
case -ERESTARTSYS:
|
||||
case -ERESTARTNOINTR:
|
||||
|
||||
@ -49,7 +49,7 @@ static int crunch_do(struct notifier_block *self, unsigned long cmd, void *t)
|
||||
* FALLTHROUGH: Ensure we don't try to overwrite our newly
|
||||
* initialised state information on the first fault.
|
||||
*/
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
|
||||
case THREAD_NOTIFY_EXIT:
|
||||
crunch_task_release(thread);
|
||||
|
||||
@ -123,19 +123,19 @@ void mmp2_pm_enter_lowpower_mode(int state)
|
||||
case POWER_MODE_SYS_SLEEP:
|
||||
apcr |= MPMU_PCR_PJ_SLPEN; /* set the SLPEN bit */
|
||||
apcr |= MPMU_PCR_PJ_VCTCXOSD; /* set VCTCXOSD */
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case POWER_MODE_CHIP_SLEEP:
|
||||
apcr |= MPMU_PCR_PJ_SLPEN;
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case POWER_MODE_APPS_SLEEP:
|
||||
apcr |= MPMU_PCR_PJ_APBSD; /* set APBSD */
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case POWER_MODE_APPS_IDLE:
|
||||
apcr |= MPMU_PCR_PJ_AXISD; /* set AXISDD bit */
|
||||
apcr |= MPMU_PCR_PJ_DDRCORSD; /* set DDRCORSD bit */
|
||||
idle_cfg |= APMU_PJ_IDLE_CFG_PJ_PWRDWN; /* PJ power down */
|
||||
apcr |= MPMU_PCR_PJ_SPSD;
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case POWER_MODE_CORE_EXTIDLE:
|
||||
idle_cfg |= APMU_PJ_IDLE_CFG_PJ_IDLE; /* set the IDLE bit */
|
||||
idle_cfg &= ~APMU_PJ_IDLE_CFG_ISO_MODE_CNTRL_MASK;
|
||||
|
||||
@ -145,23 +145,23 @@ void pxa910_pm_enter_lowpower_mode(int state)
|
||||
case POWER_MODE_UDR:
|
||||
/* only shutdown APB in UDR */
|
||||
apcr |= MPMU_APCR_STBYEN | MPMU_APCR_APBSD;
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case POWER_MODE_SYS_SLEEP:
|
||||
apcr |= MPMU_APCR_SLPEN; /* set the SLPEN bit */
|
||||
apcr |= MPMU_APCR_VCTCXOSD; /* set VCTCXOSD */
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case POWER_MODE_APPS_SLEEP:
|
||||
apcr |= MPMU_APCR_DDRCORSD; /* set DDRCORSD */
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case POWER_MODE_APPS_IDLE:
|
||||
apcr |= MPMU_APCR_AXISD; /* set AXISDD bit */
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case POWER_MODE_CORE_EXTIDLE:
|
||||
idle_cfg |= APMU_MOH_IDLE_CFG_MOH_IDLE;
|
||||
idle_cfg |= APMU_MOH_IDLE_CFG_MOH_PWRDWN;
|
||||
idle_cfg |= APMU_MOH_IDLE_CFG_MOH_PWR_SW(3)
|
||||
| APMU_MOH_IDLE_CFG_MOH_L2_PWR_SW(3);
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case POWER_MODE_CORE_INTIDLE:
|
||||
break;
|
||||
}
|
||||
|
||||
@ -396,7 +396,6 @@ void __init omap3xxx_check_revision(void)
|
||||
cpu_rev = "3.1";
|
||||
break;
|
||||
case 7:
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
/* Use the latest known revision as default */
|
||||
omap_revision = OMAP3430_REV_ES3_1_2;
|
||||
@ -416,7 +415,6 @@ void __init omap3xxx_check_revision(void)
|
||||
cpu_rev = "1.0";
|
||||
break;
|
||||
case 1:
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
omap_revision = AM35XX_REV_ES1_1;
|
||||
cpu_rev = "1.1";
|
||||
@ -435,7 +433,6 @@ void __init omap3xxx_check_revision(void)
|
||||
cpu_rev = "1.1";
|
||||
break;
|
||||
case 2:
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
omap_revision = OMAP3630_REV_ES1_2;
|
||||
cpu_rev = "1.2";
|
||||
@ -456,7 +453,6 @@ void __init omap3xxx_check_revision(void)
|
||||
cpu_rev = "2.0";
|
||||
break;
|
||||
case 3:
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
omap_revision = TI8168_REV_ES2_1;
|
||||
cpu_rev = "2.1";
|
||||
@ -473,7 +469,6 @@ void __init omap3xxx_check_revision(void)
|
||||
cpu_rev = "2.0";
|
||||
break;
|
||||
case 2:
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
omap_revision = AM335X_REV_ES2_1;
|
||||
cpu_rev = "2.1";
|
||||
@ -491,7 +486,6 @@ void __init omap3xxx_check_revision(void)
|
||||
cpu_rev = "1.1";
|
||||
break;
|
||||
case 2:
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
omap_revision = AM437X_REV_ES1_2;
|
||||
cpu_rev = "1.2";
|
||||
@ -502,7 +496,6 @@ void __init omap3xxx_check_revision(void)
|
||||
case 0xb968:
|
||||
switch (rev) {
|
||||
case 0:
|
||||
/* FALLTHROUGH */
|
||||
case 1:
|
||||
omap_revision = TI8148_REV_ES1_0;
|
||||
cpu_rev = "1.0";
|
||||
@ -512,7 +505,6 @@ void __init omap3xxx_check_revision(void)
|
||||
cpu_rev = "2.0";
|
||||
break;
|
||||
case 3:
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
omap_revision = TI8148_REV_ES2_1;
|
||||
cpu_rev = "2.1";
|
||||
|
||||
@ -240,7 +240,7 @@ static int _omap_device_notifier_call(struct notifier_block *nb,
|
||||
if (pdev->dev.of_node)
|
||||
omap_device_build_from_dt(pdev);
|
||||
omap_auxdata_legacy_init(dev);
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
default:
|
||||
od = to_omap_device(pdev);
|
||||
if (od)
|
||||
|
||||
@ -298,11 +298,7 @@ static void omap3_pm_idle(void)
|
||||
if (omap_irq_pending())
|
||||
return;
|
||||
|
||||
trace_cpu_idle_rcuidle(1, smp_processor_id());
|
||||
|
||||
omap_sram_idle();
|
||||
|
||||
trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SUSPEND
|
||||
|
||||
@ -624,7 +624,7 @@ static void __init dns323_init(void)
|
||||
dns323ab_leds[0].active_low = 1;
|
||||
gpio_request(DNS323_GPIO_LED_POWER1, "Power Led Enable");
|
||||
gpio_direction_output(DNS323_GPIO_LED_POWER1, 0);
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
case DNS323_REV_B1:
|
||||
i2c_register_board_info(0, dns323ab_i2c_devices,
|
||||
ARRAY_SIZE(dns323ab_i2c_devices));
|
||||
|
||||
@ -46,7 +46,7 @@ static int __init parse_tag_acorn(const struct tag *tag)
|
||||
switch (tag->u.acorn.vram_pages) {
|
||||
case 512:
|
||||
vram_size += PAGE_SIZE * 256;
|
||||
/* Fall through - ??? */
|
||||
fallthrough; /* ??? */
|
||||
case 256:
|
||||
vram_size += PAGE_SIZE * 256;
|
||||
default:
|
||||
|
||||
@ -70,7 +70,7 @@ static void __init tegra_cpu_reset_handler_enable(void)
|
||||
switch (err) {
|
||||
case -ENOSYS:
|
||||
tegra_cpu_reset_handler_set(reset_address);
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case 0:
|
||||
is_enabled = true;
|
||||
break;
|
||||
|
||||
@ -694,7 +694,7 @@ thumb2arm(u16 tinstr)
|
||||
return subset[(L<<1) | ((tinstr & (1<<8)) >> 8)] |
|
||||
(tinstr & 255); /* register_list */
|
||||
}
|
||||
/* Else, fall through - for illegal instruction case */
|
||||
fallthrough; /* for illegal instruction case */
|
||||
|
||||
default:
|
||||
return BAD_INSTR;
|
||||
@ -750,7 +750,7 @@ do_alignment_t32_to_handler(u32 *pinstr, struct pt_regs *regs,
|
||||
case 0xe8e0:
|
||||
case 0xe9e0:
|
||||
poffset->un = (tinst2 & 0xff) << 2;
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
|
||||
case 0xe940:
|
||||
case 0xe9c0:
|
||||
|
||||
@ -71,7 +71,7 @@ static void cpu_v7_spectre_init(void)
|
||||
/* Other ARM CPUs require no workaround */
|
||||
if (read_cpuid_implementor() == ARM_CPU_IMP_ARM)
|
||||
break;
|
||||
/* fallthrough */
|
||||
fallthrough;
|
||||
/* Cortex A57/A72 require firmware workaround */
|
||||
case ARM_CPU_PART_CORTEX_A57:
|
||||
case ARM_CPU_PART_CORTEX_A72: {
|
||||
|
||||
@ -309,14 +309,14 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
|
||||
* not supported by current hardware on OMAP1
|
||||
* w |= (0x03 << 7);
|
||||
*/
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case OMAP_DMA_DATA_BURST_16:
|
||||
if (dma_omap2plus()) {
|
||||
burst = 0x3;
|
||||
break;
|
||||
}
|
||||
/* OMAP1 don't support burst 16 */
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
default:
|
||||
BUG();
|
||||
}
|
||||
@ -393,7 +393,7 @@ void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
|
||||
break;
|
||||
}
|
||||
/* OMAP1 don't support burst 16 */
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
default:
|
||||
printk(KERN_ERR "Invalid DMA burst mode\n");
|
||||
BUG();
|
||||
|
||||
@ -307,7 +307,7 @@ static bool __kprobes decode_regs(probes_opcode_t *pinsn, u32 regs, bool modify)
|
||||
case REG_TYPE_NOPCWB:
|
||||
if (!is_writeback(insn))
|
||||
break; /* No writeback, so any register is OK */
|
||||
/* fall through... */
|
||||
fallthrough;
|
||||
case REG_TYPE_NOPC:
|
||||
case REG_TYPE_NOPCX:
|
||||
/* Reject PC (R15) */
|
||||
|
||||
@ -280,7 +280,7 @@ void __kprobes kprobe_handler(struct pt_regs *regs)
|
||||
/* A nested probe was hit in FIQ, it is a BUG */
|
||||
pr_warn("Unrecoverable kprobe detected.\n");
|
||||
dump_kprobe(p);
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
default:
|
||||
/* impossible cases */
|
||||
BUG();
|
||||
|
||||
@ -82,8 +82,8 @@ endif
|
||||
# compiler to generate them and consequently to break the single image contract
|
||||
# we pass it only to the assembler. This option is utilized only in case of non
|
||||
# integrated assemblers.
|
||||
ifneq ($(CONFIG_AS_HAS_ARMV8_4), y)
|
||||
branch-prot-flags-$(CONFIG_AS_HAS_PAC) += -Wa,-march=armv8.3-a
|
||||
ifeq ($(CONFIG_AS_HAS_PAC), y)
|
||||
asm-arch := armv8.3-a
|
||||
endif
|
||||
endif
|
||||
|
||||
@ -91,7 +91,12 @@ KBUILD_CFLAGS += $(branch-prot-flags-y)
|
||||
|
||||
ifeq ($(CONFIG_AS_HAS_ARMV8_4), y)
|
||||
# make sure to pass the newest target architecture to -march.
|
||||
KBUILD_CFLAGS += -Wa,-march=armv8.4-a
|
||||
asm-arch := armv8.4-a
|
||||
endif
|
||||
|
||||
ifdef asm-arch
|
||||
KBUILD_CFLAGS += -Wa,-march=$(asm-arch) \
|
||||
-DARM64_ASM_ARCH='"$(asm-arch)"'
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_SHADOW_CALL_STACK), y)
|
||||
@ -165,7 +170,8 @@ zinstall install:
|
||||
PHONY += vdso_install
|
||||
vdso_install:
|
||||
$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso $@
|
||||
$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso32 $@
|
||||
$(if $(CONFIG_COMPAT_VDSO), \
|
||||
$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso32 $@)
|
||||
|
||||
# We use MRPROPER_FILES and CLEAN_FILES now
|
||||
archclean:
|
||||
|
||||
@ -686,6 +686,8 @@ mmc0: mmc@11230000 {
|
||||
clocks = <&pericfg CLK_PERI_MSDC30_0_PD>,
|
||||
<&topckgen CLK_TOP_MSDC50_0_SEL>;
|
||||
clock-names = "source", "hclk";
|
||||
resets = <&pericfg MT7622_PERI_MSDC0_SW_RST>;
|
||||
reset-names = "hrst";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
||||
@ -337,8 +337,9 @@ sdmmc1: mmc@3400000 {
|
||||
compatible = "nvidia,tegra186-sdhci";
|
||||
reg = <0x0 0x03400000 0x0 0x10000>;
|
||||
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&bpmp TEGRA186_CLK_SDMMC1>;
|
||||
clock-names = "sdhci";
|
||||
clocks = <&bpmp TEGRA186_CLK_SDMMC1>,
|
||||
<&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
resets = <&bpmp TEGRA186_RESET_SDMMC1>;
|
||||
reset-names = "sdhci";
|
||||
interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCRA &emc>,
|
||||
@ -366,8 +367,9 @@ sdmmc2: mmc@3420000 {
|
||||
compatible = "nvidia,tegra186-sdhci";
|
||||
reg = <0x0 0x03420000 0x0 0x10000>;
|
||||
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&bpmp TEGRA186_CLK_SDMMC2>;
|
||||
clock-names = "sdhci";
|
||||
clocks = <&bpmp TEGRA186_CLK_SDMMC2>,
|
||||
<&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
resets = <&bpmp TEGRA186_RESET_SDMMC2>;
|
||||
reset-names = "sdhci";
|
||||
interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCRAA &emc>,
|
||||
@ -390,8 +392,9 @@ sdmmc3: mmc@3440000 {
|
||||
compatible = "nvidia,tegra186-sdhci";
|
||||
reg = <0x0 0x03440000 0x0 0x10000>;
|
||||
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&bpmp TEGRA186_CLK_SDMMC3>;
|
||||
clock-names = "sdhci";
|
||||
clocks = <&bpmp TEGRA186_CLK_SDMMC3>,
|
||||
<&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
resets = <&bpmp TEGRA186_RESET_SDMMC3>;
|
||||
reset-names = "sdhci";
|
||||
interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCR &emc>,
|
||||
@ -416,8 +419,9 @@ sdmmc4: mmc@3460000 {
|
||||
compatible = "nvidia,tegra186-sdhci";
|
||||
reg = <0x0 0x03460000 0x0 0x10000>;
|
||||
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&bpmp TEGRA186_CLK_SDMMC4>;
|
||||
clock-names = "sdhci";
|
||||
clocks = <&bpmp TEGRA186_CLK_SDMMC4>,
|
||||
<&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
assigned-clocks = <&bpmp TEGRA186_CLK_SDMMC4>,
|
||||
<&bpmp TEGRA186_CLK_PLLC4_VCO>;
|
||||
assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLC4_VCO>;
|
||||
|
||||
@ -460,8 +460,9 @@ sdmmc1: mmc@3400000 {
|
||||
compatible = "nvidia,tegra194-sdhci";
|
||||
reg = <0x03400000 0x10000>;
|
||||
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&bpmp TEGRA194_CLK_SDMMC1>;
|
||||
clock-names = "sdhci";
|
||||
clocks = <&bpmp TEGRA194_CLK_SDMMC1>,
|
||||
<&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
resets = <&bpmp TEGRA194_RESET_SDMMC1>;
|
||||
reset-names = "sdhci";
|
||||
interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCRA &emc>,
|
||||
@ -485,8 +486,9 @@ sdmmc3: mmc@3440000 {
|
||||
compatible = "nvidia,tegra194-sdhci";
|
||||
reg = <0x03440000 0x10000>;
|
||||
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&bpmp TEGRA194_CLK_SDMMC3>;
|
||||
clock-names = "sdhci";
|
||||
clocks = <&bpmp TEGRA194_CLK_SDMMC3>,
|
||||
<&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
resets = <&bpmp TEGRA194_RESET_SDMMC3>;
|
||||
reset-names = "sdhci";
|
||||
interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCR &emc>,
|
||||
@ -511,8 +513,9 @@ sdmmc4: mmc@3460000 {
|
||||
compatible = "nvidia,tegra194-sdhci";
|
||||
reg = <0x03460000 0x10000>;
|
||||
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&bpmp TEGRA194_CLK_SDMMC4>;
|
||||
clock-names = "sdhci";
|
||||
clocks = <&bpmp TEGRA194_CLK_SDMMC4>,
|
||||
<&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
assigned-clocks = <&bpmp TEGRA194_CLK_SDMMC4>,
|
||||
<&bpmp TEGRA194_CLK_PLLC4>;
|
||||
assigned-clock-parents =
|
||||
|
||||
@ -1194,8 +1194,9 @@ mmc@700b0000 {
|
||||
compatible = "nvidia,tegra210-sdhci";
|
||||
reg = <0x0 0x700b0000 0x0 0x200>;
|
||||
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
|
||||
clock-names = "sdhci";
|
||||
clocks = <&tegra_car TEGRA210_CLK_SDMMC1>,
|
||||
<&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
resets = <&tegra_car 14>;
|
||||
reset-names = "sdhci";
|
||||
pinctrl-names = "sdmmc-3v3", "sdmmc-1v8",
|
||||
@ -1222,8 +1223,9 @@ mmc@700b0200 {
|
||||
compatible = "nvidia,tegra210-sdhci";
|
||||
reg = <0x0 0x700b0200 0x0 0x200>;
|
||||
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&tegra_car TEGRA210_CLK_SDMMC2>;
|
||||
clock-names = "sdhci";
|
||||
clocks = <&tegra_car TEGRA210_CLK_SDMMC2>,
|
||||
<&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
resets = <&tegra_car 9>;
|
||||
reset-names = "sdhci";
|
||||
pinctrl-names = "sdmmc-1v8-drv";
|
||||
@ -1239,8 +1241,9 @@ mmc@700b0400 {
|
||||
compatible = "nvidia,tegra210-sdhci";
|
||||
reg = <0x0 0x700b0400 0x0 0x200>;
|
||||
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&tegra_car TEGRA210_CLK_SDMMC3>;
|
||||
clock-names = "sdhci";
|
||||
clocks = <&tegra_car TEGRA210_CLK_SDMMC3>,
|
||||
<&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
resets = <&tegra_car 69>;
|
||||
reset-names = "sdhci";
|
||||
pinctrl-names = "sdmmc-3v3", "sdmmc-1v8",
|
||||
@ -1262,8 +1265,9 @@ mmc@700b0600 {
|
||||
compatible = "nvidia,tegra210-sdhci";
|
||||
reg = <0x0 0x700b0600 0x0 0x200>;
|
||||
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&tegra_car TEGRA210_CLK_SDMMC4>;
|
||||
clock-names = "sdhci";
|
||||
clocks = <&tegra_car TEGRA210_CLK_SDMMC4>,
|
||||
<&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
|
||||
clock-names = "sdhci", "tmclk";
|
||||
resets = <&tegra_car 15>;
|
||||
reset-names = "sdhci";
|
||||
pinctrl-names = "sdmmc-3v3-drv", "sdmmc-1v8-drv";
|
||||
|
||||
@ -417,10 +417,10 @@ intr_main_gpio: interrupt-controller0 {
|
||||
ti,intr-trigger-type = <1>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gic500>;
|
||||
#interrupt-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ti,sci = <&dmsc>;
|
||||
ti,sci-dst-id = <56>;
|
||||
ti,sci-rm-range-girq = <0x1>;
|
||||
ti,sci-dev-id = <100>;
|
||||
ti,interrupt-ranges = <0 392 32>;
|
||||
};
|
||||
|
||||
main_navss {
|
||||
@ -438,10 +438,11 @@ intr_main_navss: interrupt-controller1 {
|
||||
ti,intr-trigger-type = <4>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gic500>;
|
||||
#interrupt-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ti,sci = <&dmsc>;
|
||||
ti,sci-dst-id = <56>;
|
||||
ti,sci-rm-range-girq = <0x0>, <0x2>;
|
||||
ti,sci-dev-id = <182>;
|
||||
ti,interrupt-ranges = <0 64 64>,
|
||||
<64 448 64>;
|
||||
};
|
||||
|
||||
inta_main_udmass: interrupt-controller@33d00000 {
|
||||
@ -452,8 +453,7 @@ inta_main_udmass: interrupt-controller@33d00000 {
|
||||
msi-controller;
|
||||
ti,sci = <&dmsc>;
|
||||
ti,sci-dev-id = <179>;
|
||||
ti,sci-rm-range-vint = <0x0>;
|
||||
ti,sci-rm-range-global-event = <0x1>;
|
||||
ti,interrupt-ranges = <0 0 256>;
|
||||
};
|
||||
|
||||
secure_proxy_main: mailbox@32c00000 {
|
||||
@ -589,7 +589,7 @@ ringacc: ringacc@3c000000 {
|
||||
<0x0 0x33000000 0x0 0x40000>;
|
||||
reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
|
||||
ti,num-rings = <818>;
|
||||
ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
|
||||
ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
|
||||
ti,dma-ring-reset-quirk;
|
||||
ti,sci = <&dmsc>;
|
||||
ti,sci-dev-id = <187>;
|
||||
@ -609,11 +609,11 @@ main_udmap: dma-controller@31150000 {
|
||||
ti,sci-dev-id = <188>;
|
||||
ti,ringacc = <&ringacc>;
|
||||
|
||||
ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
|
||||
<0x2>; /* TX_CHAN */
|
||||
ti,sci-rm-range-rchan = <0x4>, /* RX_HCHAN */
|
||||
<0x5>; /* RX_CHAN */
|
||||
ti,sci-rm-range-rflow = <0x6>; /* GP RFLOW */
|
||||
ti,sci-rm-range-tchan = <0xf>, /* TX_HCHAN */
|
||||
<0xd>; /* TX_CHAN */
|
||||
ti,sci-rm-range-rchan = <0xb>, /* RX_HCHAN */
|
||||
<0xa>; /* RX_CHAN */
|
||||
ti,sci-rm-range-rflow = <0x0>; /* GP RFLOW */
|
||||
};
|
||||
|
||||
cpts@310d0000 {
|
||||
@ -622,7 +622,7 @@ cpts@310d0000 {
|
||||
reg-names = "cpts";
|
||||
clocks = <&main_cpts_mux>;
|
||||
clock-names = "cpts";
|
||||
interrupts-extended = <&intr_main_navss 163 0>;
|
||||
interrupts-extended = <&intr_main_navss 391>;
|
||||
interrupt-names = "cpts";
|
||||
ti,cpts-periodic-outputs = <6>;
|
||||
ti,cpts-ext-ts-inputs = <8>;
|
||||
@ -645,8 +645,7 @@ main_gpio0: main_gpio0@600000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&intr_main_gpio>;
|
||||
interrupts = <57 256>, <57 257>, <57 258>, <57 259>, <57 260>,
|
||||
<57 261>;
|
||||
interrupts = <192>, <193>, <194>, <195>, <196>, <197>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
ti,ngpio = <96>;
|
||||
@ -661,8 +660,7 @@ main_gpio1: main_gpio1@601000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&intr_main_gpio>;
|
||||
interrupts = <58 256>, <58 257>, <58 258>, <58 259>, <58 260>,
|
||||
<58 261>;
|
||||
interrupts = <200>, <201>, <202>, <203>, <204>, <205>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
ti,ngpio = <90>;
|
||||
|
||||
@ -134,7 +134,7 @@ mcu_ringacc: ringacc@2b800000 {
|
||||
<0x0 0x2a500000 0x0 0x40000>;
|
||||
reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
|
||||
ti,num-rings = <286>;
|
||||
ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
|
||||
ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
|
||||
ti,dma-ring-reset-quirk;
|
||||
ti,sci = <&dmsc>;
|
||||
ti,sci-dev-id = <195>;
|
||||
@ -154,11 +154,11 @@ mcu_udmap: dma-controller@285c0000 {
|
||||
ti,sci-dev-id = <194>;
|
||||
ti,ringacc = <&mcu_ringacc>;
|
||||
|
||||
ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
|
||||
<0x2>; /* TX_CHAN */
|
||||
ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */
|
||||
<0x4>; /* RX_CHAN */
|
||||
ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */
|
||||
ti,sci-rm-range-tchan = <0xf>, /* TX_HCHAN */
|
||||
<0xd>; /* TX_CHAN */
|
||||
ti,sci-rm-range-rchan = <0xb>, /* RX_HCHAN */
|
||||
<0xa>; /* RX_CHAN */
|
||||
ti,sci-rm-range-rflow = <0x0>; /* GP RFLOW */
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -74,10 +74,10 @@ intr_wkup_gpio: interrupt-controller2 {
|
||||
ti,intr-trigger-type = <1>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gic500>;
|
||||
#interrupt-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ti,sci = <&dmsc>;
|
||||
ti,sci-dst-id = <56>;
|
||||
ti,sci-rm-range-girq = <0x4>;
|
||||
ti,sci-dev-id = <156>;
|
||||
ti,interrupt-ranges = <0 712 16>;
|
||||
};
|
||||
|
||||
wkup_gpio0: wkup_gpio0@42110000 {
|
||||
@ -86,7 +86,7 @@ wkup_gpio0: wkup_gpio0@42110000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&intr_wkup_gpio>;
|
||||
interrupts = <59 128>, <59 129>, <59 130>, <59 131>;
|
||||
interrupts = <60>, <61>, <62>, <63>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
ti,ngpio = <56>;
|
||||
|
||||
@ -384,7 +384,7 @@ &pcie1_ep {
|
||||
};
|
||||
|
||||
&mailbox0_cluster0 {
|
||||
interrupts = <164 0>;
|
||||
interrupts = <436>;
|
||||
|
||||
mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
|
||||
ti,mbox-tx = <1 0 0>;
|
||||
@ -393,7 +393,7 @@ mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
|
||||
};
|
||||
|
||||
&mailbox0_cluster1 {
|
||||
interrupts = <165 0>;
|
||||
interrupts = <432>;
|
||||
|
||||
mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
|
||||
ti,mbox-tx = <1 0 0>;
|
||||
|
||||
@ -287,7 +287,7 @@ &wkup_gpio1 {
|
||||
};
|
||||
|
||||
&mailbox0_cluster0 {
|
||||
interrupts = <214 0>;
|
||||
interrupts = <436>;
|
||||
|
||||
mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
|
||||
ti,mbox-rx = <0 0 0>;
|
||||
@ -301,7 +301,7 @@ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
|
||||
};
|
||||
|
||||
&mailbox0_cluster1 {
|
||||
interrupts = <215 0>;
|
||||
interrupts = <432>;
|
||||
|
||||
mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
|
||||
ti,mbox-rx = <0 0 0>;
|
||||
@ -315,7 +315,7 @@ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
|
||||
};
|
||||
|
||||
&mailbox0_cluster2 {
|
||||
interrupts = <216 0>;
|
||||
interrupts = <428>;
|
||||
|
||||
mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
|
||||
ti,mbox-rx = <0 0 0>;
|
||||
@ -329,7 +329,7 @@ mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
|
||||
};
|
||||
|
||||
&mailbox0_cluster3 {
|
||||
interrupts = <217 0>;
|
||||
interrupts = <424>;
|
||||
|
||||
mbox_c66_0: mbox-c66-0 {
|
||||
ti,mbox-rx = <0 0 0>;
|
||||
@ -343,7 +343,7 @@ mbox_c66_1: mbox-c66-1 {
|
||||
};
|
||||
|
||||
&mailbox0_cluster4 {
|
||||
interrupts = <218 0>;
|
||||
interrupts = <420>;
|
||||
|
||||
mbox_c71_0: mbox-c71-0 {
|
||||
ti,mbox-rx = <0 0 0>;
|
||||
|
||||
@ -80,10 +80,10 @@ main_gpio_intr: interrupt-controller0 {
|
||||
ti,intr-trigger-type = <1>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gic500>;
|
||||
#interrupt-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ti,sci = <&dmsc>;
|
||||
ti,sci-dst-id = <14>;
|
||||
ti,sci-rm-range-girq = <0x1>;
|
||||
ti,sci-dev-id = <131>;
|
||||
ti,interrupt-ranges = <8 392 56>;
|
||||
};
|
||||
|
||||
main_navss {
|
||||
@ -101,10 +101,12 @@ main_navss_intr: interrupt-controller1 {
|
||||
ti,intr-trigger-type = <4>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gic500>;
|
||||
#interrupt-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ti,sci = <&dmsc>;
|
||||
ti,sci-dst-id = <14>;
|
||||
ti,sci-rm-range-girq = <0>, <2>;
|
||||
ti,sci-dev-id = <213>;
|
||||
ti,interrupt-ranges = <0 64 64>,
|
||||
<64 448 64>,
|
||||
<128 672 64>;
|
||||
};
|
||||
|
||||
main_udmass_inta: interrupt-controller@33d00000 {
|
||||
@ -115,8 +117,7 @@ main_udmass_inta: interrupt-controller@33d00000 {
|
||||
msi-controller;
|
||||
ti,sci = <&dmsc>;
|
||||
ti,sci-dev-id = <209>;
|
||||
ti,sci-rm-range-vint = <0xa>;
|
||||
ti,sci-rm-range-global-event = <0xd>;
|
||||
ti,interrupt-ranges = <0 0 256>;
|
||||
};
|
||||
|
||||
secure_proxy_main: mailbox@32c00000 {
|
||||
@ -296,7 +297,7 @@ cpts@310d0000 {
|
||||
reg-names = "cpts";
|
||||
clocks = <&k3_clks 201 1>;
|
||||
clock-names = "cpts";
|
||||
interrupts-extended = <&main_navss_intr 201 0>;
|
||||
interrupts-extended = <&main_navss_intr 391>;
|
||||
interrupt-names = "cpts";
|
||||
ti,cpts-periodic-outputs = <6>;
|
||||
ti,cpts-ext-ts-inputs = <8>;
|
||||
@ -688,8 +689,8 @@ main_gpio0: gpio@600000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&main_gpio_intr>;
|
||||
interrupts = <105 0>, <105 1>, <105 2>, <105 3>,
|
||||
<105 4>, <105 5>, <105 6>, <105 7>;
|
||||
interrupts = <256>, <257>, <258>, <259>,
|
||||
<260>, <261>, <262>, <263>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
ti,ngpio = <128>;
|
||||
@ -705,7 +706,7 @@ main_gpio1: gpio@601000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&main_gpio_intr>;
|
||||
interrupts = <106 0>, <106 1>, <106 2>;
|
||||
interrupts = <288>, <289>, <290>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
ti,ngpio = <36>;
|
||||
@ -721,8 +722,8 @@ main_gpio2: gpio@610000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&main_gpio_intr>;
|
||||
interrupts = <107 0>, <107 1>, <107 2>, <107 3>,
|
||||
<107 4>, <107 5>, <107 6>, <107 7>;
|
||||
interrupts = <264>, <265>, <266>, <267>,
|
||||
<268>, <269>, <270>, <271>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
ti,ngpio = <128>;
|
||||
@ -738,7 +739,7 @@ main_gpio3: gpio@611000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&main_gpio_intr>;
|
||||
interrupts = <108 0>, <108 1>, <108 2>;
|
||||
interrupts = <292>, <293>, <294>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
ti,ngpio = <36>;
|
||||
@ -754,8 +755,8 @@ main_gpio4: gpio@620000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&main_gpio_intr>;
|
||||
interrupts = <109 0>, <109 1>, <109 2>, <109 3>,
|
||||
<109 4>, <109 5>, <109 6>, <109 7>;
|
||||
interrupts = <272>, <273>, <274>, <275>,
|
||||
<276>, <277>, <278>, <279>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
ti,ngpio = <128>;
|
||||
@ -771,7 +772,7 @@ main_gpio5: gpio@621000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&main_gpio_intr>;
|
||||
interrupts = <110 0>, <110 1>, <110 2>;
|
||||
interrupts = <296>, <297>, <298>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
ti,ngpio = <36>;
|
||||
@ -787,8 +788,8 @@ main_gpio6: gpio@630000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&main_gpio_intr>;
|
||||
interrupts = <111 0>, <111 1>, <111 2>, <111 3>,
|
||||
<111 4>, <111 5>, <111 6>, <111 7>;
|
||||
interrupts = <280>, <281>, <282>, <283>,
|
||||
<284>, <285>, <286>, <287>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
ti,ngpio = <128>;
|
||||
@ -804,7 +805,7 @@ main_gpio7: gpio@631000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&main_gpio_intr>;
|
||||
interrupts = <112 0>, <112 1>, <112 2>;
|
||||
interrupts = <300>, <301>, <302>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
ti,ngpio = <36>;
|
||||
|
||||
@ -101,10 +101,10 @@ wkup_gpio_intr: interrupt-controller2 {
|
||||
ti,intr-trigger-type = <1>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gic500>;
|
||||
#interrupt-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ti,sci = <&dmsc>;
|
||||
ti,sci-dst-id = <14>;
|
||||
ti,sci-rm-range-girq = <0x5>;
|
||||
ti,sci-dev-id = <137>;
|
||||
ti,interrupt-ranges = <16 960 16>;
|
||||
};
|
||||
|
||||
wkup_gpio0: gpio@42110000 {
|
||||
@ -113,8 +113,7 @@ wkup_gpio0: gpio@42110000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&wkup_gpio_intr>;
|
||||
interrupts = <113 0>, <113 1>, <113 2>,
|
||||
<113 3>, <113 4>, <113 5>;
|
||||
interrupts = <103>, <104>, <105>, <106>, <107>, <108>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
ti,ngpio = <84>;
|
||||
@ -130,8 +129,7 @@ wkup_gpio1: gpio@42100000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&wkup_gpio_intr>;
|
||||
interrupts = <114 0>, <114 1>, <114 2>,
|
||||
<114 3>, <114 4>, <114 5>;
|
||||
interrupts = <112>, <113>, <114>, <115>, <116>, <117>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
ti,ngpio = <84>;
|
||||
|
||||
@ -2,6 +2,12 @@
|
||||
#ifndef __ASM_COMPILER_H
|
||||
#define __ASM_COMPILER_H
|
||||
|
||||
#ifdef ARM64_ASM_ARCH
|
||||
#define ARM64_ASM_PREAMBLE ".arch " ARM64_ASM_ARCH "\n"
|
||||
#else
|
||||
#define ARM64_ASM_PREAMBLE
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The EL0/EL1 pointer bits used by a pointer authentication code.
|
||||
* This is dependent on TBI0/TBI1 being enabled, or bits 63:56 would also apply.
|
||||
|
||||
@ -95,6 +95,11 @@ static inline int arch_irqs_disabled_flags(unsigned long flags)
|
||||
return res;
|
||||
}
|
||||
|
||||
static inline int arch_irqs_disabled(void)
|
||||
{
|
||||
return arch_irqs_disabled_flags(arch_local_save_flags());
|
||||
}
|
||||
|
||||
static inline unsigned long arch_local_irq_save(void)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
@ -71,11 +71,12 @@
|
||||
* IMO: Override CPSR.I and enable signaling with VI
|
||||
* FMO: Override CPSR.F and enable signaling with VF
|
||||
* SWIO: Turn set/way invalidates into set/way clean+invalidate
|
||||
* PTW: Take a stage2 fault if a stage1 walk steps in device memory
|
||||
*/
|
||||
#define HCR_GUEST_FLAGS (HCR_TSC | HCR_TSW | HCR_TWE | HCR_TWI | HCR_VM | \
|
||||
HCR_BSU_IS | HCR_FB | HCR_TAC | \
|
||||
HCR_AMO | HCR_SWIO | HCR_TIDCP | HCR_RW | HCR_TLOR | \
|
||||
HCR_FMO | HCR_IMO)
|
||||
HCR_FMO | HCR_IMO | HCR_PTW )
|
||||
#define HCR_VIRT_EXCP_MASK (HCR_VSE | HCR_VI | HCR_VF)
|
||||
#define HCR_HOST_NVHE_FLAGS (HCR_RW | HCR_API | HCR_APK)
|
||||
#define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H)
|
||||
|
||||
@ -169,6 +169,34 @@ extern char __smccc_workaround_1_smc[__SMCCC_WORKAROUND_1_SMC_SZ];
|
||||
*__hyp_this_cpu_ptr(sym); \
|
||||
})
|
||||
|
||||
#define __KVM_EXTABLE(from, to) \
|
||||
" .pushsection __kvm_ex_table, \"a\"\n" \
|
||||
" .align 3\n" \
|
||||
" .long (" #from " - .), (" #to " - .)\n" \
|
||||
" .popsection\n"
|
||||
|
||||
|
||||
#define __kvm_at(at_op, addr) \
|
||||
( { \
|
||||
int __kvm_at_err = 0; \
|
||||
u64 spsr, elr; \
|
||||
asm volatile( \
|
||||
" mrs %1, spsr_el2\n" \
|
||||
" mrs %2, elr_el2\n" \
|
||||
"1: at "at_op", %3\n" \
|
||||
" isb\n" \
|
||||
" b 9f\n" \
|
||||
"2: msr spsr_el2, %1\n" \
|
||||
" msr elr_el2, %2\n" \
|
||||
" mov %w0, %4\n" \
|
||||
"9:\n" \
|
||||
__KVM_EXTABLE(1b, 2b) \
|
||||
: "+r" (__kvm_at_err), "=&r" (spsr), "=&r" (elr) \
|
||||
: "r" (addr), "i" (-EFAULT)); \
|
||||
__kvm_at_err; \
|
||||
} )
|
||||
|
||||
|
||||
#else /* __ASSEMBLY__ */
|
||||
|
||||
.macro hyp_adr_this_cpu reg, sym, tmp
|
||||
@ -193,6 +221,21 @@ extern char __smccc_workaround_1_smc[__SMCCC_WORKAROUND_1_SMC_SZ];
|
||||
ldr \vcpu, [\ctxt, #HOST_CONTEXT_VCPU]
|
||||
.endm
|
||||
|
||||
/*
|
||||
* KVM extable for unexpected exceptions.
|
||||
* In the same format _asm_extable, but output to a different section so that
|
||||
* it can be mapped to EL2. The KVM version is not sorted. The caller must
|
||||
* ensure:
|
||||
* x18 has the hypervisor value to allow any Shadow-Call-Stack instrumented
|
||||
* code to write to it, and that SPSR_EL2 and ELR_EL2 are restored by the fixup.
|
||||
*/
|
||||
.macro _kvm_extable, from, to
|
||||
.pushsection __kvm_ex_table, "a"
|
||||
.align 3
|
||||
.long (\from - .), (\to - .)
|
||||
.popsection
|
||||
.endm
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* __ARM_KVM_ASM_H__ */
|
||||
|
||||
@ -28,14 +28,16 @@
|
||||
* not. The macros handles invoking the asm with or without the
|
||||
* register argument as appropriate.
|
||||
*/
|
||||
#define __TLBI_0(op, arg) asm ("tlbi " #op "\n" \
|
||||
#define __TLBI_0(op, arg) asm (ARM64_ASM_PREAMBLE \
|
||||
"tlbi " #op "\n" \
|
||||
ALTERNATIVE("nop\n nop", \
|
||||
"dsb ish\n tlbi " #op, \
|
||||
ARM64_WORKAROUND_REPEAT_TLBI, \
|
||||
CONFIG_ARM64_WORKAROUND_REPEAT_TLBI) \
|
||||
: : )
|
||||
|
||||
#define __TLBI_1(op, arg) asm ("tlbi " #op ", %0\n" \
|
||||
#define __TLBI_1(op, arg) asm (ARM64_ASM_PREAMBLE \
|
||||
"tlbi " #op ", %0\n" \
|
||||
ALTERNATIVE("nop\n nop", \
|
||||
"dsb ish\n tlbi " #op ", %0", \
|
||||
ARM64_WORKAROUND_REPEAT_TLBI, \
|
||||
|
||||
@ -322,7 +322,7 @@ void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size)
|
||||
*/
|
||||
if (memblock_is_map_memory(phys))
|
||||
return (void __iomem *)__phys_to_virt(phys);
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
|
||||
default:
|
||||
if (region->attribute & EFI_MEMORY_WB)
|
||||
|
||||
@ -686,7 +686,7 @@ static s64 arm64_ftr_safe_value(const struct arm64_ftr_bits *ftrp, s64 new,
|
||||
case FTR_HIGHER_OR_ZERO_SAFE:
|
||||
if (!cur || !new)
|
||||
break;
|
||||
/* Fallthrough */
|
||||
fallthrough;
|
||||
case FTR_HIGHER_SAFE:
|
||||
ret = new > cur ? new : cur;
|
||||
break;
|
||||
|
||||
@ -327,7 +327,6 @@ static void cpuinfo_detect_icache_policy(struct cpuinfo_arm64 *info)
|
||||
set_bit(ICACHEF_VPIPT, &__icache_flags);
|
||||
break;
|
||||
default:
|
||||
/* Fallthrough */
|
||||
case ICACHE_POLICY_VIPT:
|
||||
/* Assume aliasing */
|
||||
set_bit(ICACHEF_ALIASING, &__icache_flags);
|
||||
|
||||
@ -257,7 +257,7 @@ static int hw_breakpoint_control(struct perf_event *bp,
|
||||
* level.
|
||||
*/
|
||||
enable_debug_monitors(dbg_el);
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
case HW_BREAKPOINT_RESTORE:
|
||||
/* Setup the address register. */
|
||||
write_wb_reg(val_reg, i, info->address);
|
||||
@ -541,13 +541,13 @@ int hw_breakpoint_arch_parse(struct perf_event *bp,
|
||||
if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2)
|
||||
break;
|
||||
|
||||
/* Fallthrough */
|
||||
fallthrough;
|
||||
case 3:
|
||||
/* Allow single byte watchpoint. */
|
||||
if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1)
|
||||
break;
|
||||
|
||||
/* Fallthrough */
|
||||
fallthrough;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
@ -103,6 +103,10 @@ KVM_NVHE_ALIAS(vgic_v3_cpuif_trap);
|
||||
KVM_NVHE_ALIAS(gic_pmr_sync);
|
||||
#endif
|
||||
|
||||
/* EL2 exception handling */
|
||||
KVM_NVHE_ALIAS(__start___kvm_ex_table);
|
||||
KVM_NVHE_ALIAS(__stop___kvm_ex_table);
|
||||
|
||||
#endif /* CONFIG_KVM */
|
||||
|
||||
#endif /* __ARM64_KERNEL_IMAGE_VARS_H */
|
||||
|
||||
@ -305,8 +305,7 @@ int module_frob_arch_sections(Elf_Ehdr *ehdr, Elf_Shdr *sechdrs,
|
||||
mod->arch.core.plt_shndx = i;
|
||||
else if (!strcmp(secstrings + sechdrs[i].sh_name, ".init.plt"))
|
||||
mod->arch.init.plt_shndx = i;
|
||||
else if (IS_ENABLED(CONFIG_DYNAMIC_FTRACE) &&
|
||||
!strcmp(secstrings + sechdrs[i].sh_name,
|
||||
else if (!strcmp(secstrings + sechdrs[i].sh_name,
|
||||
".text.ftrace_trampoline"))
|
||||
tramp = sechdrs + i;
|
||||
else if (sechdrs[i].sh_type == SHT_SYMTAB)
|
||||
|
||||
@ -315,21 +315,21 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
|
||||
/* MOVW instruction relocations. */
|
||||
case R_AARCH64_MOVW_UABS_G0_NC:
|
||||
overflow_check = false;
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
case R_AARCH64_MOVW_UABS_G0:
|
||||
ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 0,
|
||||
AARCH64_INSN_IMM_MOVKZ);
|
||||
break;
|
||||
case R_AARCH64_MOVW_UABS_G1_NC:
|
||||
overflow_check = false;
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
case R_AARCH64_MOVW_UABS_G1:
|
||||
ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 16,
|
||||
AARCH64_INSN_IMM_MOVKZ);
|
||||
break;
|
||||
case R_AARCH64_MOVW_UABS_G2_NC:
|
||||
overflow_check = false;
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
case R_AARCH64_MOVW_UABS_G2:
|
||||
ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 32,
|
||||
AARCH64_INSN_IMM_MOVKZ);
|
||||
@ -397,7 +397,7 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
|
||||
break;
|
||||
case R_AARCH64_ADR_PREL_PG_HI21_NC:
|
||||
overflow_check = false;
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
case R_AARCH64_ADR_PREL_PG_HI21:
|
||||
ovf = reloc_insn_adrp(me, sechdrs, loc, val);
|
||||
if (ovf && ovf != -ERANGE)
|
||||
|
||||
@ -123,10 +123,8 @@ void arch_cpu_idle(void)
|
||||
* This should do all the clock switching and wait for interrupt
|
||||
* tricks
|
||||
*/
|
||||
trace_cpu_idle_rcuidle(1, smp_processor_id());
|
||||
cpu_do_idle();
|
||||
local_irq_enable();
|
||||
trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
|
||||
}
|
||||
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
|
||||
@ -280,7 +280,6 @@ u64 cpu_logical_map(int cpu)
|
||||
{
|
||||
return __cpu_logical_map[cpu];
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(cpu_logical_map);
|
||||
|
||||
void __init __no_sanitize_address setup_arch(char **cmdline_p)
|
||||
{
|
||||
|
||||
@ -151,7 +151,7 @@ int __cpu_up(unsigned int cpu, struct task_struct *idle)
|
||||
break;
|
||||
}
|
||||
pr_crit("CPU%u: may not have shut down cleanly\n", cpu);
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
case CPU_STUCK_IN_KERNEL:
|
||||
pr_crit("CPU%u: is stuck in kernel\n", cpu);
|
||||
if (status & CPU_STUCK_REASON_52_BIT_VA)
|
||||
|
||||
@ -20,6 +20,13 @@ ENTRY(_text)
|
||||
|
||||
jiffies = jiffies_64;
|
||||
|
||||
|
||||
#define HYPERVISOR_EXTABLE \
|
||||
. = ALIGN(SZ_8); \
|
||||
__start___kvm_ex_table = .; \
|
||||
*(__kvm_ex_table) \
|
||||
__stop___kvm_ex_table = .;
|
||||
|
||||
#define HYPERVISOR_TEXT \
|
||||
/* \
|
||||
* Align to 4 KB so that \
|
||||
@ -35,6 +42,7 @@ jiffies = jiffies_64;
|
||||
__hyp_idmap_text_end = .; \
|
||||
__hyp_text_start = .; \
|
||||
*(.hyp.text) \
|
||||
HYPERVISOR_EXTABLE \
|
||||
__hyp_text_end = .;
|
||||
|
||||
#define IDMAP_TEXT \
|
||||
|
||||
@ -128,7 +128,7 @@ static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu)
|
||||
switch (ESR_ELx_EC(esr)) {
|
||||
case ESR_ELx_EC_WATCHPT_LOW:
|
||||
run->debug.arch.far = vcpu->arch.fault.far_el2;
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case ESR_ELx_EC_SOFTSTP_LOW:
|
||||
case ESR_ELx_EC_BREAKPT_LOW:
|
||||
case ESR_ELx_EC_BKPT32:
|
||||
|
||||
@ -196,20 +196,23 @@ alternative_endif
|
||||
// This is our single instruction exception window. A pending
|
||||
// SError is guaranteed to occur at the earliest when we unmask
|
||||
// it, and at the latest just after the ISB.
|
||||
.global abort_guest_exit_start
|
||||
abort_guest_exit_start:
|
||||
|
||||
isb
|
||||
|
||||
.global abort_guest_exit_end
|
||||
abort_guest_exit_end:
|
||||
|
||||
msr daifset, #4 // Mask aborts
|
||||
ret
|
||||
|
||||
// If the exception took place, restore the EL1 exception
|
||||
// context so that we can report some information.
|
||||
// Merge the exception code with the SError pending bit.
|
||||
tbz x0, #ARM_EXIT_WITH_SERROR_BIT, 1f
|
||||
_kvm_extable abort_guest_exit_start, 9997f
|
||||
_kvm_extable abort_guest_exit_end, 9997f
|
||||
9997:
|
||||
msr daifset, #4 // Mask aborts
|
||||
mov x0, #(1 << ARM_EXIT_WITH_SERROR_BIT)
|
||||
|
||||
// restore the EL1 exception context so that we can report some
|
||||
// information. Merge the exception code with the SError pending bit.
|
||||
msr elr_el2, x2
|
||||
msr esr_el2, x3
|
||||
msr spsr_el2, x4
|
||||
|
||||
@ -15,6 +15,30 @@
|
||||
#include <asm/kvm_mmu.h>
|
||||
#include <asm/mmu.h>
|
||||
|
||||
.macro save_caller_saved_regs_vect
|
||||
/* x0 and x1 were saved in the vector entry */
|
||||
stp x2, x3, [sp, #-16]!
|
||||
stp x4, x5, [sp, #-16]!
|
||||
stp x6, x7, [sp, #-16]!
|
||||
stp x8, x9, [sp, #-16]!
|
||||
stp x10, x11, [sp, #-16]!
|
||||
stp x12, x13, [sp, #-16]!
|
||||
stp x14, x15, [sp, #-16]!
|
||||
stp x16, x17, [sp, #-16]!
|
||||
.endm
|
||||
|
||||
.macro restore_caller_saved_regs_vect
|
||||
ldp x16, x17, [sp], #16
|
||||
ldp x14, x15, [sp], #16
|
||||
ldp x12, x13, [sp], #16
|
||||
ldp x10, x11, [sp], #16
|
||||
ldp x8, x9, [sp], #16
|
||||
ldp x6, x7, [sp], #16
|
||||
ldp x4, x5, [sp], #16
|
||||
ldp x2, x3, [sp], #16
|
||||
ldp x0, x1, [sp], #16
|
||||
.endm
|
||||
|
||||
.text
|
||||
|
||||
.macro do_el2_call
|
||||
@ -143,13 +167,19 @@ el1_error:
|
||||
b __guest_exit
|
||||
|
||||
el2_sync:
|
||||
/* Check for illegal exception return, otherwise panic */
|
||||
/* Check for illegal exception return */
|
||||
mrs x0, spsr_el2
|
||||
tbnz x0, #20, 1f
|
||||
|
||||
/* if this was something else, then panic! */
|
||||
tst x0, #PSR_IL_BIT
|
||||
b.eq __hyp_panic
|
||||
save_caller_saved_regs_vect
|
||||
stp x29, x30, [sp, #-16]!
|
||||
bl kvm_unexpected_el2_exception
|
||||
ldp x29, x30, [sp], #16
|
||||
restore_caller_saved_regs_vect
|
||||
|
||||
eret
|
||||
|
||||
1:
|
||||
/* Let's attempt a recovery from the illegal exception return */
|
||||
get_vcpu_ptr x1, x0
|
||||
mov x0, #ARM_EXCEPTION_IL
|
||||
@ -157,27 +187,14 @@ el2_sync:
|
||||
|
||||
|
||||
el2_error:
|
||||
ldp x0, x1, [sp], #16
|
||||
save_caller_saved_regs_vect
|
||||
stp x29, x30, [sp, #-16]!
|
||||
|
||||
bl kvm_unexpected_el2_exception
|
||||
|
||||
ldp x29, x30, [sp], #16
|
||||
restore_caller_saved_regs_vect
|
||||
|
||||
/*
|
||||
* Only two possibilities:
|
||||
* 1) Either we come from the exit path, having just unmasked
|
||||
* PSTATE.A: change the return code to an EL2 fault, and
|
||||
* carry on, as we're already in a sane state to handle it.
|
||||
* 2) Or we come from anywhere else, and that's a bug: we panic.
|
||||
*
|
||||
* For (1), x0 contains the original return code and x1 doesn't
|
||||
* contain anything meaningful at that stage. We can reuse them
|
||||
* as temp registers.
|
||||
* For (2), who cares?
|
||||
*/
|
||||
mrs x0, elr_el2
|
||||
adr x1, abort_guest_exit_start
|
||||
cmp x0, x1
|
||||
adr x1, abort_guest_exit_end
|
||||
ccmp x0, x1, #4, ne
|
||||
b.ne __hyp_panic
|
||||
mov x0, #(1 << ARM_EXIT_WITH_SERROR_BIT)
|
||||
eret
|
||||
sb
|
||||
|
||||
|
||||
@ -21,70 +21,70 @@
|
||||
#define save_debug(ptr,reg,nr) \
|
||||
switch (nr) { \
|
||||
case 15: ptr[15] = read_debug(reg, 15); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 14: ptr[14] = read_debug(reg, 14); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 13: ptr[13] = read_debug(reg, 13); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 12: ptr[12] = read_debug(reg, 12); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 11: ptr[11] = read_debug(reg, 11); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 10: ptr[10] = read_debug(reg, 10); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 9: ptr[9] = read_debug(reg, 9); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 8: ptr[8] = read_debug(reg, 8); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 7: ptr[7] = read_debug(reg, 7); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 6: ptr[6] = read_debug(reg, 6); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 5: ptr[5] = read_debug(reg, 5); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 4: ptr[4] = read_debug(reg, 4); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 3: ptr[3] = read_debug(reg, 3); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 2: ptr[2] = read_debug(reg, 2); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 1: ptr[1] = read_debug(reg, 1); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
default: ptr[0] = read_debug(reg, 0); \
|
||||
}
|
||||
|
||||
#define restore_debug(ptr,reg,nr) \
|
||||
switch (nr) { \
|
||||
case 15: write_debug(ptr[15], reg, 15); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 14: write_debug(ptr[14], reg, 14); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 13: write_debug(ptr[13], reg, 13); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 12: write_debug(ptr[12], reg, 12); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 11: write_debug(ptr[11], reg, 11); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 10: write_debug(ptr[10], reg, 10); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 9: write_debug(ptr[9], reg, 9); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 8: write_debug(ptr[8], reg, 8); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 7: write_debug(ptr[7], reg, 7); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 6: write_debug(ptr[6], reg, 6); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 5: write_debug(ptr[5], reg, 5); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 4: write_debug(ptr[4], reg, 4); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 3: write_debug(ptr[3], reg, 3); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 2: write_debug(ptr[2], reg, 2); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
case 1: write_debug(ptr[1], reg, 1); \
|
||||
/* Fall through */ \
|
||||
fallthrough; \
|
||||
default: write_debug(ptr[0], reg, 0); \
|
||||
}
|
||||
|
||||
|
||||
@ -17,6 +17,7 @@
|
||||
|
||||
#include <asm/barrier.h>
|
||||
#include <asm/cpufeature.h>
|
||||
#include <asm/extable.h>
|
||||
#include <asm/kprobes.h>
|
||||
#include <asm/kvm_asm.h>
|
||||
#include <asm/kvm_emulate.h>
|
||||
@ -29,6 +30,9 @@
|
||||
|
||||
extern const char __hyp_panic_string[];
|
||||
|
||||
extern struct exception_table_entry __start___kvm_ex_table;
|
||||
extern struct exception_table_entry __stop___kvm_ex_table;
|
||||
|
||||
/* Check whether the FP regs were dirtied while in the host-side run loop: */
|
||||
static inline bool update_fp_enabled(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
@ -142,10 +146,10 @@ static inline bool __translate_far_to_hpfar(u64 far, u64 *hpfar)
|
||||
* saved the guest context yet, and we may return early...
|
||||
*/
|
||||
par = read_sysreg(par_el1);
|
||||
asm volatile("at s1e1r, %0" : : "r" (far));
|
||||
isb();
|
||||
|
||||
tmp = read_sysreg(par_el1);
|
||||
if (!__kvm_at("s1e1r", far))
|
||||
tmp = read_sysreg(par_el1);
|
||||
else
|
||||
tmp = SYS_PAR_EL1_F; /* back to the guest */
|
||||
write_sysreg(par, par_el1);
|
||||
|
||||
if (unlikely(tmp & SYS_PAR_EL1_F))
|
||||
@ -508,4 +512,31 @@ static inline void __set_host_arch_workaround_state(struct kvm_vcpu *vcpu)
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void __kvm_unexpected_el2_exception(void)
|
||||
{
|
||||
unsigned long addr, fixup;
|
||||
struct kvm_cpu_context *host_ctxt;
|
||||
struct exception_table_entry *entry, *end;
|
||||
unsigned long elr_el2 = read_sysreg(elr_el2);
|
||||
|
||||
entry = hyp_symbol_addr(__start___kvm_ex_table);
|
||||
end = hyp_symbol_addr(__stop___kvm_ex_table);
|
||||
host_ctxt = &__hyp_this_cpu_ptr(kvm_host_data)->host_ctxt;
|
||||
|
||||
while (entry < end) {
|
||||
addr = (unsigned long)&entry->insn + entry->insn;
|
||||
fixup = (unsigned long)&entry->fixup + entry->fixup;
|
||||
|
||||
if (addr != elr_el2) {
|
||||
entry++;
|
||||
continue;
|
||||
}
|
||||
|
||||
write_sysreg(fixup, elr_el2);
|
||||
return;
|
||||
}
|
||||
|
||||
hyp_panic(host_ctxt);
|
||||
}
|
||||
|
||||
#endif /* __ARM64_KVM_HYP_SWITCH_H__ */
|
||||
|
||||
@ -270,3 +270,8 @@ void __noreturn hyp_panic(struct kvm_cpu_context *host_ctxt)
|
||||
read_sysreg(hpfar_el2), par, vcpu);
|
||||
unreachable();
|
||||
}
|
||||
|
||||
asmlinkage void kvm_unexpected_el2_exception(void)
|
||||
{
|
||||
return __kvm_unexpected_el2_exception();
|
||||
}
|
||||
|
||||
@ -340,10 +340,10 @@ void __vgic_v3_save_aprs(struct vgic_v3_cpu_if *cpu_if)
|
||||
case 7:
|
||||
cpu_if->vgic_ap0r[3] = __vgic_v3_read_ap0rn(3);
|
||||
cpu_if->vgic_ap0r[2] = __vgic_v3_read_ap0rn(2);
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
case 6:
|
||||
cpu_if->vgic_ap0r[1] = __vgic_v3_read_ap0rn(1);
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
default:
|
||||
cpu_if->vgic_ap0r[0] = __vgic_v3_read_ap0rn(0);
|
||||
}
|
||||
@ -352,10 +352,10 @@ void __vgic_v3_save_aprs(struct vgic_v3_cpu_if *cpu_if)
|
||||
case 7:
|
||||
cpu_if->vgic_ap1r[3] = __vgic_v3_read_ap1rn(3);
|
||||
cpu_if->vgic_ap1r[2] = __vgic_v3_read_ap1rn(2);
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
case 6:
|
||||
cpu_if->vgic_ap1r[1] = __vgic_v3_read_ap1rn(1);
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
default:
|
||||
cpu_if->vgic_ap1r[0] = __vgic_v3_read_ap1rn(0);
|
||||
}
|
||||
@ -373,10 +373,10 @@ void __vgic_v3_restore_aprs(struct vgic_v3_cpu_if *cpu_if)
|
||||
case 7:
|
||||
__vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[3], 3);
|
||||
__vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[2], 2);
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
case 6:
|
||||
__vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[1], 1);
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
default:
|
||||
__vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[0], 0);
|
||||
}
|
||||
@ -385,10 +385,10 @@ void __vgic_v3_restore_aprs(struct vgic_v3_cpu_if *cpu_if)
|
||||
case 7:
|
||||
__vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[3], 3);
|
||||
__vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[2], 2);
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
case 6:
|
||||
__vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[1], 1);
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
default:
|
||||
__vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[0], 0);
|
||||
}
|
||||
|
||||
@ -217,3 +217,8 @@ void __noreturn hyp_panic(struct kvm_cpu_context *host_ctxt)
|
||||
__hyp_call_panic(spsr, elr, par, host_ctxt);
|
||||
unreachable();
|
||||
}
|
||||
|
||||
asmlinkage void kvm_unexpected_el2_exception(void)
|
||||
{
|
||||
return __kvm_unexpected_el2_exception();
|
||||
}
|
||||
|
||||
@ -45,7 +45,7 @@ static u32 get_cpu_asid_bits(void)
|
||||
default:
|
||||
pr_warn("CPU%d: Unknown ASID size (%d); assuming 8-bit\n",
|
||||
smp_processor_id(), fld);
|
||||
/* Fallthrough */
|
||||
fallthrough;
|
||||
case 0:
|
||||
asid = 8;
|
||||
break;
|
||||
|
||||
@ -220,7 +220,7 @@ handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
|
||||
regs->a4 = -EINTR;
|
||||
break;
|
||||
}
|
||||
/* fallthrough */
|
||||
fallthrough;
|
||||
case -ERESTARTNOINTR:
|
||||
do_restart:
|
||||
regs->a4 = regs->orig_a4;
|
||||
@ -252,7 +252,7 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs,
|
||||
break;
|
||||
}
|
||||
|
||||
/* fallthrough */
|
||||
fallthrough;
|
||||
case -ERESTARTNOINTR:
|
||||
regs->a4 = regs->orig_a4;
|
||||
regs->pc -= 4;
|
||||
|
||||
@ -194,7 +194,7 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs)
|
||||
regs->a0 = -EINTR;
|
||||
break;
|
||||
}
|
||||
/* fallthrough */
|
||||
fallthrough;
|
||||
case -ERESTARTNOINTR:
|
||||
regs->a0 = regs->orig_a0;
|
||||
regs->pc -= TRAP0_SIZE;
|
||||
|
||||
@ -227,7 +227,7 @@ handle_restart(struct pt_regs *regs, struct k_sigaction *ka)
|
||||
regs->er0 = -EINTR;
|
||||
break;
|
||||
}
|
||||
/* fallthrough */
|
||||
fallthrough;
|
||||
case -ERESTARTNOINTR:
|
||||
do_restart:
|
||||
regs->er0 = regs->orig_er0;
|
||||
|
||||
@ -120,7 +120,7 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
|
||||
}
|
||||
case R_HEXAGON_HI16:
|
||||
value = (value>>16) & 0xffff;
|
||||
/* fallthrough */
|
||||
fallthrough;
|
||||
case R_HEXAGON_LO16:
|
||||
*location &= ~0x00c03fff;
|
||||
*location |= value & 0x3fff;
|
||||
|
||||
@ -155,7 +155,7 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs)
|
||||
regs->r00 = -EINTR;
|
||||
break;
|
||||
}
|
||||
/* Fall through */
|
||||
fallthrough;
|
||||
case -ERESTARTNOINTR:
|
||||
regs->r06 = regs->syscall_nr;
|
||||
pt_set_elr(regs, pt_elr(regs) - 4);
|
||||
|
||||
@ -163,7 +163,7 @@ kdump_init_notifier(struct notifier_block *self, unsigned long val, void *data)
|
||||
case DIE_INIT_MONARCH_LEAVE:
|
||||
if (!kdump_freeze_monarch)
|
||||
break;
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case DIE_INIT_SLAVE_LEAVE:
|
||||
case DIE_INIT_MONARCH_ENTER:
|
||||
case DIE_MCA_RENDZVOUS_LEAVE:
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user