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Merge tag 'omap-for-v5.0/fixes-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Device tree fixes for omaps for v5.0-rc cycle This series of dts fixes for omap devices fixes several device specific regressions: - The onenand timings for n950/n9 have been wrong for a while since we moved to dts based timings - A typo for the cpcap pmic is now producing erors during boot as the level should be 0 for unconfigurable triggering instead of 1 - Changes for ti-sysc for omap5 left uart3 with debug flags that should not be set - Fix a new dtc warning started showing up for omap3-gta04 grap_port - With the generic MMC card detection code we need to fix the gpio in dts for n900 and am335x-shc * tag 'omap-for-v5.0/fixes-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: am335x-shc.dts: fix wrong cd pin level ARM: dts: n900: fix mmc1 card detect gpio polarity ARM: dts: omap3-gta04: Fix graph_port warning ARM: dts: Remove unnecessary idle flags for omap5 uart3 ARM: dts: omap4-droid4: Fix typo in cpcap IRQ flags ARM: OMAP: dts: N950/N9: fix onenand timings Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
44a0f88467
@ -215,7 +215,7 @@ &mmc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
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bus-width = <0x4>;
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cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
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cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
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cd-inverted;
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max-frequency = <26000000>;
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vmmc-supply = <&vmmcsd_fixed>;
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@ -105,7 +105,7 @@ cpcap_usb2_phy: phy {
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interrupts-extended = <
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&cpcap 15 0 &cpcap 14 0 &cpcap 28 0 &cpcap 19 0
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&cpcap 18 0 &cpcap 17 0 &cpcap 16 0 &cpcap 49 0
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&cpcap 48 1
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&cpcap 48 0
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>;
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interrupt-names =
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"id_ground", "id_float", "se0conn", "vbusvld",
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@ -714,11 +714,7 @@ &venc {
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vdda-supply = <&vdac>;
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#address-cells = <1>;
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#size-cells = <0>;
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port {
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reg = <0>;
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venc_out: endpoint {
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remote-endpoint = <&opa_in>;
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ti,channels = <1>;
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@ -814,7 +814,7 @@ &mmc1 {
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/* For debugging, it is often good idea to remove this GPIO.
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It means you can remove back cover (to reboot by removing
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battery) and still use the MMC card. */
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cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */
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cd-gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* 160 */
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};
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/* most boards use vaux3, only some old versions use vmmc2 instead */
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@ -370,6 +370,19 @@ onenand@0,0 {
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compatible = "ti,omap2-onenand";
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reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
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/*
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* These timings are based on CONFIG_OMAP_GPMC_DEBUG=y reported
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* bootloader set values when booted with v4.19 using both N950
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* and N9 devices (OneNAND Manufacturer: Samsung):
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*
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* gpmc cs0 before gpmc_cs_program_settings:
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* cs0 GPMC_CS_CONFIG1: 0xfd001202
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* cs0 GPMC_CS_CONFIG2: 0x00181800
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* cs0 GPMC_CS_CONFIG3: 0x00030300
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* cs0 GPMC_CS_CONFIG4: 0x18001804
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* cs0 GPMC_CS_CONFIG5: 0x03171d1d
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* cs0 GPMC_CS_CONFIG6: 0x97080000
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*/
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gpmc,sync-read;
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gpmc,sync-write;
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gpmc,burst-length = <16>;
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@ -379,26 +392,27 @@ onenand@0,0 {
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gpmc,device-width = <2>;
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gpmc,mux-add-data = <2>;
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <87>;
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gpmc,cs-wr-off-ns = <87>;
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gpmc,cs-rd-off-ns = <122>;
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gpmc,cs-wr-off-ns = <122>;
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gpmc,adv-on-ns = <0>;
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gpmc,adv-rd-off-ns = <10>;
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gpmc,adv-wr-off-ns = <10>;
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gpmc,oe-on-ns = <15>;
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gpmc,oe-off-ns = <87>;
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gpmc,adv-rd-off-ns = <15>;
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gpmc,adv-wr-off-ns = <15>;
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gpmc,oe-on-ns = <20>;
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gpmc,oe-off-ns = <122>;
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gpmc,we-on-ns = <0>;
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gpmc,we-off-ns = <87>;
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gpmc,rd-cycle-ns = <112>;
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gpmc,wr-cycle-ns = <112>;
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gpmc,access-ns = <81>;
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gpmc,we-off-ns = <122>;
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gpmc,rd-cycle-ns = <148>;
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gpmc,wr-cycle-ns = <148>;
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gpmc,access-ns = <117>;
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gpmc,page-burst-access-ns = <15>;
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gpmc,bus-turnaround-ns = <0>;
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gpmc,cycle2cycle-delay-ns = <0>;
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gpmc,wait-monitoring-ns = <0>;
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gpmc,clk-activation-ns = <5>;
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gpmc,wr-data-mux-bus-ns = <30>;
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gpmc,wr-access-ns = <81>;
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gpmc,sync-clk-ps = <15000>;
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gpmc,clk-activation-ns = <10>;
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gpmc,wr-data-mux-bus-ns = <40>;
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gpmc,wr-access-ns = <117>;
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gpmc,sync-clk-ps = <15000>; /* TBC; Where this value came? */
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/*
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* MTD partition table corresponding to Nokia's MeeGo 1.2
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@ -1046,8 +1046,6 @@ SYSC_OMAP2_SOFTRESET |
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<SYSC_IDLE_SMART>,
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<SYSC_IDLE_SMART_WKUP>;
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ti,syss-mask = <1>;
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ti,no-reset-on-init;
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ti,no-idle-on-init;
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/* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
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clocks = <&l4per_clkctrl OMAP5_UART3_CLKCTRL 0>;
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clock-names = "fck";
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