mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 05:40:53 +07:00
drm/nouveau/bios: rework vbios shadowing
Refactored to allow shadowing of VBIOS images longer than 64KiB, which allows us to pass the VBIOS checksum test on certain boards. There's also a workaround for reading the PROM VBIOS on some chipsets. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs
parent
05a7c15d48
commit
4489b9835a
@ -65,195 +65,232 @@ static bool nv_cksum(const uint8_t *data, unsigned int length)
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}
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static int
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score_vbios(struct drm_device *dev, const uint8_t *data, const bool writeable)
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score_vbios(struct nvbios *bios, const bool writeable)
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{
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if (!(data[0] == 0x55 && data[1] == 0xAA)) {
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NV_TRACEWARN(dev, "... BIOS signature not found\n");
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if (!bios->data || bios->data[0] != 0x55 || bios->data[1] != 0xAA) {
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NV_TRACEWARN(bios->dev, "... BIOS signature not found\n");
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return 0;
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}
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if (nv_cksum(data, data[2] * 512)) {
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NV_TRACEWARN(dev, "... BIOS checksum invalid\n");
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if (nv_cksum(bios->data, bios->data[2] * 512)) {
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NV_TRACEWARN(bios->dev, "... BIOS checksum invalid\n");
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/* if a ro image is somewhat bad, it's probably all rubbish */
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return writeable ? 2 : 1;
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} else
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NV_TRACE(dev, "... appears to be valid\n");
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}
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NV_TRACE(bios->dev, "... appears to be valid\n");
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return 3;
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}
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static void load_vbios_prom(struct drm_device *dev, uint8_t *data)
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static void
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bios_shadow_prom(struct nvbios *bios)
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{
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struct drm_device *dev = bios->dev;
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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uint32_t pci_nv_20, save_pci_nv_20;
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int pcir_ptr;
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u32 pcireg, access;
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u16 pcir;
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int i;
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/* enable access to rom */
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if (dev_priv->card_type >= NV_50)
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pci_nv_20 = 0x88050;
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pcireg = 0x088050;
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else
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pci_nv_20 = NV_PBUS_PCI_NV_20;
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pcireg = NV_PBUS_PCI_NV_20;
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access = nv_mask(dev, pcireg, 0x00000001, 0x00000000);
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/* enable ROM access */
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save_pci_nv_20 = nvReadMC(dev, pci_nv_20);
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nvWriteMC(dev, pci_nv_20,
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save_pci_nv_20 & ~NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED);
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/* bail if no rom signature, with a workaround for a PROM reading
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* issue on some chipsets. the first read after a period of
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* inactivity returns the wrong result, so retry the first header
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* byte a few times before giving up as a workaround
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*/
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i = 16;
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do {
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if (nv_rd08(dev, NV_PROM_OFFSET + 0) == 0x55)
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break;
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} while (i--);
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/* bail if no rom signature */
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if (nv_rd08(dev, NV_PROM_OFFSET) != 0x55 ||
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nv_rd08(dev, NV_PROM_OFFSET + 1) != 0xaa)
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if (!i || nv_rd08(dev, NV_PROM_OFFSET + 1) != 0xaa)
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goto out;
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/* additional check (see note below) - read PCI record header */
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pcir_ptr = nv_rd08(dev, NV_PROM_OFFSET + 0x18) |
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pcir = nv_rd08(dev, NV_PROM_OFFSET + 0x18) |
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nv_rd08(dev, NV_PROM_OFFSET + 0x19) << 8;
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if (nv_rd08(dev, NV_PROM_OFFSET + pcir_ptr) != 'P' ||
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nv_rd08(dev, NV_PROM_OFFSET + pcir_ptr + 1) != 'C' ||
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nv_rd08(dev, NV_PROM_OFFSET + pcir_ptr + 2) != 'I' ||
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nv_rd08(dev, NV_PROM_OFFSET + pcir_ptr + 3) != 'R')
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if (nv_rd08(dev, NV_PROM_OFFSET + pcir + 0) != 'P' ||
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nv_rd08(dev, NV_PROM_OFFSET + pcir + 1) != 'C' ||
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nv_rd08(dev, NV_PROM_OFFSET + pcir + 2) != 'I' ||
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nv_rd08(dev, NV_PROM_OFFSET + pcir + 3) != 'R')
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goto out;
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/* on some 6600GT/6800LE prom reads are messed up. nvclock alleges a
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* a good read may be obtained by waiting or re-reading (cargocult: 5x)
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* each byte. we'll hope pramin has something usable instead
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*/
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for (i = 0; i < NV_PROM_SIZE; i++)
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data[i] = nv_rd08(dev, NV_PROM_OFFSET + i);
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/* read entire bios image to system memory */
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bios->length = nv_rd08(dev, NV_PROM_OFFSET + 2) * 512;
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bios->data = kmalloc(bios->length, GFP_KERNEL);
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if (bios->data) {
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for (i = 0; i < bios->length; i++)
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bios->data[i] = nv_rd08(dev, NV_PROM_OFFSET + i);
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}
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out:
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/* disable ROM access */
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nvWriteMC(dev, pci_nv_20,
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save_pci_nv_20 | NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED);
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/* disable access to rom */
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nv_wr32(dev, pcireg, access);
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}
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static void load_vbios_pramin(struct drm_device *dev, uint8_t *data)
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static void
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bios_shadow_pramin(struct nvbios *bios)
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{
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struct drm_device *dev = bios->dev;
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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uint32_t old_bar0_pramin = 0;
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u32 bar0 = 0;
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int i;
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if (dev_priv->card_type >= NV_50) {
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u64 addr = (u64)(nv_rd32(dev, 0x619f04) & 0xffffff00) << 8;
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if (!addr) {
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addr = (u64)nv_rd32(dev, 0x1700) << 16;
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addr = (u64)nv_rd32(dev, 0x001700) << 16;
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addr += 0xf0000;
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}
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old_bar0_pramin = nv_rd32(dev, 0x1700);
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nv_wr32(dev, 0x1700, addr >> 16);
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bar0 = nv_mask(dev, 0x001700, 0xffffffff, addr >> 16);
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}
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/* bail if no rom signature */
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if (nv_rd08(dev, NV_PRAMIN_OFFSET) != 0x55 ||
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if (nv_rd08(dev, NV_PRAMIN_OFFSET + 0) != 0x55 ||
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nv_rd08(dev, NV_PRAMIN_OFFSET + 1) != 0xaa)
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goto out;
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for (i = 0; i < NV_PROM_SIZE; i++)
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data[i] = nv_rd08(dev, NV_PRAMIN_OFFSET + i);
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bios->length = nv_rd08(dev, NV_PRAMIN_OFFSET + 2) * 512;
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bios->data = kmalloc(bios->length, GFP_KERNEL);
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if (bios->data) {
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for (i = 0; i < bios->length; i++)
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bios->data[i] = nv_rd08(dev, NV_PRAMIN_OFFSET + i);
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}
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out:
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if (dev_priv->card_type >= NV_50)
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nv_wr32(dev, 0x1700, old_bar0_pramin);
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nv_wr32(dev, 0x001700, bar0);
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}
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static void load_vbios_pci(struct drm_device *dev, uint8_t *data)
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static void
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bios_shadow_pci(struct nvbios *bios)
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{
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void __iomem *rom = NULL;
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size_t rom_len;
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int ret;
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struct pci_dev *pdev = bios->dev->pdev;
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size_t length;
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ret = pci_enable_rom(dev->pdev);
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if (ret)
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return;
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rom = pci_map_rom(dev->pdev, &rom_len);
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if (!rom)
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goto out;
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memcpy_fromio(data, rom, rom_len);
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pci_unmap_rom(dev->pdev, rom);
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out:
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pci_disable_rom(dev->pdev);
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}
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static void load_vbios_acpi(struct drm_device *dev, uint8_t *data)
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{
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int i;
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int ret;
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int size = 64 * 1024;
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if (!nouveau_acpi_rom_supported(dev->pdev))
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return;
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for (i = 0; i < (size / ROM_BIOS_PAGE); i++) {
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ret = nouveau_acpi_get_bios_chunk(data,
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(i * ROM_BIOS_PAGE),
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ROM_BIOS_PAGE);
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if (ret <= 0)
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break;
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if (!pci_enable_rom(pdev)) {
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void __iomem *rom = pci_map_rom(pdev, &length);
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if (rom) {
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bios->data = kmalloc(length, GFP_KERNEL);
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if (bios->data) {
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memcpy_fromio(bios->data, rom, length);
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bios->length = length;
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}
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pci_unmap_rom(pdev, rom);
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}
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pci_disable_rom(pdev);
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}
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}
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static void
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bios_shadow_acpi(struct nvbios *bios)
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{
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struct pci_dev *pdev = bios->dev->pdev;
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int ptr, len, ret;
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u8 data[3];
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if (!nouveau_acpi_rom_supported(pdev))
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return;
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ret = nouveau_acpi_get_bios_chunk(data, 0, sizeof(data));
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if (ret != sizeof(data))
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return;
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bios->length = min(data[2] * 512, 65536);
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bios->data = kmalloc(bios->length, GFP_KERNEL);
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if (!bios->data)
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return;
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len = bios->length;
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ptr = 0;
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while (len) {
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int size = (len > ROM_BIOS_PAGE) ? ROM_BIOS_PAGE : len;
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ret = nouveau_acpi_get_bios_chunk(bios->data, ptr, size);
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if (ret != size) {
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kfree(bios->data);
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bios->data = NULL;
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return;
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}
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len -= size;
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ptr += size;
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}
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}
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struct methods {
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const char desc[8];
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void (*loadbios)(struct drm_device *, uint8_t *);
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void (*shadow)(struct nvbios *);
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const bool rw;
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int score;
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u32 size;
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u8 *data;
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};
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static struct methods shadow_methods[] = {
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{ "PRAMIN", load_vbios_pramin, true },
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{ "PROM", load_vbios_prom, false },
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{ "ACPI", load_vbios_acpi, true },
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{ "PCIROM", load_vbios_pci, true },
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};
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#define NUM_SHADOW_METHODS ARRAY_SIZE(shadow_methods)
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static bool NVShadowVBIOS(struct drm_device *dev, uint8_t *data)
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static bool
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bios_shadow(struct drm_device *dev)
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{
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struct methods *methods = shadow_methods;
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int testscore = 3;
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int scores[NUM_SHADOW_METHODS], i;
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struct methods shadow_methods[] = {
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{ "PRAMIN", bios_shadow_pramin, true, 0, 0, NULL },
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{ "PROM", bios_shadow_prom, false, 0, 0, NULL },
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{ "ACPI", bios_shadow_acpi, true, 0, 0, NULL },
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{ "PCIROM", bios_shadow_pci, true, 0, 0, NULL },
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{}
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};
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nvbios *bios = &dev_priv->vbios;
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struct methods *mthd, *best;
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if (nouveau_vbios) {
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for (i = 0; i < NUM_SHADOW_METHODS; i++)
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if (!strcasecmp(nouveau_vbios, methods[i].desc))
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break;
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mthd = shadow_methods;
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do {
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if (strcasecmp(nouveau_vbios, mthd->desc))
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continue;
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NV_INFO(dev, "VBIOS source: %s\n", mthd->desc);
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if (i < NUM_SHADOW_METHODS) {
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NV_INFO(dev, "Attempting to use BIOS image from %s\n",
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methods[i].desc);
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methods[i].loadbios(dev, data);
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if (score_vbios(dev, data, methods[i].rw))
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mthd->shadow(bios);
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mthd->score = score_vbios(bios, mthd->rw);
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if (mthd->score)
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return true;
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}
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} while ((++mthd)->shadow);
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NV_ERROR(dev, "VBIOS source \'%s\' invalid\n", nouveau_vbios);
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}
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for (i = 0; i < NUM_SHADOW_METHODS; i++) {
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NV_TRACE(dev, "Attempting to load BIOS image from %s\n",
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methods[i].desc);
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data[0] = data[1] = 0; /* avoid reuse of previous image */
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methods[i].loadbios(dev, data);
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scores[i] = score_vbios(dev, data, methods[i].rw);
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if (scores[i] == testscore)
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mthd = shadow_methods;
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do {
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NV_TRACE(dev, "Checking %s for VBIOS\n", mthd->desc);
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mthd->shadow(bios);
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mthd->score = score_vbios(bios, mthd->rw);
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mthd->size = bios->length;
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mthd->data = bios->data;
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} while (mthd->score != 3 && (++mthd)->shadow);
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mthd = shadow_methods;
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best = mthd;
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do {
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if (mthd->score > best->score) {
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kfree(best->data);
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best = mthd;
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}
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} while ((++mthd)->shadow);
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if (best->score) {
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NV_TRACE(dev, "Using VBIOS from %s\n", best->desc);
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bios->length = best->size;
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bios->data = best->data;
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return true;
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}
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while (--testscore > 0) {
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for (i = 0; i < NUM_SHADOW_METHODS; i++) {
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if (scores[i] == testscore) {
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NV_TRACE(dev, "Using BIOS image from %s\n",
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methods[i].desc);
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methods[i].loadbios(dev, data);
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return true;
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}
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}
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}
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NV_ERROR(dev, "No valid BIOS image found\n");
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NV_ERROR(dev, "No valid VBIOS image found\n");
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return false;
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}
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@ -6334,11 +6371,7 @@ static bool NVInitVBIOS(struct drm_device *dev)
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spin_lock_init(&bios->lock);
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bios->dev = dev;
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if (!NVShadowVBIOS(dev, bios->data))
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return false;
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bios->length = NV_PROM_SIZE;
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return true;
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return bios_shadow(dev);
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}
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static int nouveau_parse_vbios_struct(struct drm_device *dev)
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@ -6498,6 +6531,10 @@ nouveau_bios_init(struct drm_device *dev)
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void
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nouveau_bios_takedown(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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nouveau_mxm_fini(dev);
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nouveau_i2c_fini(dev);
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kfree(dev_priv->vbios.data);
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}
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@ -211,6 +211,8 @@ struct nvbios {
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NVBIOS_BIT
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} type;
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uint16_t offset;
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uint32_t length;
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uint8_t *data;
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uint8_t chip_version;
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@ -221,8 +223,6 @@ struct nvbios {
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spinlock_t lock;
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uint8_t data[NV_PROM_SIZE];
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unsigned int length;
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bool execute;
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uint8_t major_version;
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