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arm64: dts: exynos: Add UFS node to Exynos7

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Add UFS and UFS-PHY device nods to Exynos7 SoC and Espresso board.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Tested-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit is contained in:
Alim Akhtar 2020-05-28 06:46:58 +05:30 committed by Krzysztof Kozlowski
parent b3a9e3b962
commit 4464005a12
2 changed files with 45 additions and 2 deletions
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4
arch/arm64/boot/dts/exynos/exynos7-espresso.dts
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@ -406,6 +406,10 @@ usb3drd_boost_en: usb3drd-boost-en {
};
};
&ufs {
status = "okay";
};
&usbdrd_phy {
vbus-supply = <&usb30_vbus_reg>;
vbus-boost-supply = <&usb3drd_boost_5v>;

43
arch/arm64/boot/dts/exynos/exynos7.dtsi
View File

@ -220,9 +220,14 @@ clock_fsys1: clock-controller@156e0000 {
#clock-cells = <1>;
clocks = <&fin_pll>, <&clock_top1 DOUT_ACLK_FSYS1_200>,
<&clock_top1 DOUT_SCLK_MMC0>,
<&clock_top1 DOUT_SCLK_MMC1>;
<&clock_top1 DOUT_SCLK_MMC1>,
<&clock_top1 DOUT_SCLK_UFSUNIPRO20>,
<&clock_top1 DOUT_SCLK_PHY_FSYS1>,
<&clock_top1 DOUT_SCLK_PHY_FSYS1_26M>;
clock-names = "fin_pll", "dout_aclk_fsys1_200",
"dout_sclk_mmc0", "dout_sclk_mmc1";
"dout_sclk_mmc0", "dout_sclk_mmc1",
"dout_sclk_ufsunipro20", "dout_sclk_phy_fsys1",
"dout_sclk_phy_fsys1_26m";
};
serial_0: serial@13630000 {
@ -601,6 +606,40 @@ atlas_thermal: cluster0-thermal {
};
};
ufs: ufs@15570000 {
compatible = "samsung,exynos7-ufs";
reg = <0x15570000 0x100>, /* 0: HCI standard */
<0x15570100 0x100>, /* 1: Vendor specificed */
<0x15571000 0x200>, /* 2: UNIPRO */
<0x15572000 0x300>; /* 3: UFS protector */
reg-names = "hci", "vs_hci", "unipro", "ufsp";
interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock_fsys1 ACLK_UFS20_LINK>,
<&clock_fsys1 SCLK_UFSUNIPRO20_USER>;
clock-names = "core_clk", "sclk_unipro_main";
freq-table-hz = <0 0>, <0 0>;
pinctrl-names = "default";
pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
phys = <&ufs_phy>;
phy-names = "ufs-phy";
status = "disabled";
};
ufs_phy: ufs-phy@15571800 {
compatible = "samsung,exynos7-ufs-phy";
reg = <0x15571800 0x240>;
reg-names = "phy-pma";
samsung,pmu-syscon = <&pmu_system_controller>;
#phy-cells = <0>;
clocks = <&clock_fsys1 SCLK_COMBO_PHY_EMBEDDED_26M>,
<&clock_fsys1 PHYCLK_UFS20_RX1_SYMBOL_USER>,
<&clock_fsys1 PHYCLK_UFS20_RX0_SYMBOL_USER>,
<&clock_fsys1 PHYCLK_UFS20_TX0_SYMBOL_USER>;
clock-names = "ref_clk", "rx1_symbol_clk",
"rx0_symbol_clk",
"tx0_symbol_clk";
};
usbdrd_phy: phy@15500000 {
compatible = "samsung,exynos7-usbdrd-phy";
reg = <0x15500000 0x100>;