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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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I/OAT: code cleanup from checkpatch output
Take care of a bunch of little code nits in ioatdma files Signed-off-by: Shannon Nelson <shannon.nelson@intel.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Shannon Nelson
Linus Torvalds
parent
1fda5f4e96
commit
43d6e369d4
@ -1,10 +1,10 @@
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/*
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* Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
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* Intel I/OAT DMA Linux driver
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* Copyright(c) 2004 - 2007 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 2 of the License, or (at your option)
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* any later version.
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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@ -12,11 +12,12 @@
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc., 59
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* Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* The full GNU General Public License is included in this distribution in
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* the file called "COPYING".
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*
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* The full GNU General Public License is included in this distribution in the
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* file called COPYING.
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*/
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/*
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@ -35,17 +36,22 @@
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#include "ioatdma_registers.h"
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#include "ioatdma_hw.h"
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#define INITIAL_IOAT_DESC_COUNT 128
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#define to_ioat_chan(chan) container_of(chan, struct ioat_dma_chan, common)
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#define to_ioat_device(dev) container_of(dev, struct ioat_device, common)
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#define to_ioat_desc(lh) container_of(lh, struct ioat_desc_sw, node)
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#define tx_to_ioat_desc(tx) container_of(tx, struct ioat_desc_sw, async_tx)
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/* internal functions */
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static int __devinit ioat_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
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static void ioat_dma_start_null_desc(struct ioat_dma_chan *ioat_chan);
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static void ioat_dma_memcpy_cleanup(struct ioat_dma_chan *ioat_chan);
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static int __devinit ioat_probe(struct pci_dev *pdev,
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const struct pci_device_id *ent);
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static void ioat_shutdown(struct pci_dev *pdev);
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static void __devexit ioat_remove(struct pci_dev *pdev);
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static int enumerate_dma_channels(struct ioat_device *device)
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static int ioat_dma_enumerate_channels(struct ioat_device *device)
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{
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u8 xfercap_scale;
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u32 xfercap;
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@ -73,13 +79,14 @@ static int enumerate_dma_channels(struct ioat_device *device)
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/* This should be made common somewhere in dmaengine.c */
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ioat_chan->common.device = &device->common;
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list_add_tail(&ioat_chan->common.device_node,
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&device->common.channels);
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&device->common.channels);
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}
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return device->common.chancnt;
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}
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static void
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ioat_set_src(dma_addr_t addr, struct dma_async_tx_descriptor *tx, int index)
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static void ioat_set_src(dma_addr_t addr,
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struct dma_async_tx_descriptor *tx,
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int index)
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{
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struct ioat_desc_sw *iter, *desc = tx_to_ioat_desc(tx);
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struct ioat_dma_chan *ioat_chan = to_ioat_chan(tx->chan);
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@ -93,8 +100,9 @@ ioat_set_src(dma_addr_t addr, struct dma_async_tx_descriptor *tx, int index)
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}
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static void
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ioat_set_dest(dma_addr_t addr, struct dma_async_tx_descriptor *tx, int index)
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static void ioat_set_dest(dma_addr_t addr,
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struct dma_async_tx_descriptor *tx,
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int index)
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{
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struct ioat_desc_sw *iter, *desc = tx_to_ioat_desc(tx);
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struct ioat_dma_chan *ioat_chan = to_ioat_chan(tx->chan);
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@ -107,8 +115,7 @@ ioat_set_dest(dma_addr_t addr, struct dma_async_tx_descriptor *tx, int index)
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}
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}
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static dma_cookie_t
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ioat_tx_submit(struct dma_async_tx_descriptor *tx)
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static dma_cookie_t ioat_tx_submit(struct dma_async_tx_descriptor *tx)
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{
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struct ioat_dma_chan *ioat_chan = to_ioat_chan(tx->chan);
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struct ioat_desc_sw *desc = tx_to_ioat_desc(tx);
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@ -146,8 +153,8 @@ ioat_tx_submit(struct dma_async_tx_descriptor *tx)
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}
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static struct ioat_desc_sw *ioat_dma_alloc_descriptor(
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struct ioat_dma_chan *ioat_chan,
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gfp_t flags)
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struct ioat_dma_chan *ioat_chan,
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gfp_t flags)
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{
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struct ioat_dma_descriptor *desc;
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struct ioat_desc_sw *desc_sw;
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@ -177,10 +184,6 @@ static struct ioat_desc_sw *ioat_dma_alloc_descriptor(
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return desc_sw;
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}
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#define INITIAL_IOAT_DESC_COUNT 128
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static void ioat_start_null_desc(struct ioat_dma_chan *ioat_chan);
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/* returns the actual number of allocated descriptors */
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static int ioat_dma_alloc_chan_resources(struct dma_chan *chan)
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{
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@ -195,15 +198,16 @@ static int ioat_dma_alloc_chan_resources(struct dma_chan *chan)
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if (!list_empty(&ioat_chan->free_desc))
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return INITIAL_IOAT_DESC_COUNT;
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/* Setup register to interrupt and write completion status on error */
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/* Setup register to interrupt and write completion status on error */
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chanctrl = IOAT_CHANCTRL_ERR_INT_EN |
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IOAT_CHANCTRL_ANY_ERR_ABORT_EN |
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IOAT_CHANCTRL_ERR_COMPLETION_EN;
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writew(chanctrl, ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
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writew(chanctrl, ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
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chanerr = readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET);
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if (chanerr) {
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printk("IOAT: CHANERR = %x, clearing\n", chanerr);
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dev_err(&ioat_chan->device->pdev->dev,
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"ioatdma: CHANERR = %x, clearing\n", chanerr);
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writel(chanerr, ioat_chan->reg_base + IOAT_CHANERR_OFFSET);
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}
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@ -211,7 +215,8 @@ static int ioat_dma_alloc_chan_resources(struct dma_chan *chan)
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for (i = 0; i < INITIAL_IOAT_DESC_COUNT; i++) {
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desc = ioat_dma_alloc_descriptor(ioat_chan, GFP_KERNEL);
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if (!desc) {
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printk(KERN_ERR "IOAT: Only %d initial descriptors\n", i);
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dev_err(&ioat_chan->device->pdev->dev,
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"ioatdma: Only %d initial descriptors\n", i);
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break;
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}
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list_add_tail(&desc->node, &tmp_list);
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@ -224,8 +229,8 @@ static int ioat_dma_alloc_chan_resources(struct dma_chan *chan)
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/* doing 2 32bit writes to mmio since 1 64b write doesn't work */
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ioat_chan->completion_virt =
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pci_pool_alloc(ioat_chan->device->completion_pool,
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GFP_KERNEL,
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&ioat_chan->completion_addr);
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GFP_KERNEL,
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&ioat_chan->completion_addr);
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memset(ioat_chan->completion_virt, 0,
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sizeof(*ioat_chan->completion_virt));
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writel(((u64) ioat_chan->completion_addr) & 0x00000000FFFFFFFF,
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@ -233,12 +238,10 @@ static int ioat_dma_alloc_chan_resources(struct dma_chan *chan)
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writel(((u64) ioat_chan->completion_addr) >> 32,
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ioat_chan->reg_base + IOAT_CHANCMP_OFFSET_HIGH);
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ioat_start_null_desc(ioat_chan);
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ioat_dma_start_null_desc(ioat_chan);
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return i;
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}
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static void ioat_dma_memcpy_cleanup(struct ioat_dma_chan *ioat_chan);
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static void ioat_dma_free_chan_resources(struct dma_chan *chan)
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{
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struct ioat_dma_chan *ioat_chan = to_ioat_chan(chan);
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@ -268,19 +271,22 @@ static void ioat_dma_free_chan_resources(struct dma_chan *chan)
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spin_unlock_bh(&ioat_chan->desc_lock);
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pci_pool_free(ioat_device->completion_pool,
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ioat_chan->completion_virt,
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ioat_chan->completion_addr);
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ioat_chan->completion_virt,
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ioat_chan->completion_addr);
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/* one is ok since we left it on there on purpose */
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if (in_use_descs > 1)
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printk(KERN_ERR "IOAT: Freeing %d in use descriptors!\n",
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dev_err(&ioat_chan->device->pdev->dev,
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"ioatdma: Freeing %d in use descriptors!\n",
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in_use_descs - 1);
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ioat_chan->last_completion = ioat_chan->completion_addr = 0;
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}
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static struct dma_async_tx_descriptor *
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ioat_dma_prep_memcpy(struct dma_chan *chan, size_t len, int int_en)
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static struct dma_async_tx_descriptor *ioat_dma_prep_memcpy(
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struct dma_chan *chan,
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size_t len,
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int int_en)
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{
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struct ioat_dma_chan *ioat_chan = to_ioat_chan(chan);
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struct ioat_desc_sw *first, *prev, *new;
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@ -343,12 +349,11 @@ ioat_dma_prep_memcpy(struct dma_chan *chan, size_t len, int int_en)
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return new ? &new->async_tx : NULL;
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}
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/**
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* ioat_dma_memcpy_issue_pending - push potentially unrecognized appended descriptors to hw
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* ioat_dma_memcpy_issue_pending - push potentially unrecognized appended
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* descriptors to hw
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* @chan: DMA channel handle
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*/
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static void ioat_dma_memcpy_issue_pending(struct dma_chan *chan)
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{
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struct ioat_dma_chan *ioat_chan = to_ioat_chan(chan);
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@ -360,15 +365,15 @@ static void ioat_dma_memcpy_issue_pending(struct dma_chan *chan)
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}
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}
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static void ioat_dma_memcpy_cleanup(struct ioat_dma_chan *chan)
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static void ioat_dma_memcpy_cleanup(struct ioat_dma_chan *ioat_chan)
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{
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unsigned long phys_complete;
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struct ioat_desc_sw *desc, *_desc;
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dma_cookie_t cookie = 0;
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prefetch(chan->completion_virt);
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prefetch(ioat_chan->completion_virt);
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if (!spin_trylock(&chan->cleanup_lock))
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if (!spin_trylock(&ioat_chan->cleanup_lock))
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return;
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/* The completion writeback can happen at any time,
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@ -378,26 +383,27 @@ static void ioat_dma_memcpy_cleanup(struct ioat_dma_chan *chan)
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#if (BITS_PER_LONG == 64)
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phys_complete =
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chan->completion_virt->full & IOAT_CHANSTS_COMPLETED_DESCRIPTOR_ADDR;
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ioat_chan->completion_virt->full & IOAT_CHANSTS_COMPLETED_DESCRIPTOR_ADDR;
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#else
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phys_complete = chan->completion_virt->low & IOAT_LOW_COMPLETION_MASK;
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phys_complete = ioat_chan->completion_virt->low & IOAT_LOW_COMPLETION_MASK;
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#endif
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if ((chan->completion_virt->full & IOAT_CHANSTS_DMA_TRANSFER_STATUS) ==
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IOAT_CHANSTS_DMA_TRANSFER_STATUS_HALTED) {
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printk("IOAT: Channel halted, chanerr = %x\n",
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readl(chan->reg_base + IOAT_CHANERR_OFFSET));
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if ((ioat_chan->completion_virt->full & IOAT_CHANSTS_DMA_TRANSFER_STATUS) ==
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IOAT_CHANSTS_DMA_TRANSFER_STATUS_HALTED) {
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dev_err(&ioat_chan->device->pdev->dev,
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"ioatdma: Channel halted, chanerr = %x\n",
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readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET));
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/* TODO do something to salvage the situation */
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}
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if (phys_complete == chan->last_completion) {
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spin_unlock(&chan->cleanup_lock);
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if (phys_complete == ioat_chan->last_completion) {
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spin_unlock(&ioat_chan->cleanup_lock);
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return;
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}
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spin_lock_bh(&chan->desc_lock);
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list_for_each_entry_safe(desc, _desc, &chan->used_desc, node) {
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spin_lock_bh(&ioat_chan->desc_lock);
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list_for_each_entry_safe(desc, _desc, &ioat_chan->used_desc, node) {
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/*
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* Incoming DMA requests may use multiple descriptors, due to
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@ -407,31 +413,36 @@ static void ioat_dma_memcpy_cleanup(struct ioat_dma_chan *chan)
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if (desc->async_tx.cookie) {
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cookie = desc->async_tx.cookie;
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/* yes we are unmapping both _page and _single alloc'd
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regions with unmap_page. Is this *really* that bad?
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*/
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pci_unmap_page(chan->device->pdev,
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/*
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* yes we are unmapping both _page and _single alloc'd
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* regions with unmap_page. Is this *really* that bad?
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*/
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pci_unmap_page(ioat_chan->device->pdev,
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pci_unmap_addr(desc, dst),
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pci_unmap_len(desc, len),
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PCI_DMA_FROMDEVICE);
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pci_unmap_page(chan->device->pdev,
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pci_unmap_page(ioat_chan->device->pdev,
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pci_unmap_addr(desc, src),
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pci_unmap_len(desc, len),
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PCI_DMA_TODEVICE);
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}
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if (desc->async_tx.phys != phys_complete) {
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/* a completed entry, but not the last, so cleanup
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/*
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* a completed entry, but not the last, so cleanup
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* if the client is done with the descriptor
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*/
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if (desc->async_tx.ack) {
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list_del(&desc->node);
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list_add_tail(&desc->node, &chan->free_desc);
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list_add_tail(&desc->node,
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&ioat_chan->free_desc);
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} else
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desc->async_tx.cookie = 0;
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} else {
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/* last used desc. Do not remove, so we can append from
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it, but don't look at it next time, either */
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/*
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* last used desc. Do not remove, so we can append from
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* it, but don't look at it next time, either
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*/
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desc->async_tx.cookie = 0;
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/* TODO check status bits? */
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@ -439,13 +450,13 @@ static void ioat_dma_memcpy_cleanup(struct ioat_dma_chan *chan)
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}
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}
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spin_unlock_bh(&chan->desc_lock);
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spin_unlock_bh(&ioat_chan->desc_lock);
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chan->last_completion = phys_complete;
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ioat_chan->last_completion = phys_complete;
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if (cookie != 0)
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chan->completed_cookie = cookie;
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ioat_chan->completed_cookie = cookie;
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spin_unlock(&chan->cleanup_lock);
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spin_unlock(&ioat_chan->cleanup_lock);
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}
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static void ioat_dma_dependency_added(struct dma_chan *chan)
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@ -466,11 +477,10 @@ static void ioat_dma_dependency_added(struct dma_chan *chan)
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* @done: if not %NULL, updated with last completed transaction
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* @used: if not %NULL, updated with last used transaction
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*/
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static enum dma_status ioat_dma_is_complete(struct dma_chan *chan,
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dma_cookie_t cookie,
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dma_cookie_t *done,
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dma_cookie_t *used)
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dma_cookie_t cookie,
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dma_cookie_t *done,
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dma_cookie_t *used)
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{
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struct ioat_dma_chan *ioat_chan = to_ioat_chan(chan);
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dma_cookie_t last_used;
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@ -481,7 +491,7 @@ static enum dma_status ioat_dma_is_complete(struct dma_chan *chan,
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last_complete = ioat_chan->completed_cookie;
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if (done)
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*done= last_complete;
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*done = last_complete;
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if (used)
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*used = last_used;
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@ -495,7 +505,7 @@ static enum dma_status ioat_dma_is_complete(struct dma_chan *chan,
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last_complete = ioat_chan->completed_cookie;
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if (done)
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*done= last_complete;
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*done = last_complete;
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if (used)
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*used = last_used;
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@ -538,13 +548,13 @@ static irqreturn_t ioat_do_interrupt(int irq, void *data)
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attnstatus = readl(instance->reg_base + IOAT_ATTNSTATUS_OFFSET);
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printk(KERN_ERR "ioatdma error: interrupt! status %lx\n", attnstatus);
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printk(KERN_ERR "ioatdma: interrupt! status %lx\n", attnstatus);
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writeb(intrctrl, instance->reg_base + IOAT_INTRCTRL_OFFSET);
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return IRQ_HANDLED;
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}
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static void ioat_start_null_desc(struct ioat_dma_chan *ioat_chan)
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static void ioat_dma_start_null_desc(struct ioat_dma_chan *ioat_chan)
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{
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struct ioat_desc_sw *desc;
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@ -608,9 +618,11 @@ static int ioat_self_test(struct ioat_device *device)
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/* Start copy, using first DMA channel */
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dma_chan = container_of(device->common.channels.next,
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struct dma_chan,
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device_node);
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struct dma_chan,
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device_node);
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if (ioat_dma_alloc_chan_resources(dma_chan) < 1) {
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dev_err(&device->pdev->dev,
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"selftest cannot allocate chan resource\n");
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err = -ENODEV;
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goto out;
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}
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@ -628,12 +640,14 @@ static int ioat_self_test(struct ioat_device *device)
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||||
msleep(1);
|
||||
|
||||
if (ioat_dma_is_complete(dma_chan, cookie, NULL, NULL) != DMA_SUCCESS) {
|
||||
printk(KERN_ERR "ioatdma: Self-test copy timed out, disabling\n");
|
||||
dev_err(&device->pdev->dev,
|
||||
"ioatdma: Self-test copy timed out, disabling\n");
|
||||
err = -ENODEV;
|
||||
goto free_resources;
|
||||
}
|
||||
if (memcmp(src, dest, IOAT_TEST_SIZE)) {
|
||||
printk(KERN_ERR "ioatdma: Self-test copy failed compare, disabling\n");
|
||||
dev_err(&device->pdev->dev,
|
||||
"ioatdma: Self-test copy failed compare, disabling\n");
|
||||
err = -ENODEV;
|
||||
goto free_resources;
|
||||
}
|
||||
@ -647,7 +661,7 @@ static int ioat_self_test(struct ioat_device *device)
|
||||
}
|
||||
|
||||
static int __devinit ioat_probe(struct pci_dev *pdev,
|
||||
const struct pci_device_id *ent)
|
||||
const struct pci_device_id *ent)
|
||||
{
|
||||
int err;
|
||||
unsigned long mmio_start, mmio_len;
|
||||
@ -691,7 +705,9 @@ static int __devinit ioat_probe(struct pci_dev *pdev,
|
||||
goto err_dma_pool;
|
||||
}
|
||||
|
||||
device->completion_pool = pci_pool_create("completion_pool", pdev, sizeof(u64), SMP_CACHE_BYTES, SMP_CACHE_BYTES);
|
||||
device->completion_pool = pci_pool_create("completion_pool", pdev,
|
||||
sizeof(u64), SMP_CACHE_BYTES,
|
||||
SMP_CACHE_BYTES);
|
||||
if (!device->completion_pool) {
|
||||
err = -ENOMEM;
|
||||
goto err_completion_pool;
|
||||
@ -713,22 +729,26 @@ static int __devinit ioat_probe(struct pci_dev *pdev,
|
||||
|
||||
device->reg_base = reg_base;
|
||||
|
||||
writeb(IOAT_INTRCTRL_MASTER_INT_EN, device->reg_base + IOAT_INTRCTRL_OFFSET);
|
||||
writeb(IOAT_INTRCTRL_MASTER_INT_EN,
|
||||
device->reg_base + IOAT_INTRCTRL_OFFSET);
|
||||
pci_set_master(pdev);
|
||||
|
||||
INIT_LIST_HEAD(&device->common.channels);
|
||||
enumerate_dma_channels(device);
|
||||
ioat_dma_enumerate_channels(device);
|
||||
|
||||
dma_cap_set(DMA_MEMCPY, device->common.cap_mask);
|
||||
device->common.device_alloc_chan_resources = ioat_dma_alloc_chan_resources;
|
||||
device->common.device_free_chan_resources = ioat_dma_free_chan_resources;
|
||||
device->common.device_alloc_chan_resources =
|
||||
ioat_dma_alloc_chan_resources;
|
||||
device->common.device_free_chan_resources =
|
||||
ioat_dma_free_chan_resources;
|
||||
device->common.device_prep_dma_memcpy = ioat_dma_prep_memcpy;
|
||||
device->common.device_is_tx_complete = ioat_dma_is_complete;
|
||||
device->common.device_issue_pending = ioat_dma_memcpy_issue_pending;
|
||||
device->common.device_dependency_added = ioat_dma_dependency_added;
|
||||
device->common.dev = &pdev->dev;
|
||||
printk(KERN_INFO "Intel(R) I/OAT DMA Engine found, %d channels\n",
|
||||
device->common.chancnt);
|
||||
printk(KERN_INFO
|
||||
"ioatdma: Intel(R) I/OAT DMA Engine found, %d channels\n",
|
||||
device->common.chancnt);
|
||||
|
||||
err = ioat_self_test(device);
|
||||
if (err)
|
||||
@ -754,7 +774,8 @@ static int __devinit ioat_probe(struct pci_dev *pdev,
|
||||
pci_disable_device(pdev);
|
||||
err_enable_device:
|
||||
|
||||
printk(KERN_ERR "Intel(R) I/OAT DMA Engine initialization failed\n");
|
||||
printk(KERN_INFO
|
||||
"ioatdma: Intel(R) I/OAT DMA Engine initialization failed\n");
|
||||
|
||||
return err;
|
||||
}
|
||||
@ -786,7 +807,8 @@ static void __devexit ioat_remove(struct pci_dev *pdev)
|
||||
iounmap(device->reg_base);
|
||||
pci_release_regions(pdev);
|
||||
pci_disable_device(pdev);
|
||||
list_for_each_entry_safe(chan, _chan, &device->common.channels, device_node) {
|
||||
list_for_each_entry_safe(chan, _chan,
|
||||
&device->common.channels, device_node) {
|
||||
ioat_chan = to_ioat_chan(chan);
|
||||
list_del(&chan->device_node);
|
||||
kfree(ioat_chan);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user