mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-14 11:46:46 +07:00
Merge branch 'mlxsw-hwmon'
Jiri Pirko says: ==================== mlxsw: driver update This patchset carries support for port identification, monitoring of ASIC temperature and board fans. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
commit
43cd6991a0
@ -10,6 +10,14 @@ config MLXSW_CORE
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To compile this driver as a module, choose M here: the
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module will be called mlxsw_core.
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config MLXSW_CORE_HWMON
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bool "HWMON support for Mellanox Technologies Switch ASICs"
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depends on MLXSW_CORE && HWMON
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depends on !(MLXSW_CORE=y && HWMON=m)
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default y
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---help---
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Say Y here if you want to expose HWMON interface on mlxsw devices.
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config MLXSW_PCI
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tristate "PCI bus implementation for Mellanox Technologies Switch ASICs"
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depends on PCI && HAS_DMA && HAS_IOMEM && MLXSW_CORE
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@ -1,5 +1,6 @@
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obj-$(CONFIG_MLXSW_CORE) += mlxsw_core.o
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mlxsw_core-objs := core.o
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mlxsw_core-$(CONFIG_MLXSW_CORE_HWMON) += core_hwmon.o
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obj-$(CONFIG_MLXSW_PCI) += mlxsw_pci.o
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mlxsw_pci-objs := pci.o
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obj-$(CONFIG_MLXSW_SWITCHX2) += mlxsw_switchx2.o
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@ -105,6 +105,7 @@ struct mlxsw_core {
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struct debugfs_blob_wrapper vsd_blob;
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struct debugfs_blob_wrapper psid_blob;
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} dbg;
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struct mlxsw_hwmon *hwmon;
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unsigned long driver_priv[0];
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/* driver_priv has to be always the last item */
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};
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@ -822,6 +823,10 @@ int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
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if (err)
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goto err_emad_init;
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err = mlxsw_hwmon_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->hwmon);
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if (err)
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goto err_hwmon_init;
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err = mlxsw_driver->init(mlxsw_core->driver_priv, mlxsw_core,
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mlxsw_bus_info);
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if (err)
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@ -836,6 +841,8 @@ int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
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err_debugfs_init:
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mlxsw_core->driver->fini(mlxsw_core->driver_priv);
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err_driver_init:
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mlxsw_hwmon_fini(mlxsw_core->hwmon);
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err_hwmon_init:
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mlxsw_emad_fini(mlxsw_core);
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err_emad_init:
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mlxsw_bus->fini(bus_priv);
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@ -855,6 +862,7 @@ void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core)
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mlxsw_core_debugfs_fini(mlxsw_core);
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mlxsw_core->driver->fini(mlxsw_core->driver_priv);
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mlxsw_hwmon_fini(mlxsw_core->hwmon);
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mlxsw_emad_fini(mlxsw_core);
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mlxsw_core->bus->fini(mlxsw_core->bus_priv);
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free_percpu(mlxsw_core->pcpu_stats);
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@ -209,4 +209,28 @@ struct mlxsw_bus_info {
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u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN];
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};
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struct mlxsw_hwmon;
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#ifdef CONFIG_MLXSW_CORE_HWMON
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int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
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const struct mlxsw_bus_info *mlxsw_bus_info,
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struct mlxsw_hwmon **p_hwmon);
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void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon);
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#else
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static inline int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
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const struct mlxsw_bus_info *mlxsw_bus_info,
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struct mlxsw_hwmon **p_hwmon)
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{
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return 0;
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}
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static inline void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon)
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{
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}
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#endif
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#endif
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342
drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
Normal file
342
drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
Normal file
@ -0,0 +1,342 @@
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/*
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* drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
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* Copyright (c) 2015 Mellanox Technologies. All rights reserved.
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* Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the names of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") version 2 as published by the Free
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* Software Foundation.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/device.h>
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#include <linux/sysfs.h>
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#include <linux/hwmon.h>
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#include <linux/err.h>
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#include "core.h"
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#define MLXSW_HWMON_TEMP_SENSOR_MAX_COUNT 127
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#define MLXSW_HWMON_ATTR_COUNT (MLXSW_HWMON_TEMP_SENSOR_MAX_COUNT * 4 + \
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MLXSW_MFCR_TACHOS_MAX + MLXSW_MFCR_PWMS_MAX)
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struct mlxsw_hwmon_attr {
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struct device_attribute dev_attr;
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struct mlxsw_hwmon *hwmon;
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unsigned int type_index;
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char name[16];
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};
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struct mlxsw_hwmon {
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struct mlxsw_core *core;
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const struct mlxsw_bus_info *bus_info;
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struct device *hwmon_dev;
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struct attribute_group group;
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const struct attribute_group *groups[2];
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struct attribute *attrs[MLXSW_HWMON_ATTR_COUNT + 1];
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struct mlxsw_hwmon_attr hwmon_attrs[MLXSW_HWMON_ATTR_COUNT];
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unsigned int attrs_count;
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};
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static ssize_t mlxsw_hwmon_temp_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct mlxsw_hwmon_attr *mlwsw_hwmon_attr =
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container_of(attr, struct mlxsw_hwmon_attr, dev_attr);
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struct mlxsw_hwmon *mlxsw_hwmon = mlwsw_hwmon_attr->hwmon;
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char mtmp_pl[MLXSW_REG_MTMP_LEN];
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unsigned int temp;
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int err;
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mlxsw_reg_mtmp_pack(mtmp_pl, mlwsw_hwmon_attr->type_index,
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false, false);
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err = mlxsw_reg_query(mlxsw_hwmon->core, MLXSW_REG(mtmp), mtmp_pl);
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if (err) {
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dev_err(mlxsw_hwmon->bus_info->dev, "Failed to query temp sensor\n");
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return err;
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}
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mlxsw_reg_mtmp_unpack(mtmp_pl, &temp, NULL, NULL);
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return sprintf(buf, "%u\n", temp);
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}
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static ssize_t mlxsw_hwmon_temp_max_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct mlxsw_hwmon_attr *mlwsw_hwmon_attr =
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container_of(attr, struct mlxsw_hwmon_attr, dev_attr);
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struct mlxsw_hwmon *mlxsw_hwmon = mlwsw_hwmon_attr->hwmon;
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char mtmp_pl[MLXSW_REG_MTMP_LEN];
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unsigned int temp_max;
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int err;
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mlxsw_reg_mtmp_pack(mtmp_pl, mlwsw_hwmon_attr->type_index,
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false, false);
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err = mlxsw_reg_query(mlxsw_hwmon->core, MLXSW_REG(mtmp), mtmp_pl);
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if (err) {
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dev_err(mlxsw_hwmon->bus_info->dev, "Failed to query temp sensor\n");
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return err;
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}
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mlxsw_reg_mtmp_unpack(mtmp_pl, NULL, &temp_max, NULL);
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return sprintf(buf, "%u\n", temp_max);
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}
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static ssize_t mlxsw_hwmon_fan_rpm_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct mlxsw_hwmon_attr *mlwsw_hwmon_attr =
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container_of(attr, struct mlxsw_hwmon_attr, dev_attr);
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struct mlxsw_hwmon *mlxsw_hwmon = mlwsw_hwmon_attr->hwmon;
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char mfsm_pl[MLXSW_REG_MFSM_LEN];
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int err;
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mlxsw_reg_mfsm_pack(mfsm_pl, mlwsw_hwmon_attr->type_index);
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err = mlxsw_reg_query(mlxsw_hwmon->core, MLXSW_REG(mfsm), mfsm_pl);
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if (err) {
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dev_err(mlxsw_hwmon->bus_info->dev, "Failed to query fan\n");
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return err;
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}
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return sprintf(buf, "%u\n", mlxsw_reg_mfsm_rpm_get(mfsm_pl));
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}
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static ssize_t mlxsw_hwmon_pwm_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct mlxsw_hwmon_attr *mlwsw_hwmon_attr =
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container_of(attr, struct mlxsw_hwmon_attr, dev_attr);
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struct mlxsw_hwmon *mlxsw_hwmon = mlwsw_hwmon_attr->hwmon;
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char mfsc_pl[MLXSW_REG_MFSC_LEN];
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int err;
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mlxsw_reg_mfsc_pack(mfsc_pl, mlwsw_hwmon_attr->type_index, 0);
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err = mlxsw_reg_query(mlxsw_hwmon->core, MLXSW_REG(mfsc), mfsc_pl);
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if (err) {
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dev_err(mlxsw_hwmon->bus_info->dev, "Failed to query PWM\n");
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return err;
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}
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return sprintf(buf, "%u\n",
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mlxsw_reg_mfsc_pwm_duty_cycle_get(mfsc_pl));
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}
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static ssize_t mlxsw_hwmon_pwm_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t len)
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{
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struct mlxsw_hwmon_attr *mlwsw_hwmon_attr =
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container_of(attr, struct mlxsw_hwmon_attr, dev_attr);
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struct mlxsw_hwmon *mlxsw_hwmon = mlwsw_hwmon_attr->hwmon;
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char mfsc_pl[MLXSW_REG_MFSC_LEN];
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unsigned long val;
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int err;
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err = kstrtoul(buf, 10, &val);
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if (err)
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return err;
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if (val > 255)
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return -EINVAL;
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mlxsw_reg_mfsc_pack(mfsc_pl, mlwsw_hwmon_attr->type_index, val);
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err = mlxsw_reg_write(mlxsw_hwmon->core, MLXSW_REG(mfsc), mfsc_pl);
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if (err) {
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dev_err(mlxsw_hwmon->bus_info->dev, "Failed to write PWM\n");
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return err;
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}
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return err ? err : len;
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}
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enum mlxsw_hwmon_attr_type {
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MLXSW_HWMON_ATTR_TYPE_TEMP,
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MLXSW_HWMON_ATTR_TYPE_TEMP_MAX,
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MLXSW_HWMON_ATTR_TYPE_FAN_RPM,
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MLXSW_HWMON_ATTR_TYPE_PWM,
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};
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static void mlxsw_hwmon_attr_add(struct mlxsw_hwmon *mlxsw_hwmon,
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enum mlxsw_hwmon_attr_type attr_type,
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unsigned int type_index, unsigned int num) {
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struct mlxsw_hwmon_attr *mlxsw_hwmon_attr;
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unsigned int attr_index;
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attr_index = mlxsw_hwmon->attrs_count;
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mlxsw_hwmon_attr = &mlxsw_hwmon->hwmon_attrs[attr_index];
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switch (attr_type) {
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case MLXSW_HWMON_ATTR_TYPE_TEMP:
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mlxsw_hwmon_attr->dev_attr.show = mlxsw_hwmon_temp_show;
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mlxsw_hwmon_attr->dev_attr.attr.mode = S_IRUGO;
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snprintf(mlxsw_hwmon_attr->name, sizeof(mlxsw_hwmon_attr->name),
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"temp%u_input", num + 1);
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break;
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case MLXSW_HWMON_ATTR_TYPE_TEMP_MAX:
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mlxsw_hwmon_attr->dev_attr.show = mlxsw_hwmon_temp_max_show;
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mlxsw_hwmon_attr->dev_attr.attr.mode = S_IRUGO;
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snprintf(mlxsw_hwmon_attr->name, sizeof(mlxsw_hwmon_attr->name),
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"temp%u_highest", num + 1);
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break;
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case MLXSW_HWMON_ATTR_TYPE_FAN_RPM:
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mlxsw_hwmon_attr->dev_attr.show = mlxsw_hwmon_fan_rpm_show;
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mlxsw_hwmon_attr->dev_attr.attr.mode = S_IRUGO;
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snprintf(mlxsw_hwmon_attr->name, sizeof(mlxsw_hwmon_attr->name),
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"fan%u_input", num + 1);
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break;
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case MLXSW_HWMON_ATTR_TYPE_PWM:
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mlxsw_hwmon_attr->dev_attr.show = mlxsw_hwmon_pwm_show;
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mlxsw_hwmon_attr->dev_attr.store = mlxsw_hwmon_pwm_store;
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mlxsw_hwmon_attr->dev_attr.attr.mode = S_IWUSR | S_IRUGO;
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snprintf(mlxsw_hwmon_attr->name, sizeof(mlxsw_hwmon_attr->name),
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"pwm%u", num + 1);
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break;
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default:
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BUG();
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}
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mlxsw_hwmon_attr->type_index = type_index;
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mlxsw_hwmon_attr->hwmon = mlxsw_hwmon;
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mlxsw_hwmon_attr->dev_attr.attr.name = mlxsw_hwmon_attr->name;
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sysfs_attr_init(&mlxsw_hwmon_attr->dev_attr.attr);
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|
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mlxsw_hwmon->attrs[attr_index] = &mlxsw_hwmon_attr->dev_attr.attr;
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mlxsw_hwmon->attrs_count++;
|
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}
|
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|
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static int mlxsw_hwmon_temp_init(struct mlxsw_hwmon *mlxsw_hwmon)
|
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{
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char mtcap_pl[MLXSW_REG_MTCAP_LEN];
|
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char mtmp_pl[MLXSW_REG_MTMP_LEN];
|
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u8 sensor_count;
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int i;
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int err;
|
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|
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err = mlxsw_reg_query(mlxsw_hwmon->core, MLXSW_REG(mtcap), mtcap_pl);
|
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if (err) {
|
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dev_err(mlxsw_hwmon->bus_info->dev, "Failed to get number of temp sensors\n");
|
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return err;
|
||||
}
|
||||
sensor_count = mlxsw_reg_mtcap_sensor_count_get(mtcap_pl);
|
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for (i = 0; i < sensor_count; i++) {
|
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mlxsw_reg_mtmp_pack(mtmp_pl, 0, true, true);
|
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err = mlxsw_reg_write(mlxsw_hwmon->core,
|
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MLXSW_REG(mtmp), mtmp_pl);
|
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if (err) {
|
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dev_err(mlxsw_hwmon->bus_info->dev, "Failed to setup temp sensor number %d\n",
|
||||
i);
|
||||
return err;
|
||||
}
|
||||
mlxsw_hwmon_attr_add(mlxsw_hwmon,
|
||||
MLXSW_HWMON_ATTR_TYPE_TEMP, i, i);
|
||||
mlxsw_hwmon_attr_add(mlxsw_hwmon,
|
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MLXSW_HWMON_ATTR_TYPE_TEMP_MAX, i, i);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mlxsw_hwmon_fans_init(struct mlxsw_hwmon *mlxsw_hwmon)
|
||||
{
|
||||
char mfcr_pl[MLXSW_REG_MFCR_LEN];
|
||||
enum mlxsw_reg_mfcr_pwm_frequency freq;
|
||||
unsigned int type_index;
|
||||
unsigned int num;
|
||||
u16 tacho_active;
|
||||
u8 pwm_active;
|
||||
int err;
|
||||
|
||||
err = mlxsw_reg_query(mlxsw_hwmon->core, MLXSW_REG(mfcr), mfcr_pl);
|
||||
if (err) {
|
||||
dev_err(mlxsw_hwmon->bus_info->dev, "Failed to get to probe PWMs and Tachometers\n");
|
||||
return err;
|
||||
}
|
||||
mlxsw_reg_mfcr_unpack(mfcr_pl, &freq, &tacho_active, &pwm_active);
|
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num = 0;
|
||||
for (type_index = 0; type_index < MLXSW_MFCR_TACHOS_MAX; type_index++) {
|
||||
if (tacho_active & BIT(type_index))
|
||||
mlxsw_hwmon_attr_add(mlxsw_hwmon,
|
||||
MLXSW_HWMON_ATTR_TYPE_FAN_RPM,
|
||||
type_index, num++);
|
||||
}
|
||||
num = 0;
|
||||
for (type_index = 0; type_index < MLXSW_MFCR_PWMS_MAX; type_index++) {
|
||||
if (pwm_active & BIT(type_index))
|
||||
mlxsw_hwmon_attr_add(mlxsw_hwmon,
|
||||
MLXSW_HWMON_ATTR_TYPE_PWM,
|
||||
type_index, num++);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
|
||||
const struct mlxsw_bus_info *mlxsw_bus_info,
|
||||
struct mlxsw_hwmon **p_hwmon)
|
||||
{
|
||||
struct mlxsw_hwmon *mlxsw_hwmon;
|
||||
struct device *hwmon_dev;
|
||||
int err;
|
||||
|
||||
mlxsw_hwmon = kzalloc(sizeof(*mlxsw_hwmon), GFP_KERNEL);
|
||||
if (!mlxsw_hwmon)
|
||||
return -ENOMEM;
|
||||
mlxsw_hwmon->core = mlxsw_core;
|
||||
mlxsw_hwmon->bus_info = mlxsw_bus_info;
|
||||
|
||||
err = mlxsw_hwmon_temp_init(mlxsw_hwmon);
|
||||
if (err)
|
||||
goto err_temp_init;
|
||||
|
||||
err = mlxsw_hwmon_fans_init(mlxsw_hwmon);
|
||||
if (err)
|
||||
goto err_fans_init;
|
||||
|
||||
mlxsw_hwmon->groups[0] = &mlxsw_hwmon->group;
|
||||
mlxsw_hwmon->group.attrs = mlxsw_hwmon->attrs;
|
||||
|
||||
hwmon_dev = devm_hwmon_device_register_with_groups(mlxsw_bus_info->dev,
|
||||
"mlxsw",
|
||||
mlxsw_hwmon,
|
||||
mlxsw_hwmon->groups);
|
||||
if (IS_ERR(hwmon_dev)) {
|
||||
err = PTR_ERR(hwmon_dev);
|
||||
goto err_hwmon_register;
|
||||
}
|
||||
|
||||
mlxsw_hwmon->hwmon_dev = hwmon_dev;
|
||||
*p_hwmon = mlxsw_hwmon;
|
||||
return 0;
|
||||
|
||||
err_hwmon_register:
|
||||
err_fans_init:
|
||||
err_temp_init:
|
||||
kfree(mlxsw_hwmon);
|
||||
return err;
|
||||
}
|
||||
|
||||
void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon)
|
||||
{
|
||||
kfree(mlxsw_hwmon);
|
||||
}
|
||||
@ -2087,6 +2087,284 @@ static inline void mlxsw_reg_hpkt_pack(char *payload, u8 action, u16 trap_id)
|
||||
mlxsw_reg_hpkt_ctrl_set(payload, MLXSW_REG_HPKT_CTRL_PACKET_DEFAULT);
|
||||
}
|
||||
|
||||
/* MFCR - Management Fan Control Register
|
||||
* --------------------------------------
|
||||
* This register controls the settings of the Fan Speed PWM mechanism.
|
||||
*/
|
||||
#define MLXSW_REG_MFCR_ID 0x9001
|
||||
#define MLXSW_REG_MFCR_LEN 0x08
|
||||
|
||||
static const struct mlxsw_reg_info mlxsw_reg_mfcr = {
|
||||
.id = MLXSW_REG_MFCR_ID,
|
||||
.len = MLXSW_REG_MFCR_LEN,
|
||||
};
|
||||
|
||||
enum mlxsw_reg_mfcr_pwm_frequency {
|
||||
MLXSW_REG_MFCR_PWM_FEQ_11HZ = 0x00,
|
||||
MLXSW_REG_MFCR_PWM_FEQ_14_7HZ = 0x01,
|
||||
MLXSW_REG_MFCR_PWM_FEQ_22_1HZ = 0x02,
|
||||
MLXSW_REG_MFCR_PWM_FEQ_1_4KHZ = 0x40,
|
||||
MLXSW_REG_MFCR_PWM_FEQ_5KHZ = 0x41,
|
||||
MLXSW_REG_MFCR_PWM_FEQ_20KHZ = 0x42,
|
||||
MLXSW_REG_MFCR_PWM_FEQ_22_5KHZ = 0x43,
|
||||
MLXSW_REG_MFCR_PWM_FEQ_25KHZ = 0x44,
|
||||
};
|
||||
|
||||
/* reg_mfcr_pwm_frequency
|
||||
* Controls the frequency of the PWM signal.
|
||||
* Access: RW
|
||||
*/
|
||||
MLXSW_ITEM32(reg, mfcr, pwm_frequency, 0x00, 0, 6);
|
||||
|
||||
#define MLXSW_MFCR_TACHOS_MAX 10
|
||||
|
||||
/* reg_mfcr_tacho_active
|
||||
* Indicates which of the tachometer is active (bit per tachometer).
|
||||
* Access: RO
|
||||
*/
|
||||
MLXSW_ITEM32(reg, mfcr, tacho_active, 0x04, 16, MLXSW_MFCR_TACHOS_MAX);
|
||||
|
||||
#define MLXSW_MFCR_PWMS_MAX 5
|
||||
|
||||
/* reg_mfcr_pwm_active
|
||||
* Indicates which of the PWM control is active (bit per PWM).
|
||||
* Access: RO
|
||||
*/
|
||||
MLXSW_ITEM32(reg, mfcr, pwm_active, 0x04, 0, MLXSW_MFCR_PWMS_MAX);
|
||||
|
||||
static inline void
|
||||
mlxsw_reg_mfcr_pack(char *payload,
|
||||
enum mlxsw_reg_mfcr_pwm_frequency pwm_frequency)
|
||||
{
|
||||
MLXSW_REG_ZERO(mfcr, payload);
|
||||
mlxsw_reg_mfcr_pwm_frequency_set(payload, pwm_frequency);
|
||||
}
|
||||
|
||||
static inline void
|
||||
mlxsw_reg_mfcr_unpack(char *payload,
|
||||
enum mlxsw_reg_mfcr_pwm_frequency *p_pwm_frequency,
|
||||
u16 *p_tacho_active, u8 *p_pwm_active)
|
||||
{
|
||||
*p_pwm_frequency = mlxsw_reg_mfcr_pwm_frequency_get(payload);
|
||||
*p_tacho_active = mlxsw_reg_mfcr_tacho_active_get(payload);
|
||||
*p_pwm_active = mlxsw_reg_mfcr_pwm_active_get(payload);
|
||||
}
|
||||
|
||||
/* MFSC - Management Fan Speed Control Register
|
||||
* --------------------------------------------
|
||||
* This register controls the settings of the Fan Speed PWM mechanism.
|
||||
*/
|
||||
#define MLXSW_REG_MFSC_ID 0x9002
|
||||
#define MLXSW_REG_MFSC_LEN 0x08
|
||||
|
||||
static const struct mlxsw_reg_info mlxsw_reg_mfsc = {
|
||||
.id = MLXSW_REG_MFSC_ID,
|
||||
.len = MLXSW_REG_MFSC_LEN,
|
||||
};
|
||||
|
||||
/* reg_mfsc_pwm
|
||||
* Fan pwm to control / monitor.
|
||||
* Access: Index
|
||||
*/
|
||||
MLXSW_ITEM32(reg, mfsc, pwm, 0x00, 24, 3);
|
||||
|
||||
/* reg_mfsc_pwm_duty_cycle
|
||||
* Controls the duty cycle of the PWM. Value range from 0..255 to
|
||||
* represent duty cycle of 0%...100%.
|
||||
* Access: RW
|
||||
*/
|
||||
MLXSW_ITEM32(reg, mfsc, pwm_duty_cycle, 0x04, 0, 8);
|
||||
|
||||
static inline void mlxsw_reg_mfsc_pack(char *payload, u8 pwm,
|
||||
u8 pwm_duty_cycle)
|
||||
{
|
||||
MLXSW_REG_ZERO(mfsc, payload);
|
||||
mlxsw_reg_mfsc_pwm_set(payload, pwm);
|
||||
mlxsw_reg_mfsc_pwm_duty_cycle_set(payload, pwm_duty_cycle);
|
||||
}
|
||||
|
||||
/* MFSM - Management Fan Speed Measurement
|
||||
* ---------------------------------------
|
||||
* This register controls the settings of the Tacho measurements and
|
||||
* enables reading the Tachometer measurements.
|
||||
*/
|
||||
#define MLXSW_REG_MFSM_ID 0x9003
|
||||
#define MLXSW_REG_MFSM_LEN 0x08
|
||||
|
||||
static const struct mlxsw_reg_info mlxsw_reg_mfsm = {
|
||||
.id = MLXSW_REG_MFSM_ID,
|
||||
.len = MLXSW_REG_MFSM_LEN,
|
||||
};
|
||||
|
||||
/* reg_mfsm_tacho
|
||||
* Fan tachometer index.
|
||||
* Access: Index
|
||||
*/
|
||||
MLXSW_ITEM32(reg, mfsm, tacho, 0x00, 24, 4);
|
||||
|
||||
/* reg_mfsm_rpm
|
||||
* Fan speed (round per minute).
|
||||
* Access: RO
|
||||
*/
|
||||
MLXSW_ITEM32(reg, mfsm, rpm, 0x04, 0, 16);
|
||||
|
||||
static inline void mlxsw_reg_mfsm_pack(char *payload, u8 tacho)
|
||||
{
|
||||
MLXSW_REG_ZERO(mfsm, payload);
|
||||
mlxsw_reg_mfsm_tacho_set(payload, tacho);
|
||||
}
|
||||
|
||||
/* MTCAP - Management Temperature Capabilities
|
||||
* -------------------------------------------
|
||||
* This register exposes the capabilities of the device and
|
||||
* system temperature sensing.
|
||||
*/
|
||||
#define MLXSW_REG_MTCAP_ID 0x9009
|
||||
#define MLXSW_REG_MTCAP_LEN 0x08
|
||||
|
||||
static const struct mlxsw_reg_info mlxsw_reg_mtcap = {
|
||||
.id = MLXSW_REG_MTCAP_ID,
|
||||
.len = MLXSW_REG_MTCAP_LEN,
|
||||
};
|
||||
|
||||
/* reg_mtcap_sensor_count
|
||||
* Number of sensors supported by the device.
|
||||
* This includes the QSFP module sensors (if exists in the QSFP module).
|
||||
* Access: RO
|
||||
*/
|
||||
MLXSW_ITEM32(reg, mtcap, sensor_count, 0x00, 0, 7);
|
||||
|
||||
/* MTMP - Management Temperature
|
||||
* -----------------------------
|
||||
* This register controls the settings of the temperature measurements
|
||||
* and enables reading the temperature measurements. Note that temperature
|
||||
* is in 0.125 degrees Celsius.
|
||||
*/
|
||||
#define MLXSW_REG_MTMP_ID 0x900A
|
||||
#define MLXSW_REG_MTMP_LEN 0x20
|
||||
|
||||
static const struct mlxsw_reg_info mlxsw_reg_mtmp = {
|
||||
.id = MLXSW_REG_MTMP_ID,
|
||||
.len = MLXSW_REG_MTMP_LEN,
|
||||
};
|
||||
|
||||
/* reg_mtmp_sensor_index
|
||||
* Sensors index to access.
|
||||
* 64-127 of sensor_index are mapped to the SFP+/QSFP modules sequentially
|
||||
* (module 0 is mapped to sensor_index 64).
|
||||
* Access: Index
|
||||
*/
|
||||
MLXSW_ITEM32(reg, mtmp, sensor_index, 0x00, 0, 7);
|
||||
|
||||
/* Convert to milli degrees Celsius */
|
||||
#define MLXSW_REG_MTMP_TEMP_TO_MC(val) (val * 125)
|
||||
|
||||
/* reg_mtmp_temperature
|
||||
* Temperature reading from the sensor. Reading is in 0.125 Celsius
|
||||
* degrees units.
|
||||
* Access: RO
|
||||
*/
|
||||
MLXSW_ITEM32(reg, mtmp, temperature, 0x04, 0, 16);
|
||||
|
||||
/* reg_mtmp_mte
|
||||
* Max Temperature Enable - enables measuring the max temperature on a sensor.
|
||||
* Access: RW
|
||||
*/
|
||||
MLXSW_ITEM32(reg, mtmp, mte, 0x08, 31, 1);
|
||||
|
||||
/* reg_mtmp_mtr
|
||||
* Max Temperature Reset - clears the value of the max temperature register.
|
||||
* Access: WO
|
||||
*/
|
||||
MLXSW_ITEM32(reg, mtmp, mtr, 0x08, 30, 1);
|
||||
|
||||
/* reg_mtmp_max_temperature
|
||||
* The highest measured temperature from the sensor.
|
||||
* When the bit mte is cleared, the field max_temperature is reserved.
|
||||
* Access: RO
|
||||
*/
|
||||
MLXSW_ITEM32(reg, mtmp, max_temperature, 0x08, 0, 16);
|
||||
|
||||
#define MLXSW_REG_MTMP_SENSOR_NAME_SIZE 8
|
||||
|
||||
/* reg_mtmp_sensor_name
|
||||
* Sensor Name
|
||||
* Access: RO
|
||||
*/
|
||||
MLXSW_ITEM_BUF(reg, mtmp, sensor_name, 0x18, MLXSW_REG_MTMP_SENSOR_NAME_SIZE);
|
||||
|
||||
static inline void mlxsw_reg_mtmp_pack(char *payload, u8 sensor_index,
|
||||
bool max_temp_enable,
|
||||
bool max_temp_reset)
|
||||
{
|
||||
MLXSW_REG_ZERO(mtmp, payload);
|
||||
mlxsw_reg_mtmp_sensor_index_set(payload, sensor_index);
|
||||
mlxsw_reg_mtmp_mte_set(payload, max_temp_enable);
|
||||
mlxsw_reg_mtmp_mtr_set(payload, max_temp_reset);
|
||||
}
|
||||
|
||||
static inline void mlxsw_reg_mtmp_unpack(char *payload, unsigned int *p_temp,
|
||||
unsigned int *p_max_temp,
|
||||
char *sensor_name)
|
||||
{
|
||||
u16 temp;
|
||||
|
||||
if (p_temp) {
|
||||
temp = mlxsw_reg_mtmp_temperature_get(payload);
|
||||
*p_temp = MLXSW_REG_MTMP_TEMP_TO_MC(temp);
|
||||
}
|
||||
if (p_max_temp) {
|
||||
temp = mlxsw_reg_mtmp_temperature_get(payload);
|
||||
*p_max_temp = MLXSW_REG_MTMP_TEMP_TO_MC(temp);
|
||||
}
|
||||
if (sensor_name)
|
||||
mlxsw_reg_mtmp_sensor_name_memcpy_from(payload, sensor_name);
|
||||
}
|
||||
|
||||
/* MLCR - Management LED Control Register
|
||||
* --------------------------------------
|
||||
* Controls the system LEDs.
|
||||
*/
|
||||
#define MLXSW_REG_MLCR_ID 0x902B
|
||||
#define MLXSW_REG_MLCR_LEN 0x0C
|
||||
|
||||
static const struct mlxsw_reg_info mlxsw_reg_mlcr = {
|
||||
.id = MLXSW_REG_MLCR_ID,
|
||||
.len = MLXSW_REG_MLCR_LEN,
|
||||
};
|
||||
|
||||
/* reg_mlcr_local_port
|
||||
* Local port number.
|
||||
* Access: RW
|
||||
*/
|
||||
MLXSW_ITEM32(reg, mlcr, local_port, 0x00, 16, 8);
|
||||
|
||||
#define MLXSW_REG_MLCR_DURATION_MAX 0xFFFF
|
||||
|
||||
/* reg_mlcr_beacon_duration
|
||||
* Duration of the beacon to be active, in seconds.
|
||||
* 0x0 - Will turn off the beacon.
|
||||
* 0xFFFF - Will turn on the beacon until explicitly turned off.
|
||||
* Access: RW
|
||||
*/
|
||||
MLXSW_ITEM32(reg, mlcr, beacon_duration, 0x04, 0, 16);
|
||||
|
||||
/* reg_mlcr_beacon_remain
|
||||
* Remaining duration of the beacon, in seconds.
|
||||
* 0xFFFF indicates an infinite amount of time.
|
||||
* Access: RO
|
||||
*/
|
||||
MLXSW_ITEM32(reg, mlcr, beacon_remain, 0x08, 0, 16);
|
||||
|
||||
static inline void mlxsw_reg_mlcr_pack(char *payload, u8 local_port,
|
||||
bool active)
|
||||
{
|
||||
MLXSW_REG_ZERO(mlcr, payload);
|
||||
mlxsw_reg_mlcr_local_port_set(payload, local_port);
|
||||
mlxsw_reg_mlcr_beacon_duration_set(payload, active ?
|
||||
MLXSW_REG_MLCR_DURATION_MAX : 0);
|
||||
}
|
||||
|
||||
/* SBPR - Shared Buffer Pools Register
|
||||
* -----------------------------------
|
||||
* The SBPR configures and retrieves the shared buffer pools and configuration.
|
||||
@ -2405,6 +2683,18 @@ static inline const char *mlxsw_reg_id_str(u16 reg_id)
|
||||
return "HTGT";
|
||||
case MLXSW_REG_HPKT_ID:
|
||||
return "HPKT";
|
||||
case MLXSW_REG_MFCR_ID:
|
||||
return "MFCR";
|
||||
case MLXSW_REG_MFSC_ID:
|
||||
return "MFSC";
|
||||
case MLXSW_REG_MFSM_ID:
|
||||
return "MFSM";
|
||||
case MLXSW_REG_MTCAP_ID:
|
||||
return "MTCAP";
|
||||
case MLXSW_REG_MTMP_ID:
|
||||
return "MTMP";
|
||||
case MLXSW_REG_MLCR_ID:
|
||||
return "MLCR";
|
||||
case MLXSW_REG_SBPR_ID:
|
||||
return "SBPR";
|
||||
case MLXSW_REG_SBCM_ID:
|
||||
|
||||
@ -859,6 +859,29 @@ static void mlxsw_sp_port_get_strings(struct net_device *dev,
|
||||
}
|
||||
}
|
||||
|
||||
static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
|
||||
enum ethtool_phys_id_state state)
|
||||
{
|
||||
struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
|
||||
struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
|
||||
char mlcr_pl[MLXSW_REG_MLCR_LEN];
|
||||
bool active;
|
||||
|
||||
switch (state) {
|
||||
case ETHTOOL_ID_ACTIVE:
|
||||
active = true;
|
||||
break;
|
||||
case ETHTOOL_ID_INACTIVE:
|
||||
active = false;
|
||||
break;
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
|
||||
return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
|
||||
}
|
||||
|
||||
static void mlxsw_sp_port_get_stats(struct net_device *dev,
|
||||
struct ethtool_stats *stats, u64 *data)
|
||||
{
|
||||
@ -1205,6 +1228,7 @@ static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
|
||||
.get_drvinfo = mlxsw_sp_port_get_drvinfo,
|
||||
.get_link = ethtool_op_get_link,
|
||||
.get_strings = mlxsw_sp_port_get_strings,
|
||||
.set_phys_id = mlxsw_sp_port_set_phys_id,
|
||||
.get_ethtool_stats = mlxsw_sp_port_get_stats,
|
||||
.get_sset_count = mlxsw_sp_port_get_sset_count,
|
||||
.get_settings = mlxsw_sp_port_get_settings,
|
||||
|
||||
Loading…
Reference in New Issue
Block a user