mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-19 18:36:31 +07:00
drm/nvd0/disp: initial crtc object implementation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs
parent
270a574780
commit
438d99e3b1
@ -31,6 +31,7 @@
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#include "nouveau_connector.h"
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#include "nouveau_encoder.h"
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#include "nouveau_crtc.h"
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#include "nouveau_fb.h"
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#define MEM_SYNC 0xe0000001
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#define MEM_VRAM 0xe0010000
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@ -100,6 +101,449 @@ nvd0_display_crtc_get(struct drm_encoder *encoder)
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return nouveau_encoder(encoder)->crtc;
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}
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/******************************************************************************
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* CRTC
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*****************************************************************************/
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static int
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nvd0_crtc_set_dither(struct nouveau_crtc *nv_crtc, bool on, bool update)
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{
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struct drm_device *dev = nv_crtc->base.dev;
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u32 *push, mode;
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mode = 0x00000000;
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if (on) {
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/* 0x11: 6bpc dynamic 2x2
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* 0x13: 8bpc dynamic 2x2
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* 0x19: 6bpc static 2x2
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* 0x1b: 8bpc static 2x2
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* 0x21: 6bpc temporal
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* 0x23: 8bpc temporal
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*/
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mode = 0x00000011;
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}
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push = evo_wait(dev, 0, 4);
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if (push) {
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evo_mthd(push, 0x0490 + (nv_crtc->index * 0x300), 1);
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evo_data(push, mode);
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if (update) {
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evo_mthd(push, 0x0080, 1);
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evo_data(push, 0x00000000);
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}
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evo_kick(push, dev, 0);
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}
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return 0;
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}
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static int
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nvd0_crtc_set_scale(struct nouveau_crtc *nv_crtc, int type, bool update)
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{
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struct drm_display_mode *mode = &nv_crtc->base.mode;
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struct drm_device *dev = nv_crtc->base.dev;
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u32 *push;
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/*XXX: actually handle scaling */
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push = evo_wait(dev, 0, 16);
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if (push) {
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evo_mthd(push, 0x04c0 + (nv_crtc->index * 0x300), 3);
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evo_data(push, (mode->vdisplay << 16) | mode->hdisplay);
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evo_data(push, (mode->vdisplay << 16) | mode->hdisplay);
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evo_data(push, (mode->vdisplay << 16) | mode->hdisplay);
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evo_mthd(push, 0x0494 + (nv_crtc->index * 0x300), 1);
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evo_data(push, 0x00000000);
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evo_mthd(push, 0x04b0 + (nv_crtc->index * 0x300), 1);
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evo_data(push, 0x00000000);
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evo_mthd(push, 0x04b8 + (nv_crtc->index * 0x300), 1);
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evo_data(push, (mode->vdisplay << 16) | mode->hdisplay);
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if (update) {
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evo_mthd(push, 0x0080, 1);
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evo_data(push, 0x00000000);
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}
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evo_kick(push, dev, 0);
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}
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return 0;
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}
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static int
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nvd0_crtc_set_image(struct nouveau_crtc *nv_crtc, struct drm_framebuffer *fb,
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int x, int y, bool update)
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{
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struct nouveau_framebuffer *nvfb = nouveau_framebuffer(fb);
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u32 *push;
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/*XXX*/
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nv_crtc->fb.tile_flags = MEM_VRAM;
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push = evo_wait(fb->dev, 0, 16);
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if (push) {
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evo_mthd(push, 0x0460 + (nv_crtc->index * 0x300), 1);
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evo_data(push, nvfb->nvbo->bo.offset >> 8);
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evo_mthd(push, 0x0468 + (nv_crtc->index * 0x300), 4);
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evo_data(push, (fb->height << 16) | fb->width);
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evo_data(push, nvfb->r_pitch);
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evo_data(push, nvfb->r_format);
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evo_data(push, nv_crtc->fb.tile_flags);
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evo_kick(push, fb->dev, 0);
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}
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return 0;
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}
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static void
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nvd0_crtc_cursor_show(struct nouveau_crtc *nv_crtc, bool show, bool update)
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{
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struct drm_device *dev = nv_crtc->base.dev;
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u32 *push = evo_wait(dev, 0, 16);
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if (push) {
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if (show) {
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evo_mthd(push, 0x0480 + (nv_crtc->index * 0x300), 2);
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evo_data(push, 0x85000000);
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evo_data(push, nv_crtc->cursor.nvbo->bo.offset >> 8);
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evo_mthd(push, 0x048c + (nv_crtc->index * 0x300), 1);
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evo_data(push, MEM_VRAM);
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} else {
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evo_mthd(push, 0x0480 + (nv_crtc->index * 0x300), 1);
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evo_data(push, 0x05000000);
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evo_mthd(push, 0x048c + (nv_crtc->index * 0x300), 1);
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evo_data(push, 0x00000000);
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}
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if (update) {
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evo_mthd(push, 0x0080, 1);
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evo_data(push, 0x00000000);
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}
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evo_kick(push, dev, 0);
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}
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}
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static void
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nvd0_crtc_dpms(struct drm_crtc *crtc, int mode)
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{
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}
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static void
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nvd0_crtc_prepare(struct drm_crtc *crtc)
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{
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struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
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u32 *push;
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push = evo_wait(crtc->dev, 0, 2);
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if (push) {
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evo_mthd(push, 0x0474 + (nv_crtc->index * 0x300), 1);
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evo_data(push, 0x00000000);
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evo_mthd(push, 0x0440 + (nv_crtc->index * 0x300), 1);
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evo_data(push, 0x03000000);
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evo_mthd(push, 0x045c + (nv_crtc->index * 0x300), 1);
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evo_data(push, 0x00000000);
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evo_kick(push, crtc->dev, 0);
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}
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nvd0_crtc_cursor_show(nv_crtc, false, false);
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}
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static void
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nvd0_crtc_commit(struct drm_crtc *crtc)
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{
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struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
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u32 *push;
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push = evo_wait(crtc->dev, 0, 32);
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if (push) {
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evo_mthd(push, 0x0474 + (nv_crtc->index * 0x300), 1);
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evo_data(push, nv_crtc->fb.tile_flags);
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evo_mthd(push, 0x0440 + (nv_crtc->index * 0x300), 4);
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evo_data(push, 0x83000000);
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evo_data(push, nv_crtc->lut.nvbo->bo.offset >> 8);
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evo_data(push, 0x00000000);
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evo_data(push, 0x00000000);
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evo_mthd(push, 0x045c + (nv_crtc->index * 0x300), 1);
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evo_data(push, MEM_VRAM);
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evo_kick(push, crtc->dev, 0);
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}
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nvd0_crtc_cursor_show(nv_crtc, nv_crtc->cursor.visible, true);
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}
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static bool
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nvd0_crtc_mode_fixup(struct drm_crtc *crtc, struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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return true;
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}
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static int
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nvd0_crtc_swap_fbs(struct drm_crtc *crtc, struct drm_framebuffer *old_fb)
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{
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struct nouveau_framebuffer *nvfb = nouveau_framebuffer(crtc->fb);
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int ret;
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ret = nouveau_bo_pin(nvfb->nvbo, TTM_PL_FLAG_VRAM);
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if (ret)
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return ret;
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if (old_fb) {
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nvfb = nouveau_framebuffer(old_fb);
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nouveau_bo_unpin(nvfb->nvbo);
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}
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return 0;
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}
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static int
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nvd0_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode,
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struct drm_display_mode *mode, int x, int y,
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struct drm_framebuffer *old_fb)
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{
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struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
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struct nouveau_connector *nv_connector;
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u32 htotal = mode->htotal;
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u32 vtotal = mode->vtotal;
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u32 hsyncw = mode->hsync_end - mode->hsync_start - 1;
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u32 vsyncw = mode->vsync_end - mode->vsync_start - 1;
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u32 hfrntp = mode->hsync_start - mode->hdisplay;
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u32 vfrntp = mode->vsync_start - mode->vdisplay;
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u32 hbackp = mode->htotal - mode->hsync_end;
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u32 vbackp = mode->vtotal - mode->vsync_end;
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u32 hss2be = hsyncw + hbackp;
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u32 vss2be = vsyncw + vbackp;
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u32 hss2de = htotal - hfrntp;
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u32 vss2de = vtotal - vfrntp;
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u32 hstart = 0;
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u32 vstart = 0;
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u32 *push;
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int ret;
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ret = nvd0_crtc_swap_fbs(crtc, old_fb);
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if (ret)
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return ret;
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push = evo_wait(crtc->dev, 0, 64);
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if (push) {
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evo_mthd(push, 0x0410 + (nv_crtc->index * 0x300), 5);
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evo_data(push, (vstart << 16) | hstart);
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evo_data(push, (vtotal << 16) | htotal);
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evo_data(push, (vsyncw << 16) | hsyncw);
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evo_data(push, (vss2be << 16) | hss2be);
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evo_data(push, (vss2de << 16) | hss2de);
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evo_mthd(push, 0x042c + (nv_crtc->index * 0x300), 1);
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evo_data(push, 0x00000000); /* ??? */
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evo_mthd(push, 0x0450 + (nv_crtc->index * 0x300), 3);
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evo_data(push, mode->clock * 1000);
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evo_data(push, 0x00200000); /* ??? */
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evo_data(push, mode->clock * 1000);
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evo_mthd(push, 0x0408 + (nv_crtc->index * 0x300), 1);
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evo_data(push, 0x31ec6000); /* ??? */
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evo_kick(push, crtc->dev, 0);
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}
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nv_connector = nouveau_crtc_connector_get(nv_crtc);
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nvd0_crtc_set_dither(nv_crtc, nv_connector->use_dithering, false);
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nvd0_crtc_set_scale(nv_crtc, nv_connector->scaling_mode, false);
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nvd0_crtc_set_image(nv_crtc, crtc->fb, x, y, false);
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return 0;
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}
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static int
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nvd0_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
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struct drm_framebuffer *old_fb)
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{
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struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
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int ret;
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ret = nvd0_crtc_swap_fbs(crtc, old_fb);
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if (ret)
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return ret;
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nvd0_crtc_set_image(nv_crtc, crtc->fb, x, y, true);
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return 0;
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}
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static int
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nvd0_crtc_mode_set_base_atomic(struct drm_crtc *crtc,
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struct drm_framebuffer *fb, int x, int y,
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enum mode_set_atomic state)
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{
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struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
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nvd0_crtc_set_image(nv_crtc, fb, x, y, true);
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return 0;
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}
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static void
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nvd0_crtc_lut_load(struct drm_crtc *crtc)
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{
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struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
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void __iomem *lut = nvbo_kmap_obj_iovirtual(nv_crtc->lut.nvbo);
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int i;
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for (i = 0; i < 256; i++) {
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writew(nv_crtc->lut.r[i] >> 2, lut + 8*i + 0);
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writew(nv_crtc->lut.g[i] >> 2, lut + 8*i + 2);
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writew(nv_crtc->lut.b[i] >> 2, lut + 8*i + 4);
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}
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}
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static int
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nvd0_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
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uint32_t handle, uint32_t width, uint32_t height)
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{
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struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
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struct drm_device *dev = crtc->dev;
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struct drm_gem_object *gem;
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struct nouveau_bo *nvbo;
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bool visible = (handle != 0);
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int i, ret = 0;
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if (visible) {
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if (width != 64 || height != 64)
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return -EINVAL;
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gem = drm_gem_object_lookup(dev, file_priv, handle);
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if (unlikely(!gem))
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return -ENOENT;
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nvbo = nouveau_gem_object(gem);
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ret = nouveau_bo_map(nvbo);
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if (ret == 0) {
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for (i = 0; i < 64 * 64; i++) {
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u32 v = nouveau_bo_rd32(nvbo, i);
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nouveau_bo_wr32(nv_crtc->cursor.nvbo, i, v);
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}
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nouveau_bo_unmap(nvbo);
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}
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drm_gem_object_unreference_unlocked(gem);
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}
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if (visible != nv_crtc->cursor.visible) {
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nvd0_crtc_cursor_show(nv_crtc, visible, true);
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nv_crtc->cursor.visible = visible;
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}
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return ret;
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}
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static int
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nvd0_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
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{
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struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
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const u32 data = (y << 16) | x;
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nv_wr32(crtc->dev, 0x64d084 + (nv_crtc->index * 0x1000), data);
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nv_wr32(crtc->dev, 0x64d080 + (nv_crtc->index * 0x1000), 0x00000000);
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return 0;
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}
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static void
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nvd0_crtc_gamma_set(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b,
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uint32_t start, uint32_t size)
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{
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struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
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u32 end = max(start + size, (u32)256);
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u32 i;
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for (i = start; i < end; i++) {
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nv_crtc->lut.r[i] = r[i];
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nv_crtc->lut.g[i] = g[i];
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nv_crtc->lut.b[i] = b[i];
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}
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nvd0_crtc_lut_load(crtc);
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}
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static void
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nvd0_crtc_destroy(struct drm_crtc *crtc)
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{
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struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
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nouveau_bo_unmap(nv_crtc->cursor.nvbo);
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nouveau_bo_ref(NULL, &nv_crtc->cursor.nvbo);
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nouveau_bo_unmap(nv_crtc->lut.nvbo);
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nouveau_bo_ref(NULL, &nv_crtc->lut.nvbo);
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drm_crtc_cleanup(crtc);
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kfree(crtc);
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}
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static const struct drm_crtc_helper_funcs nvd0_crtc_hfunc = {
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.dpms = nvd0_crtc_dpms,
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.prepare = nvd0_crtc_prepare,
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.commit = nvd0_crtc_commit,
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.mode_fixup = nvd0_crtc_mode_fixup,
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.mode_set = nvd0_crtc_mode_set,
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.mode_set_base = nvd0_crtc_mode_set_base,
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.mode_set_base_atomic = nvd0_crtc_mode_set_base_atomic,
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.load_lut = nvd0_crtc_lut_load,
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};
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static const struct drm_crtc_funcs nvd0_crtc_func = {
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.cursor_set = nvd0_crtc_cursor_set,
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.cursor_move = nvd0_crtc_cursor_move,
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.gamma_set = nvd0_crtc_gamma_set,
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.set_config = drm_crtc_helper_set_config,
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.destroy = nvd0_crtc_destroy,
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};
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static int
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nvd0_crtc_create(struct drm_device *dev, int index)
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{
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struct nouveau_crtc *nv_crtc;
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struct drm_crtc *crtc;
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int ret, i;
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nv_crtc = kzalloc(sizeof(*nv_crtc), GFP_KERNEL);
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if (!nv_crtc)
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return -ENOMEM;
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nv_crtc->index = index;
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nv_crtc->set_dither = nvd0_crtc_set_dither;
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nv_crtc->set_scale = nvd0_crtc_set_scale;
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for (i = 0; i < 256; i++) {
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nv_crtc->lut.r[i] = i << 8;
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nv_crtc->lut.g[i] = i << 8;
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nv_crtc->lut.b[i] = i << 8;
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}
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crtc = &nv_crtc->base;
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drm_crtc_init(dev, crtc, &nvd0_crtc_func);
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drm_crtc_helper_add(crtc, &nvd0_crtc_hfunc);
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drm_mode_crtc_set_gamma_size(crtc, 256);
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ret = nouveau_bo_new(dev, 64 * 64 * 4, 0x100, TTM_PL_FLAG_VRAM,
|
||||
0, 0x0000, &nv_crtc->cursor.nvbo);
|
||||
if (!ret) {
|
||||
ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
|
||||
if (!ret)
|
||||
ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
|
||||
if (ret)
|
||||
nouveau_bo_ref(NULL, &nv_crtc->cursor.nvbo);
|
||||
}
|
||||
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
ret = nouveau_bo_new(dev, 4096, 0x100, TTM_PL_FLAG_VRAM,
|
||||
0, 0x0000, &nv_crtc->lut.nvbo);
|
||||
if (!ret) {
|
||||
ret = nouveau_bo_pin(nv_crtc->lut.nvbo, TTM_PL_FLAG_VRAM);
|
||||
if (!ret)
|
||||
ret = nouveau_bo_map(nv_crtc->lut.nvbo);
|
||||
if (ret)
|
||||
nouveau_bo_ref(NULL, &nv_crtc->lut.nvbo);
|
||||
}
|
||||
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
nvd0_crtc_lut_load(crtc);
|
||||
|
||||
out:
|
||||
if (ret)
|
||||
nvd0_crtc_destroy(crtc);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* DAC
|
||||
*****************************************************************************/
|
||||
@ -194,6 +638,7 @@ nvd0_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
|
||||
if (push) {
|
||||
evo_mthd(push, 0x0200 + (nv_encoder->or * 0x20), 1);
|
||||
evo_data(push, mode_ctrl);
|
||||
evo_kick(push, encoder->dev, 0);
|
||||
}
|
||||
|
||||
nv_encoder->crtc = encoder->crtc;
|
||||
@ -204,9 +649,12 @@ nvd0_sor_disconnect(struct drm_encoder *encoder)
|
||||
{
|
||||
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
|
||||
struct drm_device *dev = encoder->dev;
|
||||
u32 *push;
|
||||
|
||||
if (nv_encoder->crtc) {
|
||||
u32 *push = evo_wait(dev, 0, 4);
|
||||
nvd0_crtc_prepare(nv_encoder->crtc);
|
||||
|
||||
push = evo_wait(dev, 0, 4);
|
||||
if (push) {
|
||||
evo_mthd(push, 0x0200 + (nv_encoder->or * 0x20), 1);
|
||||
evo_data(push, 0x00000000);
|
||||
@ -493,6 +941,13 @@ nvd0_display_create(struct drm_device *dev)
|
||||
return -ENOMEM;
|
||||
dev_priv->engine.display.priv = disp;
|
||||
|
||||
/* create crtc objects to represent the hw heads */
|
||||
for (i = 0; i < 2; i++) {
|
||||
ret = nvd0_crtc_create(dev, i);
|
||||
if (ret)
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* create encoder/connector objects based on VBIOS DCB table */
|
||||
for (i = 0, dcbe = &dcb->entry[0]; i < dcb->entries; i++, dcbe++) {
|
||||
connector = nouveau_connector_create(dev, dcbe->connector);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user