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s390/qeth: align csum offload with TSO control logic
csum offload and TSO have similar programming requirements. The TSO code was reworked with commit "s390/qeth: enhance TSO control sequence", adjust the csum control flow accordingly. Primarily this means replacing custom helpers with more generic infrastructure. Also, change the LP2LP check so that it warns on TX offload (not RX). This is where reduced csum capability actually matters. Signed-off-by: Julian Wiedmann <jwi@linux.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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7e83747dc9
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@ -6267,66 +6267,33 @@ int qeth_core_ethtool_get_link_ksettings(struct net_device *netdev,
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}
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EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_link_ksettings);
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/* Callback to handle checksum offload command reply from OSA card.
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* Verify that required features have been enabled on the card.
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* Return error in hdr->return_code as this value is checked by caller.
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*
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* Always returns zero to indicate no further messages from the OSA card.
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*/
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static int qeth_ipa_checksum_run_cmd_cb(struct qeth_card *card,
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struct qeth_reply *reply,
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unsigned long data)
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static int qeth_start_csum_cb(struct qeth_card *card, struct qeth_reply *reply,
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unsigned long data)
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{
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struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
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struct qeth_checksum_cmd *chksum_cb =
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(struct qeth_checksum_cmd *)reply->param;
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u32 *features = reply->param;
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QETH_CARD_TEXT(card, 4, "chkdoccb");
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if (qeth_setassparms_inspect_rc(cmd))
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return 0;
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memset(chksum_cb, 0, sizeof(*chksum_cb));
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if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
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chksum_cb->supported =
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cmd->data.setassparms.data.chksum.supported;
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QETH_CARD_TEXT_(card, 3, "strt:%x", chksum_cb->supported);
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}
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if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_ENABLE) {
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chksum_cb->supported =
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cmd->data.setassparms.data.chksum.supported;
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chksum_cb->enabled =
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cmd->data.setassparms.data.chksum.enabled;
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QETH_CARD_TEXT_(card, 3, "supp:%x", chksum_cb->supported);
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QETH_CARD_TEXT_(card, 3, "enab:%x", chksum_cb->enabled);
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}
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*features = cmd->data.setassparms.data.flags_32bit;
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return 0;
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}
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/* Send command to OSA card and check results. */
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static int qeth_ipa_checksum_run_cmd(struct qeth_card *card,
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enum qeth_ipa_funcs ipa_func,
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__u16 cmd_code, long data,
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struct qeth_checksum_cmd *chksum_cb,
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enum qeth_prot_versions prot)
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static int qeth_set_csum_off(struct qeth_card *card, enum qeth_ipa_funcs cstype,
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enum qeth_prot_versions prot)
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{
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struct qeth_cmd_buffer *iob;
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QETH_CARD_TEXT(card, 4, "chkdocmd");
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iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
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sizeof(__u32), prot);
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if (!iob)
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return -ENOMEM;
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__ipa_cmd(iob)->data.setassparms.data.flags_32bit = (__u32) data;
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return qeth_send_ipa_cmd(card, iob, qeth_ipa_checksum_run_cmd_cb,
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chksum_cb);
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return qeth_send_simple_setassparms_prot(card, cstype,
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IPA_CMD_ASS_STOP, 0, prot);
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}
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static int qeth_send_checksum_on(struct qeth_card *card, int cstype,
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enum qeth_prot_versions prot)
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static int qeth_set_csum_on(struct qeth_card *card, enum qeth_ipa_funcs cstype,
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enum qeth_prot_versions prot)
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{
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u32 required_features = QETH_IPA_CHECKSUM_UDP | QETH_IPA_CHECKSUM_TCP;
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struct qeth_checksum_cmd chksum_cb;
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struct qeth_cmd_buffer *iob;
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struct qeth_ipa_caps caps;
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u32 features;
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int rc;
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/* some L3 HW requires combined L3+L4 csum offload: */
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@ -6334,59 +6301,57 @@ static int qeth_send_checksum_on(struct qeth_card *card, int cstype,
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cstype == IPA_OUTBOUND_CHECKSUM)
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required_features |= QETH_IPA_CHECKSUM_IP_HDR;
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rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_START, 0,
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&chksum_cb, prot);
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if (!rc) {
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if ((required_features & chksum_cb.supported) !=
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required_features)
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rc = -EIO;
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else if (!(QETH_IPA_CHECKSUM_LP2LP & chksum_cb.supported) &&
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cstype == IPA_INBOUND_CHECKSUM)
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dev_warn(&card->gdev->dev,
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"Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n",
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QETH_CARD_IFNAME(card));
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}
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if (rc) {
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qeth_send_simple_setassparms_prot(card, cstype,
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IPA_CMD_ASS_STOP, 0, prot);
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dev_warn(&card->gdev->dev,
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"Starting HW IPv%d checksumming for %s failed, using SW checksumming\n",
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prot, QETH_CARD_IFNAME(card));
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return rc;
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}
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if (chksum_cb.supported & QETH_IPA_CHECKSUM_LP2LP)
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required_features |= QETH_IPA_CHECKSUM_LP2LP;
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rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_ENABLE,
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required_features, &chksum_cb,
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iob = qeth_get_setassparms_cmd(card, cstype, IPA_CMD_ASS_START, 0,
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prot);
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if (!rc) {
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if ((required_features & chksum_cb.enabled) !=
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required_features)
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rc = -EIO;
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}
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if (rc) {
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qeth_send_simple_setassparms_prot(card, cstype,
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IPA_CMD_ASS_STOP, 0, prot);
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dev_warn(&card->gdev->dev,
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"Enabling HW IPv%d checksumming for %s failed, using SW checksumming\n",
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prot, QETH_CARD_IFNAME(card));
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if (!iob)
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return -ENOMEM;
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rc = qeth_send_ipa_cmd(card, iob, qeth_start_csum_cb, &features);
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if (rc)
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return rc;
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if ((required_features & features) != required_features) {
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qeth_set_csum_off(card, cstype, prot);
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return -EOPNOTSUPP;
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}
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iob = qeth_get_setassparms_cmd(card, cstype, IPA_CMD_ASS_ENABLE, 4,
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prot);
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if (!iob) {
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qeth_set_csum_off(card, cstype, prot);
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return -ENOMEM;
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}
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if (features & QETH_IPA_CHECKSUM_LP2LP)
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required_features |= QETH_IPA_CHECKSUM_LP2LP;
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__ipa_cmd(iob)->data.setassparms.data.flags_32bit = required_features;
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rc = qeth_send_ipa_cmd(card, iob, qeth_setassparms_get_caps_cb, &caps);
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if (rc) {
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qeth_set_csum_off(card, cstype, prot);
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return rc;
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}
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if (!qeth_ipa_caps_supported(&caps, required_features) ||
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!qeth_ipa_caps_enabled(&caps, required_features)) {
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qeth_set_csum_off(card, cstype, prot);
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return -EOPNOTSUPP;
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}
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dev_info(&card->gdev->dev, "HW Checksumming (%sbound IPv%d) enabled\n",
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cstype == IPA_INBOUND_CHECKSUM ? "in" : "out", prot);
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if (!qeth_ipa_caps_enabled(&caps, QETH_IPA_CHECKSUM_LP2LP) &&
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cstype == IPA_OUTBOUND_CHECKSUM)
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dev_warn(&card->gdev->dev,
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"Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n",
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QETH_CARD_IFNAME(card));
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return 0;
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}
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static int qeth_set_ipa_csum(struct qeth_card *card, bool on, int cstype,
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enum qeth_prot_versions prot)
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{
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int rc = (on) ? qeth_send_checksum_on(card, cstype, prot)
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: qeth_send_simple_setassparms_prot(card, cstype,
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IPA_CMD_ASS_STOP, 0,
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prot);
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int rc = (on) ? qeth_set_csum_on(card, cstype, prot) :
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qeth_set_csum_off(card, cstype, prot);
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return rc ? -EIO : 0;
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}
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@ -417,12 +417,6 @@ enum qeth_ipa_checksum_bits {
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QETH_IPA_CHECKSUM_LP2LP = 0x0020
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};
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/* IPA Assist checksum offload reply layout. */
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struct qeth_checksum_cmd {
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__u32 supported;
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__u32 enabled;
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} __packed;
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enum qeth_ipa_large_send_caps {
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QETH_IPA_LARGE_SEND_TCP = 0x00000001,
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};
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@ -438,7 +432,6 @@ struct qeth_ipacmd_setassparms {
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union {
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__u32 flags_32bit;
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struct qeth_ipa_caps caps;
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struct qeth_checksum_cmd chksum;
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struct qeth_arp_cache_entry arp_entry;
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struct qeth_arp_query_data query_arp;
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struct qeth_tso_start_data tso;
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