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drm/i915/gen11: fix the SAGV block time for gen11

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It's 10us for gen 11.

Reviewed-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Reviewed-by: James Ausmus <james.ausmus@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180130134918.32283-7-paulo.r.zanoni@intel.com
This commit is contained in:
Paulo Zanoni 2018-01-30 11:49:15 -02:00
parent 7800549716
commit 4357ce07e6
1 changed files with 8 additions and 1 deletions
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9
drivers/gpu/drm/i915/intel_pm.c
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@ -3694,11 +3694,18 @@ bool intel_can_enable_sagv(struct drm_atomic_state *state)
struct intel_crtc_state *cstate;
enum pipe pipe;
int level, latency;
int sagv_block_time_us = IS_GEN9(dev_priv) ? 30 : 20;
int sagv_block_time_us;
if (!intel_has_sagv(dev_priv))
return false;
if (IS_GEN9(dev_priv))
sagv_block_time_us = 30;
else if (IS_GEN10(dev_priv))
sagv_block_time_us = 20;
else
sagv_block_time_us = 10;
/*
* SKL+ workaround: bspec recommends we disable the SAGV when we have
* more then one pipe enabled