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x86/fpu: Reorder init methods
Reorder init methods in order of their relationship and usage, to form coherent blocks throughout the whole file. Reviewed-by: Borislav Petkov <bp@alien8.de> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -4,6 +4,46 @@
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#include <asm/fpu/internal.h>
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#include <asm/tlbflush.h>
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static void fpu__init_cpu_ctx_switch(void)
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{
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if (!cpu_has_eager_fpu)
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stts();
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else
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clts();
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}
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/*
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* Initialize the registers found in all CPUs, CR0 and CR4:
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*/
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static void fpu__init_cpu_generic(void)
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{
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unsigned long cr0;
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unsigned long cr4_mask = 0;
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if (cpu_has_fxsr)
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cr4_mask |= X86_CR4_OSFXSR;
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if (cpu_has_xmm)
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cr4_mask |= X86_CR4_OSXMMEXCPT;
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if (cr4_mask)
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cr4_set_bits(cr4_mask);
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cr0 = read_cr0();
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cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
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if (!cpu_has_fpu)
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cr0 |= X86_CR0_EM;
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write_cr0(cr0);
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}
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/*
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* Enable all supported FPU features. Called when a CPU is brought online.
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*/
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void fpu__init_cpu(void)
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{
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fpu__init_cpu_generic();
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fpu__init_cpu_xstate();
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fpu__init_cpu_ctx_switch();
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}
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/*
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* The earliest FPU detection code.
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*
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@ -44,9 +84,6 @@ static void fpu__init_system_early_generic(struct cpuinfo_x86 *c)
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*/
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unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
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unsigned int xstate_size;
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EXPORT_SYMBOL_GPL(xstate_size);
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static void fpu__init_system_mxcsr(void)
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{
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unsigned int mask = 0;
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@ -83,6 +120,15 @@ static void fpu__init_system_generic(void)
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fpu__init_system_mxcsr();
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}
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unsigned int xstate_size;
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EXPORT_SYMBOL_GPL(xstate_size);
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/*
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* Set up the xstate_size based on the legacy FPU context size.
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*
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* We set this up first, and later it will be overwritten by
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* fpu__init_system_xstate() if the CPU knows about xstates.
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*/
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static void fpu__init_system_xstate_size_legacy(void)
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{
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static bool on_boot_cpu = 1;
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@ -112,50 +158,6 @@ static void fpu__init_system_xstate_size_legacy(void)
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}
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}
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/*
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* Initialize the TS bit in CR0 according to the style of context-switches
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* we are using:
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*/
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static void fpu__init_cpu_ctx_switch(void)
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{
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if (!cpu_has_eager_fpu)
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stts();
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else
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clts();
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}
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/*
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* Initialize the registers found in all CPUs, CR0 and CR4:
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*/
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static void fpu__init_cpu_generic(void)
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{
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unsigned long cr0;
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unsigned long cr4_mask = 0;
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if (cpu_has_fxsr)
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cr4_mask |= X86_CR4_OSFXSR;
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if (cpu_has_xmm)
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cr4_mask |= X86_CR4_OSXMMEXCPT;
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if (cr4_mask)
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cr4_set_bits(cr4_mask);
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cr0 = read_cr0();
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cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
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if (!cpu_has_fpu)
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cr0 |= X86_CR0_EM;
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write_cr0(cr0);
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}
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/*
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* Enable all supported FPU features. Called when a CPU is brought online.
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*/
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void fpu__init_cpu(void)
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{
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fpu__init_cpu_generic();
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fpu__init_cpu_xstate();
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fpu__init_cpu_ctx_switch();
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}
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static enum { AUTO, ENABLE, DISABLE } eagerfpu = AUTO;
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static int __init eager_fpu_setup(char *s)
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