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Merge tag 'topic/drm-mipi-dsi-dsc-updates-2019-11-11' of git://anongit.freedesktop.org/drm/drm-intel into drm-intel-next-queued
Core Changes: - Update DSI data type and command definitions - Add helpers for sending compression mode and PPS packets Driver Changes: - Update tiny/st7586 to reflect a definition change Signed-off-by: Jani Nikula <jani.nikula@intel.com> From: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/87tv7a4eq3.fsf@intel.com
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commit
41dec75740
@ -33,6 +33,7 @@
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#include <linux/pm_runtime.h>
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#include <linux/slab.h>
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#include <drm/drm_dsc.h>
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#include <video/mipi_display.h>
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/**
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@ -373,6 +374,7 @@ bool mipi_dsi_packet_format_is_short(u8 type)
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case MIPI_DSI_V_SYNC_END:
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case MIPI_DSI_H_SYNC_START:
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case MIPI_DSI_H_SYNC_END:
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case MIPI_DSI_COMPRESSION_MODE:
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case MIPI_DSI_END_OF_TRANSMISSION:
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case MIPI_DSI_COLOR_MODE_OFF:
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case MIPI_DSI_COLOR_MODE_ON:
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@ -387,7 +389,7 @@ bool mipi_dsi_packet_format_is_short(u8 type)
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case MIPI_DSI_DCS_SHORT_WRITE:
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case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
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case MIPI_DSI_DCS_READ:
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case MIPI_DSI_DCS_COMPRESSION_MODE:
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case MIPI_DSI_EXECUTE_QUEUE:
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case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE:
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return true;
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}
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@ -406,11 +408,12 @@ EXPORT_SYMBOL(mipi_dsi_packet_format_is_short);
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bool mipi_dsi_packet_format_is_long(u8 type)
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{
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switch (type) {
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case MIPI_DSI_PPS_LONG_WRITE:
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case MIPI_DSI_NULL_PACKET:
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case MIPI_DSI_BLANKING_PACKET:
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case MIPI_DSI_GENERIC_LONG_WRITE:
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case MIPI_DSI_DCS_LONG_WRITE:
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case MIPI_DSI_PICTURE_PARAMETER_SET:
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case MIPI_DSI_COMPRESSED_PIXEL_STREAM:
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case MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20:
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case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24:
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case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16:
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@ -546,6 +549,56 @@ int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi,
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}
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EXPORT_SYMBOL(mipi_dsi_set_maximum_return_packet_size);
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/**
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* mipi_dsi_compression_mode() - enable/disable DSC on the peripheral
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* @dsi: DSI peripheral device
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* @enable: Whether to enable or disable the DSC
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*
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* Enable or disable Display Stream Compression on the peripheral using the
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* default Picture Parameter Set and VESA DSC 1.1 algorithm.
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*
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* Return: 0 on success or a negative error code on failure.
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*/
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ssize_t mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable)
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{
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/* Note: Needs updating for non-default PPS or algorithm */
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u8 tx[2] = { enable << 0, 0 };
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struct mipi_dsi_msg msg = {
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.channel = dsi->channel,
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.type = MIPI_DSI_COMPRESSION_MODE,
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.tx_len = sizeof(tx),
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.tx_buf = tx,
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};
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int ret = mipi_dsi_device_transfer(dsi, &msg);
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return (ret < 0) ? ret : 0;
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}
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EXPORT_SYMBOL(mipi_dsi_compression_mode);
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/**
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* mipi_dsi_picture_parameter_set() - transmit the DSC PPS to the peripheral
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* @dsi: DSI peripheral device
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* @pps: VESA DSC 1.1 Picture Parameter Set
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*
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* Transmit the VESA DSC 1.1 Picture Parameter Set to the peripheral.
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*
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* Return: 0 on success or a negative error code on failure.
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*/
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ssize_t mipi_dsi_picture_parameter_set(struct mipi_dsi_device *dsi,
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const struct drm_dsc_picture_parameter_set *pps)
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{
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struct mipi_dsi_msg msg = {
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.channel = dsi->channel,
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.type = MIPI_DSI_PICTURE_PARAMETER_SET,
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.tx_len = sizeof(*pps),
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.tx_buf = pps,
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};
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int ret = mipi_dsi_device_transfer(dsi, &msg);
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return (ret < 0) ? ret : 0;
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}
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EXPORT_SYMBOL(mipi_dsi_picture_parameter_set);
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/**
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* mipi_dsi_generic_write() - transmit data using a generic write packet
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* @dsi: DSI peripheral device
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@ -240,7 +240,7 @@ static void st7586_pipe_enable(struct drm_simple_display_pipe *pipe,
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mipi_dbi_command(dbi, ST7586_SET_DISP_DUTY, 0x7f);
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mipi_dbi_command(dbi, ST7586_SET_PART_DISP, 0xa0);
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mipi_dbi_command(dbi, MIPI_DCS_SET_PARTIAL_AREA, 0x00, 0x00, 0x00, 0x77);
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mipi_dbi_command(dbi, MIPI_DCS_SET_PARTIAL_ROWS, 0x00, 0x00, 0x00, 0x77);
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mipi_dbi_command(dbi, MIPI_DCS_EXIT_INVERT_MODE);
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msleep(100);
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@ -13,6 +13,7 @@
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struct mipi_dsi_host;
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struct mipi_dsi_device;
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struct drm_dsc_picture_parameter_set;
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/* request ACK from peripheral */
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#define MIPI_DSI_MSG_REQ_ACK BIT(0)
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@ -228,6 +229,9 @@ int mipi_dsi_shutdown_peripheral(struct mipi_dsi_device *dsi);
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int mipi_dsi_turn_on_peripheral(struct mipi_dsi_device *dsi);
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int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi,
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u16 value);
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ssize_t mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable);
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ssize_t mipi_dsi_picture_parameter_set(struct mipi_dsi_device *dsi,
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const struct drm_dsc_picture_parameter_set *pps);
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ssize_t mipi_dsi_generic_write(struct mipi_dsi_device *dsi, const void *payload,
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size_t size);
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@ -17,6 +17,9 @@ enum {
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MIPI_DSI_H_SYNC_START = 0x21,
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MIPI_DSI_H_SYNC_END = 0x31,
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MIPI_DSI_COMPRESSION_MODE = 0x07,
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MIPI_DSI_END_OF_TRANSMISSION = 0x08,
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MIPI_DSI_COLOR_MODE_OFF = 0x02,
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MIPI_DSI_COLOR_MODE_ON = 0x12,
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MIPI_DSI_SHUTDOWN_PERIPHERAL = 0x22,
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@ -34,19 +37,18 @@ enum {
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MIPI_DSI_DCS_SHORT_WRITE_PARAM = 0x15,
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MIPI_DSI_DCS_READ = 0x06,
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MIPI_DSI_DCS_COMPRESSION_MODE = 0x07,
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MIPI_DSI_PPS_LONG_WRITE = 0x0A,
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MIPI_DSI_EXECUTE_QUEUE = 0x16,
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MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE = 0x37,
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MIPI_DSI_END_OF_TRANSMISSION = 0x08,
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MIPI_DSI_NULL_PACKET = 0x09,
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MIPI_DSI_BLANKING_PACKET = 0x19,
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MIPI_DSI_GENERIC_LONG_WRITE = 0x29,
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MIPI_DSI_DCS_LONG_WRITE = 0x39,
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MIPI_DSI_PICTURE_PARAMETER_SET = 0x0a,
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MIPI_DSI_COMPRESSED_PIXEL_STREAM = 0x0b,
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MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20 = 0x0c,
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MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24 = 0x1c,
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MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16 = 0x2c,
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@ -77,7 +79,9 @@ enum {
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enum {
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MIPI_DCS_NOP = 0x00,
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MIPI_DCS_SOFT_RESET = 0x01,
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MIPI_DCS_GET_COMPRESSION_MODE = 0x03,
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MIPI_DCS_GET_DISPLAY_ID = 0x04,
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MIPI_DCS_GET_ERROR_COUNT_ON_DSI = 0x05,
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MIPI_DCS_GET_RED_CHANNEL = 0x06,
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MIPI_DCS_GET_GREEN_CHANNEL = 0x07,
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MIPI_DCS_GET_BLUE_CHANNEL = 0x08,
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@ -92,6 +96,8 @@ enum {
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MIPI_DCS_EXIT_SLEEP_MODE = 0x11,
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MIPI_DCS_ENTER_PARTIAL_MODE = 0x12,
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MIPI_DCS_ENTER_NORMAL_MODE = 0x13,
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MIPI_DCS_GET_IMAGE_CHECKSUM_RGB = 0x14,
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MIPI_DCS_GET_IMAGE_CHECKSUM_CT = 0x15,
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MIPI_DCS_EXIT_INVERT_MODE = 0x20,
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MIPI_DCS_ENTER_INVERT_MODE = 0x21,
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MIPI_DCS_SET_GAMMA_CURVE = 0x26,
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@ -102,7 +108,8 @@ enum {
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MIPI_DCS_WRITE_MEMORY_START = 0x2C,
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MIPI_DCS_WRITE_LUT = 0x2D,
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MIPI_DCS_READ_MEMORY_START = 0x2E,
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MIPI_DCS_SET_PARTIAL_AREA = 0x30,
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MIPI_DCS_SET_PARTIAL_ROWS = 0x30, /* MIPI DCS 1.02 - MIPI_DCS_SET_PARTIAL_AREA before that */
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MIPI_DCS_SET_PARTIAL_COLUMNS = 0x31,
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MIPI_DCS_SET_SCROLL_AREA = 0x33,
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MIPI_DCS_SET_TEAR_OFF = 0x34,
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MIPI_DCS_SET_TEAR_ON = 0x35,
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@ -112,7 +119,10 @@ enum {
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MIPI_DCS_ENTER_IDLE_MODE = 0x39,
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MIPI_DCS_SET_PIXEL_FORMAT = 0x3A,
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MIPI_DCS_WRITE_MEMORY_CONTINUE = 0x3C,
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MIPI_DCS_SET_3D_CONTROL = 0x3D,
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MIPI_DCS_READ_MEMORY_CONTINUE = 0x3E,
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MIPI_DCS_GET_3D_CONTROL = 0x3F,
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MIPI_DCS_SET_VSYNC_TIMING = 0x40,
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MIPI_DCS_SET_TEAR_SCANLINE = 0x44,
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MIPI_DCS_GET_SCANLINE = 0x45,
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MIPI_DCS_SET_DISPLAY_BRIGHTNESS = 0x51, /* MIPI DCS 1.3 */
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@ -124,7 +134,9 @@ enum {
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MIPI_DCS_SET_CABC_MIN_BRIGHTNESS = 0x5E, /* MIPI DCS 1.3 */
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MIPI_DCS_GET_CABC_MIN_BRIGHTNESS = 0x5F, /* MIPI DCS 1.3 */
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MIPI_DCS_READ_DDB_START = 0xA1,
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MIPI_DCS_READ_PPS_START = 0xA2,
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MIPI_DCS_READ_DDB_CONTINUE = 0xA8,
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MIPI_DCS_READ_PPS_CONTINUE = 0xA9,
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};
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/* MIPI DCS pixel formats */
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