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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 14:26:42 +07:00
ARM: tegra: clock: Drop CPU dvfs
The existing version did not extend well to core dvfs, drop it for now until the new clk api with clk_prepare and clk_unprepare is ready and non-atomic clocks are possible. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
This commit is contained in:
Colin Cross
parent
f035530b79
commit
41cfe3676d
@ -9,7 +9,6 @@ obj-y += powergate.o
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obj-y += fuse.o
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obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += clock.o
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obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_clocks.o
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obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_dvfs.o
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obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pinmux-t2-tables.o
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obj-$(CONFIG_SMP) += platsmp.o localtimer.o headsmp.o
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obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
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@ -24,81 +24,14 @@
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#include <linux/debugfs.h>
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#include <linux/slab.h>
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#include <linux/seq_file.h>
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#include <linux/regulator/consumer.h>
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#include <linux/clkdev.h>
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#include "clock.h"
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#include "board.h"
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#include "fuse.h"
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#include "clock.h"
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static LIST_HEAD(clocks);
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static DEFINE_SPINLOCK(clock_lock);
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static DEFINE_MUTEX(dvfs_lock);
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static int clk_is_dvfs(struct clk *c)
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{
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return (c->dvfs != NULL);
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};
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static int dvfs_set_rate(struct dvfs *d, unsigned long rate)
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{
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struct dvfs_table *t;
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if (d->table == NULL)
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return -ENODEV;
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for (t = d->table; t->rate != 0; t++) {
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if (rate <= t->rate) {
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if (!d->reg)
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return 0;
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return regulator_set_voltage(d->reg,
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t->millivolts * 1000,
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d->max_millivolts * 1000);
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}
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}
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return -EINVAL;
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}
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static void dvfs_init(struct clk *c)
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{
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int process_id;
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int i;
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struct dvfs_table *table;
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process_id = c->dvfs->cpu ? tegra_core_process_id() :
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tegra_cpu_process_id();
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for (i = 0; i < c->dvfs->process_id_table_length; i++)
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if (process_id == c->dvfs->process_id_table[i].process_id)
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c->dvfs->table = c->dvfs->process_id_table[i].table;
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if (c->dvfs->table == NULL) {
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pr_err("Failed to find dvfs table for clock %s process %d\n",
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c->name, process_id);
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return;
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}
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c->dvfs->max_millivolts = 0;
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for (table = c->dvfs->table; table->rate != 0; table++)
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if (c->dvfs->max_millivolts < table->millivolts)
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c->dvfs->max_millivolts = table->millivolts;
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c->dvfs->reg = regulator_get(NULL, c->dvfs->reg_id);
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if (IS_ERR(c->dvfs->reg)) {
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pr_err("Failed to get regulator %s for clock %s\n",
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c->dvfs->reg_id, c->name);
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c->dvfs->reg = NULL;
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return;
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}
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if (c->refcnt > 0)
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dvfs_set_rate(c->dvfs, c->rate);
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}
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struct clk *tegra_get_clock_by_name(const char *name)
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{
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struct clk *c;
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@ -214,34 +147,11 @@ int clk_enable_locked(struct clk *c)
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return 0;
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}
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int clk_enable_cansleep(struct clk *c)
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{
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int ret;
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unsigned long flags;
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mutex_lock(&dvfs_lock);
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if (clk_is_dvfs(c) && c->refcnt > 0)
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dvfs_set_rate(c->dvfs, c->rate);
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spin_lock_irqsave(&clock_lock, flags);
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ret = clk_enable_locked(c);
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spin_unlock_irqrestore(&clock_lock, flags);
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mutex_unlock(&dvfs_lock);
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return ret;
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}
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EXPORT_SYMBOL(clk_enable_cansleep);
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int clk_enable(struct clk *c)
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{
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int ret;
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unsigned long flags;
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if (clk_is_dvfs(c))
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BUG();
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spin_lock_irqsave(&clock_lock, flags);
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ret = clk_enable_locked(c);
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spin_unlock_irqrestore(&clock_lock, flags);
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@ -268,30 +178,10 @@ void clk_disable_locked(struct clk *c)
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c->refcnt--;
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}
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void clk_disable_cansleep(struct clk *c)
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{
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unsigned long flags;
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mutex_lock(&dvfs_lock);
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spin_lock_irqsave(&clock_lock, flags);
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clk_disable_locked(c);
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spin_unlock_irqrestore(&clock_lock, flags);
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if (clk_is_dvfs(c) && c->refcnt == 0)
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dvfs_set_rate(c->dvfs, c->rate);
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mutex_unlock(&dvfs_lock);
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}
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EXPORT_SYMBOL(clk_disable_cansleep);
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void clk_disable(struct clk *c)
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{
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unsigned long flags;
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if (clk_is_dvfs(c))
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BUG();
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spin_lock_irqsave(&clock_lock, flags);
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clk_disable_locked(c);
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spin_unlock_irqrestore(&clock_lock, flags);
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@ -356,41 +246,11 @@ int clk_set_rate_locked(struct clk *c, unsigned long rate)
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return 0;
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}
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int clk_set_rate_cansleep(struct clk *c, unsigned long rate)
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{
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int ret = 0;
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unsigned long flags;
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mutex_lock(&dvfs_lock);
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if (rate > c->rate)
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ret = dvfs_set_rate(c->dvfs, rate);
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if (ret)
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goto out;
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spin_lock_irqsave(&clock_lock, flags);
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ret = clk_set_rate_locked(c, rate);
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spin_unlock_irqrestore(&clock_lock, flags);
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if (ret)
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goto out;
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ret = dvfs_set_rate(c->dvfs, rate);
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out:
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mutex_unlock(&dvfs_lock);
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return ret;
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}
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EXPORT_SYMBOL(clk_set_rate_cansleep);
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int clk_set_rate(struct clk *c, unsigned long rate)
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{
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int ret = 0;
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unsigned long flags;
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if (clk_is_dvfs(c))
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BUG();
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spin_lock_irqsave(&clock_lock, flags);
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ret = clk_set_rate_locked(c, rate);
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spin_unlock_irqrestore(&clock_lock, flags);
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@ -503,23 +363,6 @@ void __init tegra_init_clock(void)
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tegra2_init_clocks();
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}
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int __init tegra_init_dvfs(void)
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{
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struct clk *c, *safe;
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mutex_lock(&dvfs_lock);
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list_for_each_entry_safe(c, safe, &clocks, node)
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if (c->dvfs)
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dvfs_init(c);
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mutex_unlock(&dvfs_lock);
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return 0;
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}
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late_initcall(tegra_init_dvfs);
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#ifdef CONFIG_DEBUG_FS
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static struct dentry *clk_debugfs_root;
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@ -41,28 +41,6 @@
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#define ENABLE_ON_INIT (1 << 28)
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struct clk;
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struct regulator;
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struct dvfs_table {
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unsigned long rate;
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int millivolts;
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};
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struct dvfs_process_id_table {
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int process_id;
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struct dvfs_table *table;
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};
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struct dvfs {
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struct regulator *reg;
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struct dvfs_table *table;
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int max_millivolts;
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int process_id_table_length;
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const char *reg_id;
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bool cpu;
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struct dvfs_process_id_table process_id_table[];
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};
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struct clk_mux_sel {
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struct clk *input;
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@ -141,8 +119,6 @@ struct clk {
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/* Virtual cpu clock */
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struct clk *main;
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struct clk *backup;
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struct dvfs *dvfs;
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};
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@ -91,7 +91,7 @@ static int tegra_update_cpu_speed(unsigned long rate)
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freqs.old, freqs.new);
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#endif
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ret = clk_set_rate_cansleep(cpu_clk, freqs.new * 1000);
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ret = clk_set_rate(cpu_clk, freqs.new * 1000);
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if (ret) {
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pr_err("cpu-tegra: Failed to set cpu frequency to %d kHz\n",
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freqs.new);
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@ -25,9 +25,4 @@ struct clk;
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void tegra_periph_reset_deassert(struct clk *c);
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void tegra_periph_reset_assert(struct clk *c);
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int clk_enable_cansleep(struct clk *clk);
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void clk_disable_cansleep(struct clk *clk);
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int clk_set_rate_cansleep(struct clk *clk, unsigned long rate);
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int clk_set_parent_cansleep(struct clk *clk, struct clk *parent);
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#endif
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@ -31,7 +31,6 @@
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#include "clock.h"
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#include "fuse.h"
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#include "tegra2_dvfs.h"
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#define RST_DEVICES 0x004
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#define RST_DEVICES_SET 0x300
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@ -1650,7 +1649,6 @@ static struct clk tegra_clk_virtual_cpu = {
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.backup = &tegra_pll_p,
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.ops = &tegra_cpu_ops,
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.max_rate = 1000000000,
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.dvfs = &tegra_dvfs_virtual_cpu_dvfs,
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};
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static struct clk tegra_clk_hclk = {
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@ -1,86 +0,0 @@
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/*
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* arch/arm/mach-tegra/tegra2_dvfs.c
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*
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* Copyright (C) 2010 Google, Inc.
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*
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* Author:
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* Colin Cross <ccross@google.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/kernel.h>
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#include "clock.h"
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#include "tegra2_dvfs.h"
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static struct dvfs_table virtual_cpu_process_0[] = {
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{314000000, 750},
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{456000000, 825},
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{608000000, 900},
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{760000000, 975},
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{817000000, 1000},
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{912000000, 1050},
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{1000000000, 1100},
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{0, 0},
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};
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static struct dvfs_table virtual_cpu_process_1[] = {
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{314000000, 750},
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{456000000, 825},
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{618000000, 900},
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{770000000, 975},
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{827000000, 1000},
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{922000000, 1050},
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{1000000000, 1100},
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{0, 0},
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};
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static struct dvfs_table virtual_cpu_process_2[] = {
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{494000000, 750},
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{675000000, 825},
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{817000000, 875},
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{922000000, 925},
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{1000000000, 975},
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{0, 0},
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};
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static struct dvfs_table virtual_cpu_process_3[] = {
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{730000000, 750},
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{760000000, 775},
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{845000000, 800},
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{1000000000, 875},
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{0, 0},
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};
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struct dvfs tegra_dvfs_virtual_cpu_dvfs = {
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.reg_id = "vdd_cpu",
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.process_id_table = {
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{
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.process_id = 0,
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.table = virtual_cpu_process_0,
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},
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{
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.process_id = 1,
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.table = virtual_cpu_process_1,
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},
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{
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.process_id = 2,
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.table = virtual_cpu_process_2,
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},
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{
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.process_id = 3,
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.table = virtual_cpu_process_3,
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},
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},
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.process_id_table_length = 4,
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.cpu = 1,
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};
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@ -1,20 +0,0 @@
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/*
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* arch/arm/mach-tegra/tegra2_dvfs.h
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*
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* Copyright (C) 2010 Google, Inc.
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*
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* Author:
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* Colin Cross <ccross@google.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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extern struct dvfs tegra_dvfs_virtual_cpu_dvfs;
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