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x86, cpu: Print AMD virtualization features in /proc/cpuinfo
This patch adds code to cpu initialization path to detect the extended virtualization features of AMD cpus to show them in /proc/cpuinfo. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> LKML-Reference: <1260792521-15212-1-git-send-email-joerg.roedel@amd.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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@ -168,6 +168,10 @@
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#define X86_FEATURE_FLEXPRIORITY (8*32+ 2) /* Intel FlexPriority */
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#define X86_FEATURE_EPT (8*32+ 3) /* Intel Extended Page Table */
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#define X86_FEATURE_VPID (8*32+ 4) /* Intel Virtual Processor ID */
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#define X86_FEATURE_NPT (8*32+5) /* AMD Nested Page Table support */
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#define X86_FEATURE_LBRV (8*32+6) /* AMD LBR Virtualization support */
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#define X86_FEATURE_SVML (8*32+7) /* "svm_lock" AMD SVM locking MSR */
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#define X86_FEATURE_NRIPS (8*32+8) /* "nrip_save" AMD SVM next_rip save */
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#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
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@ -32,6 +32,10 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
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static const struct cpuid_bit __cpuinitconst cpuid_bits[] = {
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{ X86_FEATURE_IDA, CR_EAX, 1, 0x00000006 },
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{ X86_FEATURE_ARAT, CR_EAX, 2, 0x00000006 },
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{ X86_FEATURE_NPT, CR_EDX, 0, 0x8000000a },
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{ X86_FEATURE_LBRV, CR_EDX, 1, 0x8000000a },
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{ X86_FEATURE_SVML, CR_EDX, 2, 0x8000000a },
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{ X86_FEATURE_NRIPS, CR_EDX, 3, 0x8000000a },
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{ 0, 0, 0, 0 }
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};
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