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[PARISC] Untangle <asm/processor.h> header include mess
asm/processor.h on parisc wants spinlocks for cpuinfo, but linux/spinlock_types.h needs lockdep, and lockdep wants prefetch. This leads to a horrible circular dependancy, because <asm/processor.h> is including something which depends on things which are not defined until the end of the file. Kludge around this by moving prefetch related code into <asm/prefetch.h> and including it before <linux/spinlock_types.h>, however this is just a temporary solution until this mess can be cleaned up. Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
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include/asm-parisc/prefetch.h
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36
include/asm-parisc/prefetch.h
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/*
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* include/asm-parisc/prefetch.h
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*
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* PA 2.0 defines data prefetch instructions on page 6-11 of the Kane book.
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* In addition, many implementations do hardware prefetching of both
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* instructions and data.
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*
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* PA7300LC (page 14-4 of the ERS) also implements prefetching by a load
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* to gr0 but not in a way that Linux can use. If the load would cause an
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* interruption (eg due to prefetching 0), it is suppressed on PA2.0
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* processors, but not on 7300LC.
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*
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*/
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#ifndef __ASM_PARISC_PREFETCH_H
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#define __ASM_PARISC_PREFETCH_H
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#ifndef __ASSEMBLY__
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#ifdef CONFIG_PREFETCH
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#define ARCH_HAS_PREFETCH
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extern inline void prefetch(const void *addr)
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{
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__asm__("ldw 0(%0), %%r0" : : "r" (addr));
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}
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#define ARCH_HAS_PREFETCHW
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extern inline void prefetchw(const void *addr)
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{
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__asm__("ldd 0(%0), %%r0" : : "r" (addr));
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}
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#endif /* CONFIG_PREFETCH */
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_PARISC_PROCESSOR_H */
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@ -9,6 +9,8 @@
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#define __ASM_PARISC_PROCESSOR_H
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#ifndef __ASSEMBLY__
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#include <asm/prefetch.h> /* lockdep.h needs <linux/prefetch.h> */
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#include <linux/threads.h>
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#include <linux/spinlock_types.h>
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@ -328,32 +330,6 @@ extern unsigned long get_wchan(struct task_struct *p);
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#define KSTK_EIP(tsk) ((tsk)->thread.regs.iaoq[0])
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#define KSTK_ESP(tsk) ((tsk)->thread.regs.gr[30])
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/*
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* PA 2.0 defines data prefetch instructions on page 6-11 of the Kane book.
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* In addition, many implementations do hardware prefetching of both
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* instructions and data.
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*
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* PA7300LC (page 14-4 of the ERS) also implements prefetching by a load
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* to gr0 but not in a way that Linux can use. If the load would cause an
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* interruption (eg due to prefetching 0), it is suppressed on PA2.0
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* processors, but not on 7300LC.
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*/
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#ifdef CONFIG_PREFETCH
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#define ARCH_HAS_PREFETCH
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#define ARCH_HAS_PREFETCHW
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extern inline void prefetch(const void *addr)
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{
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__asm__("ldw 0(%0), %%r0" : : "r" (addr));
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}
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extern inline void prefetchw(const void *addr)
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{
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__asm__("ldd 0(%0), %%r0" : : "r" (addr));
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}
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#endif
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#define cpu_relax() barrier()
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#endif /* __ASSEMBLY__ */
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