AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2024-11-24 20:30:53 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity

usb: cdns3: gadget: calculate TD_SIZE based on TD

Browse Source 
The TRB entry TD_SIZE is the packet number for the TD (request) but not the
each TRB, so it only needs to be assigned for the first TRB during the TD,
and the value of it is for TD too.

Fixes: 7733f6c32e ("usb: cdns3: Add Cadence USB3 DRD Driver")
Signed-off-by: Peter Chen <peter.chen@nxp.com>
This commit is contained in:
Peter Chen 2020-11-03 22:16:00 +08:00
parent 78e9158851
commit 40252dd7cf
No known key found for this signature in database
GPG Key ID: 4859298150D671BB
1 changed files with 13 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
drivers/usb/cdns3/gadget.c
View File

@ -1193,10 +1193,20 @@ static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
/* set incorrect Cycle Bit for first trb*/
control = priv_ep->pcs ? 0 : TRB_CYCLE;
trb->length = 0;
if (priv_dev->dev_ver >= DEV_VER_V2) {
u16 td_size;
td_size = DIV_ROUND_UP(request->length,
priv_ep->endpoint.maxpacket);
if (priv_dev->gadget.speed == USB_SPEED_SUPER)
trb->length = TRB_TDL_SS_SIZE(td_size);
else
control |= TRB_TDL_HS_SIZE(td_size);
}
do {
u32 length;
u16 td_size = 0;
/* fill TRB */
control |= TRB_TYPE(TRB_NORMAL);
@ -1208,20 +1218,12 @@ static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
length = request->length;
}
if (likely(priv_dev->dev_ver >= DEV_VER_V2))
td_size = DIV_ROUND_UP(length,
priv_ep->endpoint.maxpacket);
else if (priv_ep->flags & EP_TDLCHK_EN)
if (priv_ep->flags & EP_TDLCHK_EN)
total_tdl += DIV_ROUND_UP(length,
priv_ep->endpoint.maxpacket);
trb->length = cpu_to_le32(TRB_BURST_LEN(priv_ep->trb_burst_size) |
trb->length |= cpu_to_le32(TRB_BURST_LEN(priv_ep->trb_burst_size) |
TRB_LEN(length));
if (priv_dev->gadget.speed == USB_SPEED_SUPER)
trb->length |= cpu_to_le32(TRB_TDL_SS_SIZE(td_size));
else
control |= TRB_TDL_HS_SIZE(td_size);
pcs = priv_ep->pcs ? TRB_CYCLE : 0;
/*