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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 18:10:52 +07:00
scsi: mpt3sas: Do not use 32-bit atomic request descriptor for Ventura controllers.
Sending I/O through 32 bit descriptors to Ventura series of controller results in IO timeout on certain conditions. This error only occurs on systems with high I/O activity. Changes in this patch will prevent driver from using 32 bit descriptor and use 64 bit Descriptors Signed-off-by: Suganath Prabu S <suganath-prabu.subramani@broadcom.com> Reviewed-by: Tomas Henzl <thenzl@redhat.com> Reviewed-by: Hannes Reinecke <hare@suse.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
parent
b4472d7180
commit
40114bde97
@ -1227,7 +1227,7 @@ _base_async_event(struct MPT3SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
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ack_request->EventContext = mpi_reply->EventContext;
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ack_request->VF_ID = 0; /* TODO */
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ack_request->VP_ID = 0;
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ioc->put_smid_default(ioc, smid);
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mpt3sas_base_put_smid_default(ioc, smid);
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out:
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@ -3420,15 +3420,15 @@ _base_put_smid_scsi_io(struct MPT3SAS_ADAPTER *ioc, u16 smid, u16 handle)
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}
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/**
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* _base_put_smid_fast_path - send fast path request to firmware
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* mpt3sas_base_put_smid_fast_path - send fast path request to firmware
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* @ioc: per adapter object
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* @smid: system request message index
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* @handle: device handle
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*
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* Return nothing.
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*/
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static void
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_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
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void
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mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
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u16 handle)
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{
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Mpi2RequestDescriptorUnion_t descriptor;
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@ -3445,14 +3445,14 @@ _base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
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}
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/**
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* _base_put_smid_hi_priority - send Task Management request to firmware
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* mpt3sas_base_put_smid_hi_priority - send Task Management request to firmware
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* @ioc: per adapter object
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* @smid: system request message index
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* @msix_task: msix_task will be same as msix of IO incase of task abort else 0.
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* Return nothing.
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*/
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static void
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_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid,
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void
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mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid,
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u16 msix_task)
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{
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Mpi2RequestDescriptorUnion_t descriptor;
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@ -3490,15 +3490,15 @@ _base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid,
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}
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/**
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* _base_put_smid_nvme_encap - send NVMe encapsulated request to
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* mpt3sas_base_put_smid_nvme_encap - send NVMe encapsulated request to
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* firmware
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* @ioc: per adapter object
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* @smid: system request message index
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*
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* Return nothing.
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*/
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static void
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_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid)
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void
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mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid)
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{
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Mpi2RequestDescriptorUnion_t descriptor;
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u64 *request = (u64 *)&descriptor;
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@ -3514,14 +3514,14 @@ _base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid)
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}
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/**
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* _base_put_smid_default - Default, primarily used for config pages
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* mpt3sas_base_put_smid_default - Default, primarily used for config pages
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* @ioc: per adapter object
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* @smid: system request message index
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*
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* Return nothing.
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*/
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static void
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_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid)
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void
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mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid)
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{
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Mpi2RequestDescriptorUnion_t descriptor;
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void *mpi_req_iomem;
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@ -3555,116 +3555,6 @@ _base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid)
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&ioc->scsi_lookup_lock);
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}
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/**
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* _base_put_smid_scsi_io_atomic - send SCSI_IO request to firmware using
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* Atomic Request Descriptor
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* @ioc: per adapter object
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* @smid: system request message index
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* @handle: device handle, unused in this function, for function type match
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*
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* Return nothing.
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*/
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static void
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_base_put_smid_scsi_io_atomic(struct MPT3SAS_ADAPTER *ioc, u16 smid,
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u16 handle)
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{
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Mpi26AtomicRequestDescriptor_t descriptor;
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u32 *request = (u32 *)&descriptor;
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descriptor.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
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descriptor.MSIxIndex = _base_get_msix_index(ioc);
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descriptor.SMID = cpu_to_le16(smid);
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writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost);
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}
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/**
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* _base_put_smid_fast_path_atomic - send fast path request to firmware
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* using Atomic Request Descriptor
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* @ioc: per adapter object
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* @smid: system request message index
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* @handle: device handle, unused in this function, for function type match
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* Return nothing
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*/
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static void
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_base_put_smid_fast_path_atomic(struct MPT3SAS_ADAPTER *ioc, u16 smid,
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u16 handle)
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{
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Mpi26AtomicRequestDescriptor_t descriptor;
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u32 *request = (u32 *)&descriptor;
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descriptor.RequestFlags = MPI25_REQ_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO;
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descriptor.MSIxIndex = _base_get_msix_index(ioc);
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descriptor.SMID = cpu_to_le16(smid);
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writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost);
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}
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/**
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* _base_put_smid_hi_priority_atomic - send Task Management request to
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* firmware using Atomic Request Descriptor
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* @ioc: per adapter object
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* @smid: system request message index
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* @msix_task: msix_task will be same as msix of IO incase of task abort else 0
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*
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* Return nothing.
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*/
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static void
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_base_put_smid_hi_priority_atomic(struct MPT3SAS_ADAPTER *ioc, u16 smid,
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u16 msix_task)
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{
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Mpi26AtomicRequestDescriptor_t descriptor;
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u32 *request = (u32 *)&descriptor;
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descriptor.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
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descriptor.MSIxIndex = msix_task;
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descriptor.SMID = cpu_to_le16(smid);
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writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost);
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}
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/**
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* _base_put_smid_nvme_encap_atomic - send NVMe encapsulated request to
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* firmware using Atomic Request Descriptor
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* @ioc: per adapter object
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* @smid: system request message index
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*
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* Return nothing.
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*/
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static void
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_base_put_smid_nvme_encap_atomic(struct MPT3SAS_ADAPTER *ioc, u16 smid)
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{
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Mpi26AtomicRequestDescriptor_t descriptor;
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u32 *request = (u32 *)&descriptor;
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descriptor.RequestFlags = MPI26_REQ_DESCRIPT_FLAGS_PCIE_ENCAPSULATED;
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descriptor.MSIxIndex = _base_get_msix_index(ioc);
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descriptor.SMID = cpu_to_le16(smid);
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writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost);
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}
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/**
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* _base_put_smid_default - Default, primarily used for config pages
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* use Atomic Request Descriptor
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* @ioc: per adapter object
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* @smid: system request message index
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*
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* Return nothing.
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*/
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static void
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_base_put_smid_default_atomic(struct MPT3SAS_ADAPTER *ioc, u16 smid)
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{
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Mpi26AtomicRequestDescriptor_t descriptor;
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u32 *request = (u32 *)&descriptor;
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descriptor.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
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descriptor.MSIxIndex = _base_get_msix_index(ioc);
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descriptor.SMID = cpu_to_le16(smid);
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writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost);
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}
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/**
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* _base_display_OEMs_branding - Display branding string
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* @ioc: per adapter object
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@ -5243,7 +5133,7 @@ mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc,
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mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
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ioc->ioc_link_reset_in_progress = 1;
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init_completion(&ioc->base_cmds.done);
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ioc->put_smid_default(ioc, smid);
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mpt3sas_base_put_smid_default(ioc, smid);
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wait_for_completion_timeout(&ioc->base_cmds.done,
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msecs_to_jiffies(10000));
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if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
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@ -5343,7 +5233,7 @@ mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc,
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ioc->base_cmds.smid = smid;
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memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
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init_completion(&ioc->base_cmds.done);
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ioc->put_smid_default(ioc, smid);
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mpt3sas_base_put_smid_default(ioc, smid);
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wait_for_completion_timeout(&ioc->base_cmds.done,
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msecs_to_jiffies(10000));
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if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) {
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@ -5528,8 +5418,6 @@ _base_get_ioc_facts(struct MPT3SAS_ADAPTER *ioc)
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if ((facts->IOCCapabilities &
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MPI2_IOCFACTS_CAPABILITY_RDPQ_ARRAY_CAPABLE) && (!reset_devices))
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ioc->rdpq_array_capable = 1;
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if (facts->IOCCapabilities & MPI26_IOCFACTS_CAPABILITY_ATOMIC_REQ)
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ioc->atomic_desc_capable = 1;
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facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
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facts->IOCRequestFrameSize =
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le16_to_cpu(mpi_reply.IOCRequestFrameSize);
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@ -5771,7 +5659,7 @@ _base_send_port_enable(struct MPT3SAS_ADAPTER *ioc)
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mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
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init_completion(&ioc->port_enable_cmds.done);
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ioc->put_smid_default(ioc, smid);
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mpt3sas_base_put_smid_default(ioc, smid);
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wait_for_completion_timeout(&ioc->port_enable_cmds.done, 300*HZ);
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if (!(ioc->port_enable_cmds.status & MPT3_CMD_COMPLETE)) {
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pr_err(MPT3SAS_FMT "%s: timeout\n",
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@ -5834,7 +5722,7 @@ mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc)
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memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
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mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
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ioc->put_smid_default(ioc, smid);
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mpt3sas_base_put_smid_default(ioc, smid);
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return 0;
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}
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@ -5953,7 +5841,7 @@ _base_event_notification(struct MPT3SAS_ADAPTER *ioc)
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mpi_request->EventMasks[i] =
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cpu_to_le32(ioc->event_masks[i]);
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init_completion(&ioc->base_cmds.done);
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ioc->put_smid_default(ioc, smid);
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mpt3sas_base_put_smid_default(ioc, smid);
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wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
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if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) {
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pr_err(MPT3SAS_FMT "%s: timeout\n",
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@ -6467,23 +6355,10 @@ mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc)
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break;
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}
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if (ioc->atomic_desc_capable) {
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ioc->put_smid_default = &_base_put_smid_default_atomic;
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ioc->put_smid_scsi_io = &_base_put_smid_scsi_io_atomic;
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ioc->put_smid_fast_path = &_base_put_smid_fast_path_atomic;
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ioc->put_smid_hi_priority = &_base_put_smid_hi_priority_atomic;
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ioc->put_smid_nvme_encap = &_base_put_smid_nvme_encap_atomic;
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} else {
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ioc->put_smid_default = &_base_put_smid_default;
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if (ioc->is_mcpu_endpoint)
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ioc->put_smid_scsi_io = &_base_put_smid_mpi_ep_scsi_io;
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else
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ioc->put_smid_scsi_io = &_base_put_smid_scsi_io;
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ioc->put_smid_fast_path = &_base_put_smid_fast_path;
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ioc->put_smid_hi_priority = &_base_put_smid_hi_priority;
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ioc->put_smid_nvme_encap = &_base_put_smid_nvme_encap;
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}
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if (ioc->is_mcpu_endpoint)
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ioc->put_smid_scsi_io = &_base_put_smid_mpi_ep_scsi_io;
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else
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ioc->put_smid_scsi_io = &_base_put_smid_scsi_io;
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/*
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* These function pointers for other requests that don't
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@ -1354,12 +1354,7 @@ struct MPT3SAS_ADAPTER {
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void *device_remove_in_progress;
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u16 device_remove_in_progress_sz;
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u8 is_gen35_ioc;
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u8 atomic_desc_capable;
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PUT_SMID_IO_FP_HIP put_smid_scsi_io;
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PUT_SMID_IO_FP_HIP put_smid_fast_path;
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PUT_SMID_IO_FP_HIP put_smid_hi_priority;
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PUT_SMID_DEFAULT put_smid_default;
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PUT_SMID_DEFAULT put_smid_nvme_encap;
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};
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@ -1400,6 +1395,12 @@ void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid);
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dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid);
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void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc);
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void mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
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u16 handle);
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void mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid,
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u16 msix_task);
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void mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid);
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void mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid);
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/* hi-priority queue */
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u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
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u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx,
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@ -403,7 +403,7 @@ _config_request(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigRequest_t
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memcpy(config_request, mpi_request, sizeof(Mpi2ConfigRequest_t));
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_config_display_some_debug(ioc, smid, "config_request", NULL);
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init_completion(&ioc->config_cmds.done);
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ioc->put_smid_default(ioc, smid);
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mpt3sas_base_put_smid_default(ioc, smid);
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wait_for_completion_timeout(&ioc->config_cmds.done, timeout*HZ);
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if (!(ioc->config_cmds.status & MPT3_CMD_COMPLETE)) {
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pr_err(MPT3SAS_FMT "%s: timeout\n",
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@ -820,7 +820,7 @@ _ctl_do_mpt_command(struct MPT3SAS_ADAPTER *ioc, struct mpt3_ioctl_command karg,
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ret = -EINVAL;
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goto out;
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}
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ioc->put_smid_nvme_encap(ioc, smid);
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mpt3sas_base_put_smid_nvme_encap(ioc, smid);
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break;
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}
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case MPI2_FUNCTION_SCSI_IO_REQUEST:
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@ -845,7 +845,7 @@ _ctl_do_mpt_command(struct MPT3SAS_ADAPTER *ioc, struct mpt3_ioctl_command karg,
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if (mpi_request->Function == MPI2_FUNCTION_SCSI_IO_REQUEST)
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ioc->put_smid_scsi_io(ioc, smid, device_handle);
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else
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ioc->put_smid_default(ioc, smid);
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mpt3sas_base_put_smid_default(ioc, smid);
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break;
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}
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case MPI2_FUNCTION_SCSI_TASK_MGMT:
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@ -882,7 +882,7 @@ _ctl_do_mpt_command(struct MPT3SAS_ADAPTER *ioc, struct mpt3_ioctl_command karg,
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tm_request->DevHandle));
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ioc->build_sg_mpi(ioc, psge, data_out_dma, data_out_sz,
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data_in_dma, data_in_sz);
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ioc->put_smid_hi_priority(ioc, smid, 0);
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mpt3sas_base_put_smid_hi_priority(ioc, smid, 0);
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break;
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}
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case MPI2_FUNCTION_SMP_PASSTHROUGH:
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@ -913,7 +913,7 @@ _ctl_do_mpt_command(struct MPT3SAS_ADAPTER *ioc, struct mpt3_ioctl_command karg,
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}
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ioc->build_sg(ioc, psge, data_out_dma, data_out_sz, data_in_dma,
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data_in_sz);
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ioc->put_smid_default(ioc, smid);
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mpt3sas_base_put_smid_default(ioc, smid);
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break;
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}
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case MPI2_FUNCTION_SATA_PASSTHROUGH:
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@ -928,7 +928,7 @@ _ctl_do_mpt_command(struct MPT3SAS_ADAPTER *ioc, struct mpt3_ioctl_command karg,
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}
|
||||
ioc->build_sg(ioc, psge, data_out_dma, data_out_sz, data_in_dma,
|
||||
data_in_sz);
|
||||
ioc->put_smid_default(ioc, smid);
|
||||
mpt3sas_base_put_smid_default(ioc, smid);
|
||||
break;
|
||||
}
|
||||
case MPI2_FUNCTION_FW_DOWNLOAD:
|
||||
@ -936,7 +936,7 @@ _ctl_do_mpt_command(struct MPT3SAS_ADAPTER *ioc, struct mpt3_ioctl_command karg,
|
||||
{
|
||||
ioc->build_sg(ioc, psge, data_out_dma, data_out_sz, data_in_dma,
|
||||
data_in_sz);
|
||||
ioc->put_smid_default(ioc, smid);
|
||||
mpt3sas_base_put_smid_default(ioc, smid);
|
||||
break;
|
||||
}
|
||||
case MPI2_FUNCTION_TOOLBOX:
|
||||
@ -951,7 +951,7 @@ _ctl_do_mpt_command(struct MPT3SAS_ADAPTER *ioc, struct mpt3_ioctl_command karg,
|
||||
ioc->build_sg_mpi(ioc, psge, data_out_dma, data_out_sz,
|
||||
data_in_dma, data_in_sz);
|
||||
}
|
||||
ioc->put_smid_default(ioc, smid);
|
||||
mpt3sas_base_put_smid_default(ioc, smid);
|
||||
break;
|
||||
}
|
||||
case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
|
||||
@ -970,7 +970,7 @@ _ctl_do_mpt_command(struct MPT3SAS_ADAPTER *ioc, struct mpt3_ioctl_command karg,
|
||||
default:
|
||||
ioc->build_sg_mpi(ioc, psge, data_out_dma, data_out_sz,
|
||||
data_in_dma, data_in_sz);
|
||||
ioc->put_smid_default(ioc, smid);
|
||||
mpt3sas_base_put_smid_default(ioc, smid);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -1601,7 +1601,7 @@ _ctl_diag_register_2(struct MPT3SAS_ADAPTER *ioc,
|
||||
cpu_to_le32(ioc->product_specific[buffer_type][i]);
|
||||
|
||||
init_completion(&ioc->ctl_cmds.done);
|
||||
ioc->put_smid_default(ioc, smid);
|
||||
mpt3sas_base_put_smid_default(ioc, smid);
|
||||
wait_for_completion_timeout(&ioc->ctl_cmds.done,
|
||||
MPT3_IOCTL_DEFAULT_TIMEOUT*HZ);
|
||||
|
||||
@ -1948,7 +1948,7 @@ mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type,
|
||||
mpi_request->VP_ID = 0;
|
||||
|
||||
init_completion(&ioc->ctl_cmds.done);
|
||||
ioc->put_smid_default(ioc, smid);
|
||||
mpt3sas_base_put_smid_default(ioc, smid);
|
||||
wait_for_completion_timeout(&ioc->ctl_cmds.done,
|
||||
MPT3_IOCTL_DEFAULT_TIMEOUT*HZ);
|
||||
|
||||
@ -2215,7 +2215,7 @@ _ctl_diag_read_buffer(struct MPT3SAS_ADAPTER *ioc, void __user *arg)
|
||||
mpi_request->VP_ID = 0;
|
||||
|
||||
init_completion(&ioc->ctl_cmds.done);
|
||||
ioc->put_smid_default(ioc, smid);
|
||||
mpt3sas_base_put_smid_default(ioc, smid);
|
||||
wait_for_completion_timeout(&ioc->ctl_cmds.done,
|
||||
MPT3_IOCTL_DEFAULT_TIMEOUT*HZ);
|
||||
|
||||
|
@ -2679,7 +2679,7 @@ mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
|
||||
int_to_scsilun(lun, (struct scsi_lun *)mpi_request->LUN);
|
||||
mpt3sas_scsih_set_tm_flag(ioc, handle);
|
||||
init_completion(&ioc->tm_cmds.done);
|
||||
ioc->put_smid_hi_priority(ioc, smid, msix_task);
|
||||
mpt3sas_base_put_smid_hi_priority(ioc, smid, msix_task);
|
||||
wait_for_completion_timeout(&ioc->tm_cmds.done, timeout*HZ);
|
||||
if (!(ioc->tm_cmds.status & MPT3_CMD_COMPLETE)) {
|
||||
pr_err(MPT3SAS_FMT "%s: timeout\n",
|
||||
@ -3638,7 +3638,7 @@ _scsih_tm_tr_send(struct MPT3SAS_ADAPTER *ioc, u16 handle)
|
||||
mpi_request->DevHandle = cpu_to_le16(handle);
|
||||
mpi_request->TaskType = MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET;
|
||||
set_bit(handle, ioc->device_remove_in_progress);
|
||||
ioc->put_smid_hi_priority(ioc, smid, 0);
|
||||
mpt3sas_base_put_smid_hi_priority(ioc, smid, 0);
|
||||
mpt3sas_trigger_master(ioc, MASTER_TRIGGER_DEVICE_REMOVAL);
|
||||
|
||||
out:
|
||||
@ -3739,7 +3739,7 @@ _scsih_tm_tr_complete(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
|
||||
mpi_request->Function = MPI2_FUNCTION_SAS_IO_UNIT_CONTROL;
|
||||
mpi_request->Operation = MPI2_SAS_OP_REMOVE_DEVICE;
|
||||
mpi_request->DevHandle = mpi_request_tm->DevHandle;
|
||||
ioc->put_smid_default(ioc, smid_sas_ctrl);
|
||||
mpt3sas_base_put_smid_default(ioc, smid_sas_ctrl);
|
||||
|
||||
return _scsih_check_for_pending_tm(ioc, smid);
|
||||
}
|
||||
@ -3834,7 +3834,7 @@ _scsih_tm_tr_volume_send(struct MPT3SAS_ADAPTER *ioc, u16 handle)
|
||||
mpi_request->Function = MPI2_FUNCTION_SCSI_TASK_MGMT;
|
||||
mpi_request->DevHandle = cpu_to_le16(handle);
|
||||
mpi_request->TaskType = MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET;
|
||||
ioc->put_smid_hi_priority(ioc, smid, 0);
|
||||
mpt3sas_base_put_smid_hi_priority(ioc, smid, 0);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -3926,7 +3926,7 @@ _scsih_issue_delayed_event_ack(struct MPT3SAS_ADAPTER *ioc, u16 smid, u16 event,
|
||||
ack_request->EventContext = event_context;
|
||||
ack_request->VF_ID = 0; /* TODO */
|
||||
ack_request->VP_ID = 0;
|
||||
ioc->put_smid_default(ioc, smid);
|
||||
mpt3sas_base_put_smid_default(ioc, smid);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -3983,7 +3983,7 @@ _scsih_issue_delayed_sas_io_unit_ctrl(struct MPT3SAS_ADAPTER *ioc,
|
||||
mpi_request->Function = MPI2_FUNCTION_SAS_IO_UNIT_CONTROL;
|
||||
mpi_request->Operation = MPI2_SAS_OP_REMOVE_DEVICE;
|
||||
mpi_request->DevHandle = handle;
|
||||
ioc->put_smid_default(ioc, smid);
|
||||
mpt3sas_base_put_smid_default(ioc, smid);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -4712,12 +4712,12 @@ scsih_qcmd(struct Scsi_Host *shost, struct scsi_cmnd *scmd)
|
||||
if (sas_target_priv_data->flags & MPT_TARGET_FASTPATH_IO) {
|
||||
mpi_request->IoFlags = cpu_to_le16(scmd->cmd_len |
|
||||
MPI25_SCSIIO_IOFLAGS_FAST_PATH);
|
||||
ioc->put_smid_fast_path(ioc, smid, handle);
|
||||
mpt3sas_base_put_smid_fast_path(ioc, smid, handle);
|
||||
} else
|
||||
ioc->put_smid_scsi_io(ioc, smid,
|
||||
le16_to_cpu(mpi_request->DevHandle));
|
||||
} else
|
||||
ioc->put_smid_default(ioc, smid);
|
||||
mpt3sas_base_put_smid_default(ioc, smid);
|
||||
return 0;
|
||||
|
||||
out:
|
||||
@ -7606,7 +7606,7 @@ _scsih_ir_fastpath(struct MPT3SAS_ADAPTER *ioc, u16 handle, u8 phys_disk_num)
|
||||
handle, phys_disk_num));
|
||||
|
||||
init_completion(&ioc->scsih_cmds.done);
|
||||
ioc->put_smid_default(ioc, smid);
|
||||
mpt3sas_base_put_smid_default(ioc, smid);
|
||||
wait_for_completion_timeout(&ioc->scsih_cmds.done, 10*HZ);
|
||||
|
||||
if (!(ioc->scsih_cmds.status & MPT3_CMD_COMPLETE)) {
|
||||
@ -9697,7 +9697,7 @@ _scsih_ir_shutdown(struct MPT3SAS_ADAPTER *ioc)
|
||||
if (!ioc->hide_ir_msg)
|
||||
pr_info(MPT3SAS_FMT "IR shutdown (sending)\n", ioc->name);
|
||||
init_completion(&ioc->scsih_cmds.done);
|
||||
ioc->put_smid_default(ioc, smid);
|
||||
mpt3sas_base_put_smid_default(ioc, smid);
|
||||
wait_for_completion_timeout(&ioc->scsih_cmds.done, 10*HZ);
|
||||
|
||||
if (!(ioc->scsih_cmds.status & MPT3_CMD_COMPLETE)) {
|
||||
|
@ -392,7 +392,7 @@ _transport_expander_report_manufacture(struct MPT3SAS_ADAPTER *ioc,
|
||||
"report_manufacture - send to sas_addr(0x%016llx)\n",
|
||||
ioc->name, (unsigned long long)sas_address));
|
||||
init_completion(&ioc->transport_cmds.done);
|
||||
ioc->put_smid_default(ioc, smid);
|
||||
mpt3sas_base_put_smid_default(ioc, smid);
|
||||
wait_for_completion_timeout(&ioc->transport_cmds.done, 10*HZ);
|
||||
|
||||
if (!(ioc->transport_cmds.status & MPT3_CMD_COMPLETE)) {
|
||||
@ -1198,7 +1198,7 @@ _transport_get_expander_phy_error_log(struct MPT3SAS_ADAPTER *ioc,
|
||||
ioc->name, (unsigned long long)phy->identify.sas_address,
|
||||
phy->number));
|
||||
init_completion(&ioc->transport_cmds.done);
|
||||
ioc->put_smid_default(ioc, smid);
|
||||
mpt3sas_base_put_smid_default(ioc, smid);
|
||||
wait_for_completion_timeout(&ioc->transport_cmds.done, 10*HZ);
|
||||
|
||||
if (!(ioc->transport_cmds.status & MPT3_CMD_COMPLETE)) {
|
||||
@ -1514,7 +1514,7 @@ _transport_expander_phy_control(struct MPT3SAS_ADAPTER *ioc,
|
||||
ioc->name, (unsigned long long)phy->identify.sas_address,
|
||||
phy->number, phy_operation));
|
||||
init_completion(&ioc->transport_cmds.done);
|
||||
ioc->put_smid_default(ioc, smid);
|
||||
mpt3sas_base_put_smid_default(ioc, smid);
|
||||
wait_for_completion_timeout(&ioc->transport_cmds.done, 10*HZ);
|
||||
|
||||
if (!(ioc->transport_cmds.status & MPT3_CMD_COMPLETE)) {
|
||||
@ -2014,7 +2014,7 @@ _transport_smp_handler(struct bsg_job *job, struct Scsi_Host *shost,
|
||||
"%s - sending smp request\n", ioc->name, __func__));
|
||||
|
||||
init_completion(&ioc->transport_cmds.done);
|
||||
ioc->put_smid_default(ioc, smid);
|
||||
mpt3sas_base_put_smid_default(ioc, smid);
|
||||
wait_for_completion_timeout(&ioc->transport_cmds.done, 10*HZ);
|
||||
|
||||
if (!(ioc->transport_cmds.status & MPT3_CMD_COMPLETE)) {
|
||||
|
Loading…
Reference in New Issue
Block a user