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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 10:06:00 +07:00
e1000e: cleanup - move defines to appropriate header file
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -44,6 +44,8 @@
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#define E1000_EIAC_82574 0x000DC /* Ext. Interrupt Auto Clear - RW */
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#define E1000_EIAC_MASK_82574 0x01F00000
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#define E1000_IVAR_INT_ALLOC_VALID 0x8
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/* Manageability Operation Mode mask */
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#define E1000_NVM_INIT_CTRL2_MNGM 0x6000
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@ -216,6 +216,8 @@
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#define E1000_CTRL_MEHE 0x00080000 /* Memory Error Handling Enable */
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#define E1000_CTRL_SWDPIN0 0x00040000 /* SWDPIN 0 value */
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#define E1000_CTRL_SWDPIN1 0x00080000 /* SWDPIN 1 value */
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#define E1000_CTRL_ADVD3WUC 0x00100000 /* D3 WUC */
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#define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 /* PHY PM enable */
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#define E1000_CTRL_SWDPIO0 0x00400000 /* SWDPIN 0 Input or output */
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#define E1000_CTRL_RST 0x04000000 /* Global reset */
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#define E1000_CTRL_RFCE 0x08000000 /* Receive Flow Control enable */
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@ -310,6 +312,7 @@
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/* SerDes Control */
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#define E1000_SCTL_DISABLE_SERDES_LOOPBACK 0x0400
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#define E1000_SCTL_ENABLE_SERDES_LOOPBACK 0x0410
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/* Receive Checksum Control */
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#define E1000_RXCSUM_TUOFL 0x00000200 /* TCP / UDP checksum offload */
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@ -1432,8 +1432,7 @@ static int e1000_set_82571_fiber_loopback(struct e1000_adapter *adapter)
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/* special write to serdes control register to enable SerDes analog
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* loopback
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*/
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#define E1000_SERDES_LB_ON 0x410
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ew32(SCTL, E1000_SERDES_LB_ON);
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ew32(SCTL, E1000_SCTL_ENABLE_SERDES_LOOPBACK);
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e1e_flush();
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usleep_range(10000, 20000);
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@ -1527,8 +1526,7 @@ static void e1000_loopback_cleanup(struct e1000_adapter *adapter)
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case e1000_82572:
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if (hw->phy.media_type == e1000_media_type_fiber ||
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hw->phy.media_type == e1000_media_type_internal_serdes) {
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#define E1000_SERDES_LB_OFF 0x400
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ew32(SCTL, E1000_SERDES_LB_OFF);
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ew32(SCTL, E1000_SCTL_DISABLE_SERDES_LOOPBACK);
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e1e_flush();
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usleep_range(10000, 20000);
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break;
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@ -1957,7 +1957,6 @@ static void e1000_configure_msix(struct e1000_adapter *adapter)
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ew32(RFCTL, rfctl);
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}
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#define E1000_IVAR_INT_ALLOC_VALID 0x8
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/* Configure Rx vector */
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rx_ring->ims_val = E1000_IMS_RXQ0;
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adapter->eiac_mask |= rx_ring->ims_val;
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@ -5911,10 +5910,6 @@ static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
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}
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ctrl = er32(CTRL);
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/* advertise wake from D3Cold */
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#define E1000_CTRL_ADVD3WUC 0x00100000
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/* phy power management enable */
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#define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
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ctrl |= E1000_CTRL_ADVD3WUC;
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if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
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ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
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