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[PARISC] Use FIXUP_BRANCH_CLOBBER to asm clobber list
Joel Soete noticed correctly that the fixup's clobbers must be listed as the ASM clobbers. FIXUP_BRANCH in unaligned.c has a new macro which lists all the clobbers in the fixup, we use this throughout the file to simplify the process of listing clobbers in the future. A missing "r1" clobber is added to our uaccess.h for the 64-bit __put_kernel_asm. Interestingly this is a pretty serious bug since gcc generates pretty good use of r1 as a temporary and the uses of __put_kernel_asm are varied and dangerous if r1 is scratched during an invalid write. Signed-off-by: Joel Soete <soete.joel@tiscali.be> Signed-off-by: Carlos O'Donell <carlos@parisc-linux.org> Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
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@ -43,6 +43,8 @@
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"\tldil L%%" #lbl ", %%r1\n" \
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"\tldil L%%" #lbl ", %%r1\n" \
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"\tldo R%%" #lbl "(%%r1), %%r1\n" \
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"\tldo R%%" #lbl "(%%r1), %%r1\n" \
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"\tbv,n %%r0(%%r1)\n"
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"\tbv,n %%r0(%%r1)\n"
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/* If you use FIXUP_BRANCH, then you must list this clobber */
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#define FIXUP_BRANCH_CLOBBER "r1"
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/* 1111 1100 0000 0000 0001 0011 1100 0000 */
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/* 1111 1100 0000 0000 0001 0011 1100 0000 */
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#define OPCODE1(a,b,c) ((a)<<26|(b)<<12|(c)<<6)
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#define OPCODE1(a,b,c) ((a)<<26|(b)<<12|(c)<<6)
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@ -157,7 +159,7 @@ static int emulate_ldh(struct pt_regs *regs, int toreg)
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" .previous\n"
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" .previous\n"
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: "=r" (val), "=r" (ret)
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: "=r" (val), "=r" (ret)
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: "0" (val), "r" (saddr), "r" (regs->isr)
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: "0" (val), "r" (saddr), "r" (regs->isr)
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: "r20" );
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: "r20", FIXUP_BRANCH_CLOBBER );
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DPRINTF("val = 0x" RFMT "\n", val);
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DPRINTF("val = 0x" RFMT "\n", val);
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@ -202,7 +204,7 @@ static int emulate_ldw(struct pt_regs *regs, int toreg, int flop)
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" .previous\n"
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" .previous\n"
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: "=r" (val), "=r" (ret)
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: "=r" (val), "=r" (ret)
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: "0" (val), "r" (saddr), "r" (regs->isr)
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: "0" (val), "r" (saddr), "r" (regs->isr)
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: "r19", "r20" );
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: "r19", "r20", FIXUP_BRANCH_CLOBBER );
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DPRINTF("val = 0x" RFMT "\n", val);
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DPRINTF("val = 0x" RFMT "\n", val);
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@ -253,7 +255,7 @@ static int emulate_ldd(struct pt_regs *regs, int toreg, int flop)
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" .previous\n"
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" .previous\n"
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: "=r" (val), "=r" (ret)
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: "=r" (val), "=r" (ret)
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: "0" (val), "r" (saddr), "r" (regs->isr)
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: "0" (val), "r" (saddr), "r" (regs->isr)
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: "r19", "r20" );
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: "r19", "r20", FIXUP_BRANCH_CLOBBER );
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#else
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#else
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{
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{
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unsigned long valh=0,vall=0;
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unsigned long valh=0,vall=0;
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@ -287,7 +289,7 @@ static int emulate_ldd(struct pt_regs *regs, int toreg, int flop)
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" .previous\n"
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" .previous\n"
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: "=r" (valh), "=r" (vall), "=r" (ret)
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: "=r" (valh), "=r" (vall), "=r" (ret)
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: "0" (valh), "1" (vall), "r" (saddr), "r" (regs->isr)
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: "0" (valh), "1" (vall), "r" (saddr), "r" (regs->isr)
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: "r19", "r20" );
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: "r19", "r20", FIXUP_BRANCH_CLOBBER );
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val=((__u64)valh<<32)|(__u64)vall;
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val=((__u64)valh<<32)|(__u64)vall;
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}
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}
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#endif
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#endif
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@ -335,7 +337,7 @@ static int emulate_sth(struct pt_regs *regs, int frreg)
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" .previous\n"
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" .previous\n"
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: "=r" (ret)
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: "=r" (ret)
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: "r" (val), "r" (regs->ior), "r" (regs->isr)
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: "r" (val), "r" (regs->ior), "r" (regs->isr)
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: "r19" );
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: "r19", FIXUP_BRANCH_CLOBBER );
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return ret;
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return ret;
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}
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}
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@ -389,7 +391,7 @@ static int emulate_stw(struct pt_regs *regs, int frreg, int flop)
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" .previous\n"
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" .previous\n"
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: "=r" (ret)
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: "=r" (ret)
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: "r" (val), "r" (regs->ior), "r" (regs->isr)
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: "r" (val), "r" (regs->ior), "r" (regs->isr)
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: "r19", "r20", "r21", "r22", "r1" );
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: "r19", "r20", "r21", "r22", "r1", FIXUP_BRANCH_CLOBBER );
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return 0;
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return 0;
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}
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}
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@ -450,7 +452,7 @@ static int emulate_std(struct pt_regs *regs, int frreg, int flop)
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" .previous\n"
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" .previous\n"
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: "=r" (ret)
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: "=r" (ret)
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: "r" (val), "r" (regs->ior), "r" (regs->isr)
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: "r" (val), "r" (regs->ior), "r" (regs->isr)
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: "r19", "r20", "r21", "r22", "r1" );
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: "r19", "r20", "r21", "r22", "r1", FIXUP_BRANCH_CLOBBER );
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#else
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#else
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{
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{
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unsigned long valh=(val>>32),vall=(val&0xffffffffl);
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unsigned long valh=(val>>32),vall=(val&0xffffffffl);
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@ -495,7 +497,7 @@ static int emulate_std(struct pt_regs *regs, int frreg, int flop)
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" .previous\n"
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" .previous\n"
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: "=r" (ret)
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: "=r" (ret)
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: "r" (valh), "r" (vall), "r" (regs->ior), "r" (regs->isr)
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: "r" (valh), "r" (vall), "r" (regs->ior), "r" (regs->isr)
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: "r19", "r20", "r21", "r1" );
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: "r19", "r20", "r21", "r1", FIXUP_BRANCH_CLOBBER );
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}
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}
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#endif
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#endif
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@ -172,7 +172,11 @@ struct exception_data {
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/*
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/*
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* The "__put_user/kernel_asm()" macros tell gcc they read from memory
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* The "__put_user/kernel_asm()" macros tell gcc they read from memory
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* instead of writing. This is because they do not write to any memory
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* instead of writing. This is because they do not write to any memory
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* gcc knows about, so there are no aliasing issues.
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* gcc knows about, so there are no aliasing issues. These macros must
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* also be aware that "fixup_put_user_skip_[12]" are executed in the
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* context of the fault, and any registers used there must be listed
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* as clobbers. In this case only "r1" is used by the current routines.
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* r8/r9 are already listed as err/val.
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*/
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*/
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#ifdef __LP64__
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#ifdef __LP64__
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@ -183,7 +187,8 @@ struct exception_data {
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"\t.dword\t1b,fixup_put_user_skip_1\n" \
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"\t.dword\t1b,fixup_put_user_skip_1\n" \
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"\t.previous" \
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"\t.previous" \
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: "=r"(__pu_err) \
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: "=r"(__pu_err) \
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: "r"(ptr), "r"(x), "0"(__pu_err))
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: "r"(ptr), "r"(x), "0"(__pu_err) \
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: "r1")
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#define __put_user_asm(stx,x,ptr) \
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#define __put_user_asm(stx,x,ptr) \
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__asm__ __volatile__ ( \
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__asm__ __volatile__ ( \
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