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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 05:56:38 +07:00
davinci: edma: use a more intuitive name for edma_info
'edma_info' structure inside the edma driver represents a single instance of edma channel controller. Call it 'edma_cc' instead. This also avoids readers confusing it with an instance of edma_soc_info structre which carries the platform data for a single channel controller instance. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
Sekhar Nori
Kevin Hilman
parent
e2800007f3
commit
3f68b98a75
@ -243,7 +243,7 @@ struct edma {
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} intr_data[EDMA_MAX_DMACH];
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};
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static struct edma *edma_info[EDMA_MAX_CC];
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static struct edma *edma_cc[EDMA_MAX_CC];
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static int arch_num_cc;
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/* dummy param set used to (re)initialize parameter RAM slots */
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@ -261,7 +261,7 @@ static void map_dmach_queue(unsigned ctlr, unsigned ch_no,
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/* default to low priority queue */
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if (queue_no == EVENTQ_DEFAULT)
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queue_no = edma_info[ctlr]->default_queue;
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queue_no = edma_cc[ctlr]->default_queue;
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queue_no &= 7;
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edma_modify_array(ctlr, EDMA_DMAQNUM, (ch_no >> 3),
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@ -315,8 +315,8 @@ setup_dma_interrupt(unsigned lch,
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(1 << (lch & 0x1f)));
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}
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edma_info[ctlr]->intr_data[lch].callback = callback;
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edma_info[ctlr]->intr_data[lch].data = data;
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edma_cc[ctlr]->intr_data[lch].callback = callback;
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edma_cc[ctlr]->intr_data[lch].data = data;
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if (callback) {
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edma_shadow0_write_array(ctlr, SH_ICR, lch >> 5,
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@ -328,11 +328,10 @@ setup_dma_interrupt(unsigned lch,
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static int irq2ctlr(int irq)
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{
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if (irq >= edma_info[0]->irq_res_start &&
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irq <= edma_info[0]->irq_res_end)
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if (irq >= edma_cc[0]->irq_res_start && irq <= edma_cc[0]->irq_res_end)
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return 0;
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else if (irq >= edma_info[1]->irq_res_start &&
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irq <= edma_info[1]->irq_res_end)
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else if (irq >= edma_cc[1]->irq_res_start &&
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irq <= edma_cc[1]->irq_res_end)
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return 1;
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return -1;
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@ -377,10 +376,10 @@ static irqreturn_t dma_irq_handler(int irq, void *data)
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/* Clear the corresponding IPR bits */
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edma_shadow0_write_array(ctlr, SH_ICR, j,
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(1 << i));
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if (edma_info[ctlr]->intr_data[k].callback) {
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edma_info[ctlr]->intr_data[k].callback(
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if (edma_cc[ctlr]->intr_data[k].callback) {
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edma_cc[ctlr]->intr_data[k].callback(
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k, DMA_COMPLETE,
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edma_info[ctlr]->intr_data[k].
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edma_cc[ctlr]->intr_data[k].
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data);
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}
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}
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@ -433,12 +432,12 @@ static irqreturn_t dma_ccerr_handler(int irq, void *data)
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/* Clear any SER */
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edma_shadow0_write_array(ctlr, SH_SECR,
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j, (1 << i));
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if (edma_info[ctlr]->intr_data[k].
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if (edma_cc[ctlr]->intr_data[k].
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callback) {
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edma_info[ctlr]->intr_data[k].
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edma_cc[ctlr]->intr_data[k].
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callback(k,
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DMA_CC_ERROR,
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edma_info[ctlr]->intr_data
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edma_cc[ctlr]->intr_data
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[k].data);
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}
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}
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@ -514,9 +513,9 @@ static int reserve_contiguous_slots(int ctlr, unsigned int id,
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int stop_slot = start_slot;
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DECLARE_BITMAP(tmp_inuse, EDMA_MAX_PARAMENTRY);
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for (i = start_slot; i < edma_info[ctlr]->num_slots; ++i) {
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for (i = start_slot; i < edma_cc[ctlr]->num_slots; ++i) {
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j = EDMA_CHAN_SLOT(i);
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if (!test_and_set_bit(j, edma_info[ctlr]->edma_inuse)) {
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if (!test_and_set_bit(j, edma_cc[ctlr]->edma_inuse)) {
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/* Record our current beginning slot */
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if (count == num_slots)
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stop_slot = i;
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@ -543,12 +542,12 @@ static int reserve_contiguous_slots(int ctlr, unsigned int id,
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* of contiguous parameter RAM slots but do not find the exact number
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* requested as we may reach the total number of parameter RAM slots
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*/
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if (i == edma_info[ctlr]->num_slots)
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if (i == edma_cc[ctlr]->num_slots)
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stop_slot = i;
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for (j = start_slot; j < stop_slot; j++)
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if (test_bit(j, tmp_inuse))
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clear_bit(j, edma_info[ctlr]->edma_inuse);
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clear_bit(j, edma_cc[ctlr]->edma_inuse);
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if (count)
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return -EBUSY;
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@ -570,7 +569,7 @@ static int prepare_unused_channel_list(struct device *dev, void *data)
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(int)pdev->resource[i].start >= 0) {
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ctlr = EDMA_CTLR(pdev->resource[i].start);
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clear_bit(EDMA_CHAN_SLOT(pdev->resource[i].start),
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edma_info[ctlr]->edma_unused);
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edma_cc[ctlr]->edma_unused);
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}
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}
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@ -644,14 +643,13 @@ int edma_alloc_channel(int channel,
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for (i = 0; i < arch_num_cc; i++) {
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channel = 0;
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for (;;) {
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channel = find_next_bit(edma_info[i]->
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edma_unused,
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edma_info[i]->num_channels,
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channel = find_next_bit(edma_cc[i]->edma_unused,
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edma_cc[i]->num_channels,
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channel);
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if (channel == edma_info[i]->num_channels)
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if (channel == edma_cc[i]->num_channels)
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break;
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if (!test_and_set_bit(channel,
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edma_info[i]->edma_inuse)) {
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edma_cc[i]->edma_inuse)) {
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done = 1;
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ctlr = i;
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break;
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@ -663,9 +661,9 @@ int edma_alloc_channel(int channel,
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}
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if (!done)
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return -ENOMEM;
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} else if (channel >= edma_info[ctlr]->num_channels) {
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} else if (channel >= edma_cc[ctlr]->num_channels) {
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return -EINVAL;
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} else if (test_and_set_bit(channel, edma_info[ctlr]->edma_inuse)) {
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} else if (test_and_set_bit(channel, edma_cc[ctlr]->edma_inuse)) {
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return -EBUSY;
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}
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@ -706,7 +704,7 @@ void edma_free_channel(unsigned channel)
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ctlr = EDMA_CTLR(channel);
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channel = EDMA_CHAN_SLOT(channel);
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if (channel >= edma_info[ctlr]->num_channels)
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if (channel >= edma_cc[ctlr]->num_channels)
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return;
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setup_dma_interrupt(channel, NULL, NULL);
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@ -714,7 +712,7 @@ void edma_free_channel(unsigned channel)
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memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(channel),
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&dummy_paramset, PARM_SIZE);
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clear_bit(channel, edma_info[ctlr]->edma_inuse);
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clear_bit(channel, edma_cc[ctlr]->edma_inuse);
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}
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EXPORT_SYMBOL(edma_free_channel);
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@ -738,20 +736,19 @@ int edma_alloc_slot(unsigned ctlr, int slot)
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slot = EDMA_CHAN_SLOT(slot);
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if (slot < 0) {
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slot = edma_info[ctlr]->num_channels;
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slot = edma_cc[ctlr]->num_channels;
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for (;;) {
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slot = find_next_zero_bit(edma_info[ctlr]->edma_inuse,
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edma_info[ctlr]->num_slots, slot);
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if (slot == edma_info[ctlr]->num_slots)
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slot = find_next_zero_bit(edma_cc[ctlr]->edma_inuse,
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edma_cc[ctlr]->num_slots, slot);
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if (slot == edma_cc[ctlr]->num_slots)
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return -ENOMEM;
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if (!test_and_set_bit(slot,
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edma_info[ctlr]->edma_inuse))
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if (!test_and_set_bit(slot, edma_cc[ctlr]->edma_inuse))
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break;
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}
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} else if (slot < edma_info[ctlr]->num_channels ||
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slot >= edma_info[ctlr]->num_slots) {
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} else if (slot < edma_cc[ctlr]->num_channels ||
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slot >= edma_cc[ctlr]->num_slots) {
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return -EINVAL;
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} else if (test_and_set_bit(slot, edma_info[ctlr]->edma_inuse)) {
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} else if (test_and_set_bit(slot, edma_cc[ctlr]->edma_inuse)) {
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return -EBUSY;
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}
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@ -777,13 +774,13 @@ void edma_free_slot(unsigned slot)
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ctlr = EDMA_CTLR(slot);
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slot = EDMA_CHAN_SLOT(slot);
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if (slot < edma_info[ctlr]->num_channels ||
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slot >= edma_info[ctlr]->num_slots)
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if (slot < edma_cc[ctlr]->num_channels ||
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slot >= edma_cc[ctlr]->num_slots)
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return;
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memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(slot),
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&dummy_paramset, PARM_SIZE);
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clear_bit(slot, edma_info[ctlr]->edma_inuse);
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clear_bit(slot, edma_cc[ctlr]->edma_inuse);
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}
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EXPORT_SYMBOL(edma_free_slot);
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@ -821,8 +818,8 @@ int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count)
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* of slots
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*/
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if ((id != EDMA_CONT_PARAMS_ANY) &&
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(slot < edma_info[ctlr]->num_channels ||
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slot >= edma_info[ctlr]->num_slots))
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(slot < edma_cc[ctlr]->num_channels ||
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slot >= edma_cc[ctlr]->num_slots))
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return -EINVAL;
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/*
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@ -831,13 +828,13 @@ int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count)
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* channels
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*/
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if (count < 1 || count >
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(edma_info[ctlr]->num_slots - edma_info[ctlr]->num_channels))
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(edma_cc[ctlr]->num_slots - edma_cc[ctlr]->num_channels))
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return -EINVAL;
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switch (id) {
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case EDMA_CONT_PARAMS_ANY:
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return reserve_contiguous_slots(ctlr, id, count,
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edma_info[ctlr]->num_channels);
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edma_cc[ctlr]->num_channels);
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case EDMA_CONT_PARAMS_FIXED_EXACT:
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case EDMA_CONT_PARAMS_FIXED_NOT_EXACT:
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return reserve_contiguous_slots(ctlr, id, count, slot);
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@ -869,8 +866,8 @@ int edma_free_cont_slots(unsigned slot, int count)
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ctlr = EDMA_CTLR(slot);
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slot = EDMA_CHAN_SLOT(slot);
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if (slot < edma_info[ctlr]->num_channels ||
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slot >= edma_info[ctlr]->num_slots ||
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if (slot < edma_cc[ctlr]->num_channels ||
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slot >= edma_cc[ctlr]->num_slots ||
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count < 1)
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return -EINVAL;
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@ -880,7 +877,7 @@ int edma_free_cont_slots(unsigned slot, int count)
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memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(slot_to_free),
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&dummy_paramset, PARM_SIZE);
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clear_bit(slot_to_free, edma_info[ctlr]->edma_inuse);
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clear_bit(slot_to_free, edma_cc[ctlr]->edma_inuse);
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}
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return 0;
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@ -910,7 +907,7 @@ void edma_set_src(unsigned slot, dma_addr_t src_port,
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ctlr = EDMA_CTLR(slot);
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slot = EDMA_CHAN_SLOT(slot);
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if (slot < edma_info[ctlr]->num_slots) {
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if (slot < edma_cc[ctlr]->num_slots) {
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unsigned int i = edma_parm_read(ctlr, PARM_OPT, slot);
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if (mode) {
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@ -948,7 +945,7 @@ void edma_set_dest(unsigned slot, dma_addr_t dest_port,
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ctlr = EDMA_CTLR(slot);
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slot = EDMA_CHAN_SLOT(slot);
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if (slot < edma_info[ctlr]->num_slots) {
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if (slot < edma_cc[ctlr]->num_slots) {
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unsigned int i = edma_parm_read(ctlr, PARM_OPT, slot);
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if (mode) {
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@ -1008,7 +1005,7 @@ void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx)
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ctlr = EDMA_CTLR(slot);
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slot = EDMA_CHAN_SLOT(slot);
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if (slot < edma_info[ctlr]->num_slots) {
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if (slot < edma_cc[ctlr]->num_slots) {
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edma_parm_modify(ctlr, PARM_SRC_DST_BIDX, slot,
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0xffff0000, src_bidx);
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edma_parm_modify(ctlr, PARM_SRC_DST_CIDX, slot,
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@ -1034,7 +1031,7 @@ void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx)
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ctlr = EDMA_CTLR(slot);
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slot = EDMA_CHAN_SLOT(slot);
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if (slot < edma_info[ctlr]->num_slots) {
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if (slot < edma_cc[ctlr]->num_slots) {
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edma_parm_modify(ctlr, PARM_SRC_DST_BIDX, slot,
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0x0000ffff, dest_bidx << 16);
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edma_parm_modify(ctlr, PARM_SRC_DST_CIDX, slot,
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@ -1081,7 +1078,7 @@ void edma_set_transfer_params(unsigned slot,
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ctlr = EDMA_CTLR(slot);
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slot = EDMA_CHAN_SLOT(slot);
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if (slot < edma_info[ctlr]->num_slots) {
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if (slot < edma_cc[ctlr]->num_slots) {
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edma_parm_modify(ctlr, PARM_LINK_BCNTRLD, slot,
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0x0000ffff, bcnt_rld << 16);
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if (sync_mode == ASYNC)
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@ -1111,9 +1108,9 @@ void edma_link(unsigned from, unsigned to)
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ctlr_to = EDMA_CTLR(to);
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to = EDMA_CHAN_SLOT(to);
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if (from >= edma_info[ctlr_from]->num_slots)
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if (from >= edma_cc[ctlr_from]->num_slots)
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return;
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if (to >= edma_info[ctlr_to]->num_slots)
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if (to >= edma_cc[ctlr_to]->num_slots)
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return;
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edma_parm_modify(ctlr_from, PARM_LINK_BCNTRLD, from, 0xffff0000,
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PARM_OFFSET(to));
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@ -1134,7 +1131,7 @@ void edma_unlink(unsigned from)
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ctlr = EDMA_CTLR(from);
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from = EDMA_CHAN_SLOT(from);
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if (from >= edma_info[ctlr]->num_slots)
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if (from >= edma_cc[ctlr]->num_slots)
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return;
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edma_parm_or(ctlr, PARM_LINK_BCNTRLD, from, 0xffff);
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}
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@ -1161,7 +1158,7 @@ void edma_write_slot(unsigned slot, const struct edmacc_param *param)
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ctlr = EDMA_CTLR(slot);
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slot = EDMA_CHAN_SLOT(slot);
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if (slot >= edma_info[ctlr]->num_slots)
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if (slot >= edma_cc[ctlr]->num_slots)
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return;
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memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(slot), param,
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PARM_SIZE);
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@ -1183,7 +1180,7 @@ void edma_read_slot(unsigned slot, struct edmacc_param *param)
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ctlr = EDMA_CTLR(slot);
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slot = EDMA_CHAN_SLOT(slot);
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if (slot >= edma_info[ctlr]->num_slots)
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if (slot >= edma_cc[ctlr]->num_slots)
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return;
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memcpy_fromio(param, edmacc_regs_base[ctlr] + PARM_OFFSET(slot),
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PARM_SIZE);
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@ -1208,7 +1205,7 @@ void edma_pause(unsigned channel)
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ctlr = EDMA_CTLR(channel);
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channel = EDMA_CHAN_SLOT(channel);
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if (channel < edma_info[ctlr]->num_channels) {
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if (channel < edma_cc[ctlr]->num_channels) {
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unsigned int mask = (1 << (channel & 0x1f));
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edma_shadow0_write_array(ctlr, SH_EECR, channel >> 5, mask);
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@ -1229,7 +1226,7 @@ void edma_resume(unsigned channel)
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ctlr = EDMA_CTLR(channel);
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channel = EDMA_CHAN_SLOT(channel);
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if (channel < edma_info[ctlr]->num_channels) {
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if (channel < edma_cc[ctlr]->num_channels) {
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unsigned int mask = (1 << (channel & 0x1f));
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edma_shadow0_write_array(ctlr, SH_EESR, channel >> 5, mask);
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@ -1255,12 +1252,12 @@ int edma_start(unsigned channel)
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ctlr = EDMA_CTLR(channel);
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channel = EDMA_CHAN_SLOT(channel);
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if (channel < edma_info[ctlr]->num_channels) {
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if (channel < edma_cc[ctlr]->num_channels) {
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int j = channel >> 5;
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unsigned int mask = (1 << (channel & 0x1f));
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/* EDMA channels without event association */
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if (test_bit(channel, edma_info[ctlr]->edma_unused)) {
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if (test_bit(channel, edma_cc[ctlr]->edma_unused)) {
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pr_debug("EDMA: ESR%d %08x\n", j,
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edma_shadow0_read_array(ctlr, SH_ESR, j));
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edma_shadow0_write_array(ctlr, SH_ESR, j, mask);
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@ -1301,7 +1298,7 @@ void edma_stop(unsigned channel)
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ctlr = EDMA_CTLR(channel);
|
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channel = EDMA_CHAN_SLOT(channel);
|
||||
|
||||
if (channel < edma_info[ctlr]->num_channels) {
|
||||
if (channel < edma_cc[ctlr]->num_channels) {
|
||||
int j = channel >> 5;
|
||||
unsigned int mask = (1 << (channel & 0x1f));
|
||||
|
||||
@ -1340,7 +1337,7 @@ void edma_clean_channel(unsigned channel)
|
||||
ctlr = EDMA_CTLR(channel);
|
||||
channel = EDMA_CHAN_SLOT(channel);
|
||||
|
||||
if (channel < edma_info[ctlr]->num_channels) {
|
||||
if (channel < edma_cc[ctlr]->num_channels) {
|
||||
int j = (channel >> 5);
|
||||
unsigned int mask = 1 << (channel & 0x1f);
|
||||
|
||||
@ -1368,7 +1365,7 @@ void edma_clear_event(unsigned channel)
|
||||
ctlr = EDMA_CTLR(channel);
|
||||
channel = EDMA_CHAN_SLOT(channel);
|
||||
|
||||
if (channel >= edma_info[ctlr]->num_channels)
|
||||
if (channel >= edma_cc[ctlr]->num_channels)
|
||||
return;
|
||||
if (channel < 32)
|
||||
edma_write(ctlr, EDMA_ECR, 1 << channel);
|
||||
@ -1423,38 +1420,37 @@ static int __init edma_probe(struct platform_device *pdev)
|
||||
goto fail1;
|
||||
}
|
||||
|
||||
edma_info[j] = kmalloc(sizeof(struct edma), GFP_KERNEL);
|
||||
if (!edma_info[j]) {
|
||||
edma_cc[j] = kmalloc(sizeof(struct edma), GFP_KERNEL);
|
||||
if (!edma_cc[j]) {
|
||||
status = -ENOMEM;
|
||||
goto fail1;
|
||||
}
|
||||
memset(edma_info[j], 0, sizeof(struct edma));
|
||||
memset(edma_cc[j], 0, sizeof(struct edma));
|
||||
|
||||
edma_info[j]->num_channels = min_t(unsigned, info[j].n_channel,
|
||||
edma_cc[j]->num_channels = min_t(unsigned, info[j].n_channel,
|
||||
EDMA_MAX_DMACH);
|
||||
edma_info[j]->num_slots = min_t(unsigned, info[j].n_slot,
|
||||
edma_cc[j]->num_slots = min_t(unsigned, info[j].n_slot,
|
||||
EDMA_MAX_PARAMENTRY);
|
||||
edma_info[j]->num_cc = min_t(unsigned, info[j].n_cc,
|
||||
EDMA_MAX_CC);
|
||||
edma_cc[j]->num_cc = min_t(unsigned, info[j].n_cc, EDMA_MAX_CC);
|
||||
|
||||
edma_info[j]->default_queue = info[j].default_queue;
|
||||
if (!edma_info[j]->default_queue)
|
||||
edma_info[j]->default_queue = EVENTQ_1;
|
||||
edma_cc[j]->default_queue = info[j].default_queue;
|
||||
if (!edma_cc[j]->default_queue)
|
||||
edma_cc[j]->default_queue = EVENTQ_1;
|
||||
|
||||
dev_dbg(&pdev->dev, "DMA REG BASE ADDR=%p\n",
|
||||
edmacc_regs_base[j]);
|
||||
|
||||
for (i = 0; i < edma_info[j]->num_slots; i++)
|
||||
for (i = 0; i < edma_cc[j]->num_slots; i++)
|
||||
memcpy_toio(edmacc_regs_base[j] + PARM_OFFSET(i),
|
||||
&dummy_paramset, PARM_SIZE);
|
||||
|
||||
/* Mark all channels as unused */
|
||||
memset(edma_info[j]->edma_unused, 0xff,
|
||||
sizeof(edma_info[j]->edma_unused));
|
||||
memset(edma_cc[j]->edma_unused, 0xff,
|
||||
sizeof(edma_cc[j]->edma_unused));
|
||||
|
||||
sprintf(irq_name, "edma%d", j);
|
||||
irq[j] = platform_get_irq_byname(pdev, irq_name);
|
||||
edma_info[j]->irq_res_start = irq[j];
|
||||
edma_cc[j]->irq_res_start = irq[j];
|
||||
status = request_irq(irq[j], dma_irq_handler, 0, "edma",
|
||||
&pdev->dev);
|
||||
if (status < 0) {
|
||||
@ -1465,7 +1461,7 @@ static int __init edma_probe(struct platform_device *pdev)
|
||||
|
||||
sprintf(irq_name, "edma%d_err", j);
|
||||
err_irq[j] = platform_get_irq_byname(pdev, irq_name);
|
||||
edma_info[j]->irq_res_end = err_irq[j];
|
||||
edma_cc[j]->irq_res_end = err_irq[j];
|
||||
status = request_irq(err_irq[j], dma_ccerr_handler, 0,
|
||||
"edma_error", &pdev->dev);
|
||||
if (status < 0) {
|
||||
@ -1478,7 +1474,7 @@ static int __init edma_probe(struct platform_device *pdev)
|
||||
* specified. This way, long transfers on the low priority queue
|
||||
* started by the codec engine will not cause audio defects.
|
||||
*/
|
||||
for (i = 0; i < edma_info[j]->num_channels; i++)
|
||||
for (i = 0; i < edma_cc[j]->num_channels; i++)
|
||||
map_dmach_queue(j, i, EVENTQ_1);
|
||||
|
||||
queue_tc_mapping = info[j].queue_tc_mapping;
|
||||
@ -1541,7 +1537,7 @@ static int __init edma_probe(struct platform_device *pdev)
|
||||
release_mem_region(r[i]->start, len[i]);
|
||||
if (edmacc_regs_base[i])
|
||||
iounmap(edmacc_regs_base[i]);
|
||||
kfree(edma_info[i]);
|
||||
kfree(edma_cc[i]);
|
||||
}
|
||||
return status;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user