clk: sunxi: Propagate rate changes to parent for mux clocks

The cpu clock on sunxi machines is just a mux clock, which is normally
fed by the main PLL, but can be muxed to the main or low power oscillator.

Make the mux clock propagate rate changes to its parent, so we can
change the clock rate of the PLL, and thus actually implement rate
changing on the cpu clock.

This patch also removes the no reparenting limit.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit is contained in:
Chen-Yu Tsai 2015-01-06 10:35:12 +08:00 committed by Maxime Ripard
parent 6ea3953da4
commit 3ec72fabcc

View File

@ -778,7 +778,7 @@ static void __init sunxi_mux_clk_setup(struct device_node *node,
of_property_read_string(node, "clock-output-names", &clk_name);
clk = clk_register_mux(NULL, clk_name, parents, i,
CLK_SET_RATE_NO_REPARENT, reg,
CLK_SET_RATE_PARENT, reg,
data->shift, SUNXI_MUX_GATE_WIDTH,
0, &clk_lock);