mvebu DT changes for v3.18

- Armada 375
     - Add RTC support
 
  - Armada 370
     - Add proper pinmuxing
     - Add SSCG
     - Add gpio-fan
     - Add LED support
 
  - change Intersil vendor prefix to isil
  - use improved Armada SPI compatible string
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJUFVaZAAoJEP45WPkGe8ZnuSEP/2zVmLwPblxQZxrGU71wup7L
 Ob7OSiNIoQI+n1dewGluBbPG+2mfdDTZ39OVzvHT4y/H1p4fyx1tN+ITlr5XDrmO
 cOcKgQzA1qLCVYtDb2PXuR99R1C7rx9yqE3Df4Tm1yKgmymSr3duIh1HU/FgyK4U
 KK+L/ZmvwUjEneiZ5Mjo1vQcBUFx2MN0EZKE9qnTnnVkT2MbA8UdwsBjsIsuXCpm
 7+YU7eiltfkJym19rjviw+WYIZySvHpq3Ydg2rn8znFGMpL7ZdGAXYhGwXytQlM0
 R6lYcfyeMKf+k75q6nDrH+Q8BCSsxxWjPpj0mfaiS1rVE7S8tuXW4geGC+DQIc8z
 PNPmIKFuEX2HR8jbtyMv3VJhyPvtdXG3WJdWFUFA6w+czJrd4rh+pc7QOV71hAuO
 T8FX8CU/cDSK9GyJH3Hbb7gU5wiwUyBS1ffsasAKWpAghVCnCShO1y2LefAtEYfH
 JTCcycJLTq0gMxClnaQQtp5tDtecTKI7gSEYw2NXmR61Yfqz9HrG5g82ONCY3KcP
 xs5q2PudK8sWsJBqTp+VGSf23+nACfZLMN/tCBPtCHLbT9/ktIxXtKa209zLkLaU
 xokh3Rx4+NBSKyXwn0uD/ohNZbOjf33NT27Yimv4FrqLNrW+89q/O9lKtzW/QMIx
 UC61fpH/F+8XNIlxAJvd
 =rLx3
 -----END PGP SIGNATURE-----

Merge tag 'mvebu-dt-3.18' of git://git.infradead.org/linux-mvebu into next/dt

Merge "ARM: mvebu: DT changes for v3.18" from Jason Cooper:

mvebu DT changes for v3.18

 - Armada 375
    - Add RTC support

 - Armada 370
    - Add proper pinmuxing
    - Add SSCG
    - Add gpio-fan
    - Add LED support

 - change Intersil vendor prefix to isil
 - use improved Armada SPI compatible string

* tag 'mvebu-dt-3.18' of git://git.infradead.org/linux-mvebu:
  ARM: mvebu: add user LED support of Armada 370 RD
  ARM: mvebu: add gpio fan support to Armada 370 RD
  ARM: mvebu: Change vendor prefix for Intersil Corporation to isil
  ARM: mvebu: use improved armada spi device tree compatible name
  ARM: mvebu: add SSCG to Armada 370 Device Tree
  ARM: mvebu: Add proper pin muxing on Armada 370 RD board
  ARM: mvebu: Add proper pin muxing on Netgear ReadyNAS 104
  ARM: mvebu: Add proper pin muxing on Netgear ReadyNAS 102
  ARM: mvebu: Add proper pin muxing on the Armada 370 DB board
  ARM: mvebu: Add proper pin muxing on Globalscale Mirabox board
  ARM: mvebu: Add network pin mux configuration for the Armada 370 SoC
  ARM: mvebu: Add RTC support for Armada 375

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2014-09-24 10:38:57 -07:00
commit 3e32adc819
9 changed files with 92 additions and 5 deletions

View File

@ -43,6 +43,8 @@ sata@a0000 {
};
mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
};
@ -53,11 +55,15 @@ phy1: ethernet-phy@1 {
};
ethernet@70000 {
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
ethernet@74000 {
pinctrl-0 = <&ge1_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";

View File

@ -91,6 +91,8 @@ green_stat_led {
};
mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
};
@ -100,11 +102,15 @@ phy1: ethernet-phy@1 {
};
};
ethernet@70000 {
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
ethernet@74000 {
pinctrl-0 = <&ge1_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";

View File

@ -101,12 +101,16 @@ poweroff: poweroff {
};
mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
reg = <0>;
};
};
ethernet@74000 {
pinctrl-0 = <&ge1_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
@ -122,7 +126,7 @@ i2c@11000 {
status = "okay";
isl12057: isl12057@68 {
compatible = "isl,isl12057";
compatible = "isil,isl12057";
reg = <0x68>;
};

View File

@ -86,6 +86,8 @@ reset_button_pin: reset-button-pin {
};
mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
reg = <0>;
};
@ -96,12 +98,16 @@ phy1: ethernet-phy@1 { /* Marvell 88E1318 */
};
ethernet@70000 {
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
ethernet@74000 {
pinctrl-0 = <&ge1_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
@ -117,7 +123,7 @@ i2c@11000 {
status = "okay";
isl12057: isl12057@68 {
compatible = "isl,isl12057";
compatible = "isil,isl12057";
reg = <0x68>;
};

View File

@ -50,6 +50,18 @@ pcie@2,0 {
};
internal-regs {
pinctrl {
fan_pins: fan-pins {
marvell,pins = "mpp8";
marvell,function = "gpio";
};
led_pins: led-pins {
marvell,pins = "mpp32";
marvell,function = "gpio";
};
};
serial@12000 {
status = "okay";
};
@ -59,6 +71,8 @@ sata@a0000 {
};
mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
};
@ -74,6 +88,8 @@ ethernet@70000 {
phy-mode = "sgmii";
};
ethernet@74000 {
pinctrl-0 = <&ge1_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
@ -106,6 +122,26 @@ button@1 {
};
};
gpio-fan {
compatible = "gpio-fan";
gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
gpio-fan,speed-map = <0 0 3000 1>;
pinctrl-0 = <&fan_pins>;
pinctrl-names = "default";
};
gpio_leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&led_pins>;
sw_led {
label = "370rd:green:sw";
gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
default-state = "keep";
};
};
nand@d0000 {
status = "okay";
num-cs = <1>;

View File

@ -110,7 +110,7 @@ rtc@10300 {
};
spi0: spi@10600 {
compatible = "marvell,orion-spi";
compatible = "marvell,armada-370-spi", "marvell,orion-spi";
reg = <0x10600 0x28>;
#address-cells = <1>;
#size-cells = <0>;
@ -121,7 +121,7 @@ spi0: spi@10600 {
};
spi1: spi@10680 {
compatible = "marvell,orion-spi";
compatible = "marvell,armada-370-spi", "marvell,orion-spi";
reg = <0x10680 0x28>;
#address-cells = <1>;
#size-cells = <0>;

View File

@ -151,6 +151,25 @@ i2s_pins2: i2s-pins2 {
"mpp62", "mpp60", "mpp58";
marvell,function = "audio";
};
mdio_pins: mdio-pins {
marvell,pins = "mpp17", "mpp18";
marvell,function = "ge";
};
ge0_rgmii_pins: ge0-rgmii-pins {
marvell,pins = "mpp5", "mpp6", "mpp7", "mpp8",
"mpp9", "mpp10", "mpp11", "mpp12",
"mpp13", "mpp14", "mpp15", "mpp16";
marvell,function = "ge0";
};
ge1_rgmii_pins: ge1-rgmii-pins {
marvell,pins = "mpp19", "mpp20", "mpp21", "mpp22",
"mpp23", "mpp24", "mpp25", "mpp26",
"mpp27", "mpp28", "mpp29", "mpp30";
marvell,function = "ge1";
};
};
gpio0: gpio@18100 {
@ -206,6 +225,10 @@ thermal@18300 {
status = "okay";
};
sscg@18330 {
reg = <0x18330 0x4>;
};
interrupt-controller@20000 {
reg = <0x20a00 0x1d0>, <0x21870 0x58>;
};

View File

@ -185,6 +185,12 @@ eth1: eth1@c5000 {
};
};
rtc@10300 {
compatible = "marvell,orion-rtc";
reg = <0x10300 0x20>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
};
spi0: spi@10600 {
compatible = "marvell,orion-spi";
reg = <0x10600 0x50>;

View File

@ -174,7 +174,7 @@ i2c@11000 {
status = "okay";
isl12057: isl12057@68 {
compatible = "isl,isl12057";
compatible = "isil,isl12057";
reg = <0x68>;
};