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mtd: nand: force NAND_CMD_READID onto 8-bit bus
The NAND command helpers tend to automatically shift the column address for x16 bus devices, since most commands expect a word address, not a byte address. The Read ID command, however, expects an 8-bit address (i.e., 0x00, 0x20, or 0x40 should not be translated to 0x00, 0x10, or 0x20). This fixes the column address for a few drivers which imitate the nand_base defaults. Note that I don't touch sh_flctl.c, since it already handles this problem slightly differently (note its comment "READID is always performed using an 8-bit bus"). I have not tested this patch, as I only have x8 parts up for testing at this point. Hopefully that can change soon... Signed-off-by: Brian Norris <computersforpeace@gmail.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-By: Pekon Gupta <pekon@ti.com>
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@ -1659,8 +1659,8 @@ static void nfc_select_chip(struct mtd_info *mtd, int chip)
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nfc_writel(host->nfc->hsmc_regs, CTRL, NFC_CTRL_ENABLE);
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nfc_writel(host->nfc->hsmc_regs, CTRL, NFC_CTRL_ENABLE);
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}
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}
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static int nfc_make_addr(struct mtd_info *mtd, int column, int page_addr,
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static int nfc_make_addr(struct mtd_info *mtd, int command, int column,
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unsigned int *addr1234, unsigned int *cycle0)
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int page_addr, unsigned int *addr1234, unsigned int *cycle0)
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{
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{
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struct nand_chip *chip = mtd->priv;
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struct nand_chip *chip = mtd->priv;
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@ -1674,7 +1674,8 @@ static int nfc_make_addr(struct mtd_info *mtd, int column, int page_addr,
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*addr1234 = 0;
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*addr1234 = 0;
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if (column != -1) {
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if (column != -1) {
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if (chip->options & NAND_BUSWIDTH_16)
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if (chip->options & NAND_BUSWIDTH_16 &&
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!nand_opcode_8bits(command))
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column >>= 1;
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column >>= 1;
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addr_bytes[acycle++] = column & 0xff;
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addr_bytes[acycle++] = column & 0xff;
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if (mtd->writesize > 512)
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if (mtd->writesize > 512)
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@ -1787,8 +1788,8 @@ static void nfc_nand_command(struct mtd_info *mtd, unsigned int command,
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}
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}
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if (do_addr)
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if (do_addr)
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acycle = nfc_make_addr(mtd, column, page_addr, &addr1234,
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acycle = nfc_make_addr(mtd, command, column, page_addr,
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&cycle0);
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&addr1234, &cycle0);
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nfc_addr_cmd = cmd1 | cmd2 | vcmd2 | acycle | csid | dataen | nfcwr;
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nfc_addr_cmd = cmd1 | cmd2 | vcmd2 | acycle | csid | dataen | nfcwr;
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nfc_send_command(host, nfc_addr_cmd, addr1234, cycle0);
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nfc_send_command(host, nfc_addr_cmd, addr1234, cycle0);
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@ -307,7 +307,8 @@ static void au1550_command(struct mtd_info *mtd, unsigned command, int column, i
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/* Serially input address */
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/* Serially input address */
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if (column != -1) {
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if (column != -1) {
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/* Adjust columns for 16 bit buswidth */
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/* Adjust columns for 16 bit buswidth */
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if (this->options & NAND_BUSWIDTH_16)
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if (this->options & NAND_BUSWIDTH_16 &&
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!nand_opcode_8bits(command))
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column >>= 1;
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column >>= 1;
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ctx->write_byte(mtd, column);
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ctx->write_byte(mtd, column);
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}
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}
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@ -698,7 +698,8 @@ static void doc2001plus_command(struct mtd_info *mtd, unsigned command, int colu
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/* Serially input address */
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/* Serially input address */
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if (column != -1) {
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if (column != -1) {
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/* Adjust columns for 16 bit buswidth */
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/* Adjust columns for 16 bit buswidth */
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if (this->options & NAND_BUSWIDTH_16)
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if (this->options & NAND_BUSWIDTH_16 &&
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!nand_opcode_8bits(command))
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column >>= 1;
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column >>= 1;
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WriteDOC(column, docptr, Mplus_FlashAddress);
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WriteDOC(column, docptr, Mplus_FlashAddress);
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}
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}
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@ -589,7 +589,8 @@ static void nand_command(struct mtd_info *mtd, unsigned int command,
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/* Serially input address */
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/* Serially input address */
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if (column != -1) {
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if (column != -1) {
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/* Adjust columns for 16 bit buswidth */
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/* Adjust columns for 16 bit buswidth */
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if (chip->options & NAND_BUSWIDTH_16)
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if (chip->options & NAND_BUSWIDTH_16 &&
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!nand_opcode_8bits(command))
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column >>= 1;
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column >>= 1;
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chip->cmd_ctrl(mtd, column, ctrl);
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chip->cmd_ctrl(mtd, column, ctrl);
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ctrl &= ~NAND_CTRL_CHANGE;
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ctrl &= ~NAND_CTRL_CHANGE;
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@ -680,7 +681,8 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
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/* Serially input address */
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/* Serially input address */
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if (column != -1) {
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if (column != -1) {
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/* Adjust columns for 16 bit buswidth */
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/* Adjust columns for 16 bit buswidth */
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if (chip->options & NAND_BUSWIDTH_16)
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if (chip->options & NAND_BUSWIDTH_16 &&
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!nand_opcode_8bits(command))
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column >>= 1;
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column >>= 1;
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chip->cmd_ctrl(mtd, column, ctrl);
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chip->cmd_ctrl(mtd, column, ctrl);
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ctrl &= ~NAND_CTRL_CHANGE;
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ctrl &= ~NAND_CTRL_CHANGE;
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@ -151,7 +151,8 @@ static void nuc900_nand_command_lp(struct mtd_info *mtd, unsigned int command,
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if (column != -1 || page_addr != -1) {
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if (column != -1 || page_addr != -1) {
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if (column != -1) {
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if (column != -1) {
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if (chip->options & NAND_BUSWIDTH_16)
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if (chip->options & NAND_BUSWIDTH_16 &&
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!nand_opcode_8bits(command))
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column >>= 1;
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column >>= 1;
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write_addr_reg(nand, column);
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write_addr_reg(nand, column);
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write_addr_reg(nand, column >> 8 | ENDADDR);
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write_addr_reg(nand, column >> 8 | ENDADDR);
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@ -832,4 +832,14 @@ static inline bool nand_is_slc(struct nand_chip *chip)
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{
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{
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return chip->bits_per_cell == 1;
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return chip->bits_per_cell == 1;
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}
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}
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/**
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* Check if the opcode's address should be sent only on the lower 8 bits
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* @command: opcode to check
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*/
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static inline int nand_opcode_8bits(unsigned int command)
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{
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return command == NAND_CMD_READID;
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}
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#endif /* __LINUX_MTD_NAND_H */
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#endif /* __LINUX_MTD_NAND_H */
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