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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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net: hns3: dump some debug information when reset fail
When reset fails, there is some information that will help for finding out why does reset fail. and removes an unused core_rst_cnt field in struct hclge_rst_stats. Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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7969774430
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@ -929,7 +929,7 @@ static void hclge_dbg_fd_tcam(struct hclge_dev *hdev)
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}
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}
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static void hclge_dbg_dump_rst_info(struct hclge_dev *hdev)
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void hclge_dbg_dump_rst_info(struct hclge_dev *hdev)
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{
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dev_info(&hdev->pdev->dev, "PF reset count: %u\n",
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hdev->rst_stats.pf_rst_cnt);
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@ -945,8 +945,6 @@ static void hclge_dbg_dump_rst_info(struct hclge_dev *hdev)
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hdev->rst_stats.hw_reset_done_cnt);
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dev_info(&hdev->pdev->dev, "reset count: %u\n",
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hdev->rst_stats.reset_cnt);
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dev_info(&hdev->pdev->dev, "reset count: %u\n",
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hdev->rst_stats.reset_cnt);
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dev_info(&hdev->pdev->dev, "reset fail count: %u\n",
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hdev->rst_stats.reset_fail_cnt);
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dev_info(&hdev->pdev->dev, "vector0 interrupt enable status: 0x%x\n",
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@ -961,6 +959,7 @@ static void hclge_dbg_dump_rst_info(struct hclge_dev *hdev)
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hclge_read_dev(&hdev->hw, HCLGE_NIC_CSQ_DEPTH_REG));
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dev_info(&hdev->pdev->dev, "function reset status: 0x%x\n",
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hclge_read_dev(&hdev->hw, HCLGE_FUN_RST_ING));
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dev_info(&hdev->pdev->dev, "hdev state: 0x%lx\n", hdev->state);
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}
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static void hclge_dbg_get_m7_stats_info(struct hclge_dev *hdev)
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@ -3669,6 +3669,9 @@ static bool hclge_reset_err_handle(struct hclge_dev *hdev)
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hclge_reset_handshake(hdev, true);
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dev_err(&hdev->pdev->dev, "Reset fail!\n");
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hclge_dbg_dump_rst_info(hdev);
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return false;
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}
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@ -656,7 +656,6 @@ struct hclge_rst_stats {
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u32 hw_reset_done_cnt; /* the number of HW reset has completed */
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u32 pf_rst_cnt; /* the number of PF reset */
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u32 flr_rst_cnt; /* the number of FLR */
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u32 core_rst_cnt; /* the number of CORE reset */
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u32 global_rst_cnt; /* the number of GLOBAL */
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u32 imp_rst_cnt; /* the number of IMP reset */
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u32 reset_cnt; /* the number of reset */
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@ -1005,4 +1004,5 @@ int hclge_query_bd_num_cmd_send(struct hclge_dev *hdev,
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void hclge_report_hw_error(struct hclge_dev *hdev,
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enum hnae3_hw_error_type type);
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void hclge_inform_vf_promisc_info(struct hclge_vport *vport);
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void hclge_dbg_dump_rst_info(struct hclge_dev *hdev);
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#endif
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@ -1549,6 +1549,33 @@ static int hclgevf_reset_prepare_wait(struct hclgevf_dev *hdev)
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return ret;
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}
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static void hclgevf_dump_rst_info(struct hclgevf_dev *hdev)
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{
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dev_info(&hdev->pdev->dev, "VF function reset count: %u\n",
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hdev->rst_stats.vf_func_rst_cnt);
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dev_info(&hdev->pdev->dev, "FLR reset count: %u\n",
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hdev->rst_stats.flr_rst_cnt);
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dev_info(&hdev->pdev->dev, "VF reset count: %u\n",
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hdev->rst_stats.vf_rst_cnt);
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dev_info(&hdev->pdev->dev, "reset done count: %u\n",
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hdev->rst_stats.rst_done_cnt);
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dev_info(&hdev->pdev->dev, "HW reset done count: %u\n",
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hdev->rst_stats.hw_rst_done_cnt);
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dev_info(&hdev->pdev->dev, "reset count: %u\n",
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hdev->rst_stats.rst_cnt);
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dev_info(&hdev->pdev->dev, "reset fail count: %u\n",
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hdev->rst_stats.rst_fail_cnt);
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dev_info(&hdev->pdev->dev, "vector0 interrupt enable status: 0x%x\n",
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hclgevf_read_dev(&hdev->hw, HCLGEVF_MISC_VECTOR_REG_BASE));
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dev_info(&hdev->pdev->dev, "vector0 interrupt status: 0x%x\n",
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hclgevf_read_dev(&hdev->hw, HCLGEVF_VECTOR0_CMDQ_STAT_REG));
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dev_info(&hdev->pdev->dev, "handshake status: 0x%x\n",
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hclgevf_read_dev(&hdev->hw, HCLGEVF_CMDQ_TX_DEPTH_REG));
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dev_info(&hdev->pdev->dev, "function reset status: 0x%x\n",
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hclgevf_read_dev(&hdev->hw, HCLGEVF_RST_ING));
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dev_info(&hdev->pdev->dev, "hdev state: 0x%lx\n", hdev->state);
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}
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static void hclgevf_reset_err_handle(struct hclgevf_dev *hdev)
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{
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/* recover handshake status with IMP when reset fail */
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@ -1563,6 +1590,8 @@ static void hclgevf_reset_err_handle(struct hclgevf_dev *hdev)
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if (hclgevf_is_reset_pending(hdev)) {
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set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state);
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hclgevf_reset_task_schedule(hdev);
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} else {
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hclgevf_dump_rst_info(hdev);
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}
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}
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