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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ath10k: add ath10k_pci_diag_* helpers
ath10k_pci_diag_read32() is for reading u32 from a device and ath10k_pci_diag_read_hi() is a helper for reading data using "host interest" table. Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
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@ -460,13 +460,46 @@ static int ath10k_pci_diag_read_mem(struct ath10k *ar, u32 address, void *data,
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return ret;
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}
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static int ath10k_pci_diag_read32(struct ath10k *ar, u32 address, u32 *value)
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{
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return ath10k_pci_diag_read_mem(ar, address, value, sizeof(u32));
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}
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static int __ath10k_pci_diag_read_hi(struct ath10k *ar, void *dest,
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u32 src, u32 len)
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{
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u32 host_addr, addr;
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int ret;
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host_addr = host_interest_item_address(src);
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ret = ath10k_pci_diag_read32(ar, host_addr, &addr);
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if (ret != 0) {
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ath10k_warn("failed to get memcpy hi address for firmware address %d: %d\n",
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src, ret);
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return ret;
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}
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ret = ath10k_pci_diag_read_mem(ar, addr, dest, len);
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if (ret != 0) {
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ath10k_warn("failed to memcpy firmware memory from %d (%d B): %d\n",
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addr, len, ret);
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return ret;
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}
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return 0;
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}
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#define ath10k_pci_diag_read_hi(ar, dest, src, len) \
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__ath10k_pci_diag_read_hi(ar, dest, HI_ITEM(src), len);
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/* Read 4-byte aligned data from Target memory or register */
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static int ath10k_pci_diag_read_access(struct ath10k *ar, u32 address,
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u32 *data)
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{
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/* Assume range doesn't cross this boundary */
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if (address >= DRAM_BASE_ADDRESS)
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return ath10k_pci_diag_read_mem(ar, address, data, sizeof(u32));
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return ath10k_pci_diag_read32(ar, address, data);
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*data = ath10k_pci_read32(ar, address);
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return 0;
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@ -801,9 +834,7 @@ static u16 ath10k_pci_hif_get_free_queue_number(struct ath10k *ar, u8 pipe)
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static void ath10k_pci_hif_dump_area(struct ath10k *ar)
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{
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u32 reg_dump_area = 0;
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u32 reg_dump_values[REG_DUMP_COUNT_QCA988X] = {};
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u32 host_addr;
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int ret;
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u32 i;
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@ -812,21 +843,11 @@ static void ath10k_pci_hif_dump_area(struct ath10k *ar)
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ar->hw_params.name, ar->target_version);
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ath10k_err("firmware version: %s\n", ar->hw->wiphy->fw_version);
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host_addr = host_interest_item_address(HI_ITEM(hi_failure_state));
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ret = ath10k_pci_diag_read_mem(ar, host_addr,
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®_dump_area, sizeof(u32));
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ret = ath10k_pci_diag_read_hi(ar, ®_dump_values[0],
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hi_failure_state,
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REG_DUMP_COUNT_QCA988X * sizeof(u32));
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if (ret) {
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ath10k_err("failed to read FW dump area address: %d\n", ret);
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return;
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}
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ath10k_err("target register Dump Location: 0x%08X\n", reg_dump_area);
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ret = ath10k_pci_diag_read_mem(ar, reg_dump_area,
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®_dump_values[0],
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REG_DUMP_COUNT_QCA988X * sizeof(u32));
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if (ret != 0) {
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ath10k_err("failed to read FW dump area: %d\n", ret);
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ath10k_err("failed to read firmware dump area: %d\n", ret);
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return;
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}
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