mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-19 23:07:20 +07:00
scsi: ufs: Add write booster feature support
The write performance of TLC NAND is considerably lower than SLC NAND. Using SLC NAND as a WriteBooster Buffer enables the write request to be processed with lower latency and improves the overall write performance. Adds support for shared-buffer mode WriteBooster. WriteBooster enable: SW enables it when clocks are scaled up, thus it's enabled only in high load conditions. WriteBooster disable: SW will disable the feature, when clocks are scaled down. Thus writes would go as normal writes. To keep the endurance of the WriteBooster Buffer at a maximum, this load-based toggling is adopted. Link: https://lore.kernel.org/r/2871444d9083b0e9323ef6d8ff1b544b7784adc9.1587591527.git.asutoshd@codeaurora.org Reviewed-by: Avri Altman <avri.altman@wdc.com> Signed-off-by: Asutosh Das <asutoshd@codeaurora.org> Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
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@ -140,6 +140,9 @@ enum flag_idn {
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QUERY_FLAG_IDN_BUSY_RTC = 0x09,
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QUERY_FLAG_IDN_RESERVED3 = 0x0A,
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QUERY_FLAG_IDN_PERMANENTLY_DISABLE_FW_UPDATE = 0x0B,
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QUERY_FLAG_IDN_WB_EN = 0x0E,
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QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN = 0x0F,
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QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8 = 0x10,
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};
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/* Attribute idn for Query requests */
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@ -168,6 +171,10 @@ enum attr_idn {
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QUERY_ATTR_IDN_PSA_STATE = 0x15,
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QUERY_ATTR_IDN_PSA_DATA_SIZE = 0x16,
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QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME = 0x17,
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QUERY_ATTR_IDN_WB_FLUSH_STATUS = 0x1C,
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QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE = 0x1D,
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QUERY_ATTR_IDN_WB_BUFF_LIFE_TIME_EST = 0x1E,
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QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE = 0x1F,
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};
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/* Descriptor idn for Query requests */
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@ -191,9 +198,9 @@ enum desc_header_offset {
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};
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enum ufs_desc_def_size {
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QUERY_DESC_DEVICE_DEF_SIZE = 0x40,
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QUERY_DESC_DEVICE_DEF_SIZE = 0x59,
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QUERY_DESC_CONFIGURATION_DEF_SIZE = 0x90,
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QUERY_DESC_UNIT_DEF_SIZE = 0x23,
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QUERY_DESC_UNIT_DEF_SIZE = 0x2D,
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QUERY_DESC_INTERCONNECT_DEF_SIZE = 0x06,
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QUERY_DESC_GEOMETRY_DEF_SIZE = 0x48,
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QUERY_DESC_POWER_DEF_SIZE = 0x62,
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@ -219,6 +226,7 @@ enum unit_desc_param {
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UNIT_DESC_PARAM_PHY_MEM_RSRC_CNT = 0x18,
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UNIT_DESC_PARAM_CTX_CAPABILITIES = 0x20,
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UNIT_DESC_PARAM_LARGE_UNIT_SIZE_M1 = 0x22,
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UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS = 0x29,
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};
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/* Device descriptor parameters offsets in bytes*/
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@ -258,6 +266,10 @@ enum device_desc_param {
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DEVICE_DESC_PARAM_PSA_MAX_DATA = 0x25,
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DEVICE_DESC_PARAM_PSA_TMT = 0x29,
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DEVICE_DESC_PARAM_PRDCT_REV = 0x2A,
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DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP = 0x4F,
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DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN = 0x53,
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DEVICE_DESC_PARAM_WB_TYPE = 0x54,
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DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS = 0x55,
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};
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/* Interconnect descriptor parameters offsets in bytes*/
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@ -333,6 +345,11 @@ enum {
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UFSHCD_AMP = 3,
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};
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/* Possible values for dExtendedUFSFeaturesSupport */
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enum {
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UFS_DEV_WRITE_BOOSTER_SUP = BIT(8),
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};
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#define POWER_DESC_MAX_SIZE 0x62
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#define POWER_DESC_MAX_ACTV_ICC_LVLS 16
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@ -447,6 +464,11 @@ enum ufs_dev_pwr_mode {
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UFS_POWERDOWN_PWR_MODE = 3,
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};
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enum ufs_dev_wb_buf_avail_size {
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UFS_WB_10_PERCENT_BUF_REMAIN = 0x1,
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UFS_WB_40_PERCENT_BUF_REMAIN = 0x4,
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};
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/**
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* struct utp_cmd_rsp - Response UPIU structure
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* @residual_transfer_count: Residual transfer count DW-3
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@ -537,6 +559,11 @@ struct ufs_dev_info {
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u8 *model;
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u16 wspecversion;
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u32 clk_gating_wait_us;
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u32 d_ext_ufs_feature_sup;
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u8 b_wb_buffer_type;
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u32 d_wb_alloc_units;
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bool keep_vcc_on;
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u8 b_presrv_uspc_en;
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};
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/**
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@ -48,6 +48,8 @@
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#include "unipro.h"
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#include "ufs-sysfs.h"
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#include "ufs_bsg.h"
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#include <asm/unaligned.h>
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#include <linux/blkdev.h>
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#define CREATE_TRACE_POINTS
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#include <trace/events/ufs.h>
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@ -251,6 +253,13 @@ static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
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static irqreturn_t ufshcd_intr(int irq, void *__hba);
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static int ufshcd_change_power_mode(struct ufs_hba *hba,
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struct ufs_pa_layer_attr *pwr_mode);
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static bool ufshcd_wb_sup(struct ufs_hba *hba);
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static int ufshcd_wb_buf_flush_enable(struct ufs_hba *hba);
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static int ufshcd_wb_buf_flush_disable(struct ufs_hba *hba);
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static int ufshcd_wb_ctrl(struct ufs_hba *hba, bool enable);
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static int ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set);
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static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable);
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static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
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{
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return tag >= 0 && tag < hba->nutrs;
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@ -272,6 +281,25 @@ static inline void ufshcd_disable_irq(struct ufs_hba *hba)
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}
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}
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static inline void ufshcd_wb_config(struct ufs_hba *hba)
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{
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int ret;
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if (!ufshcd_wb_sup(hba))
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return;
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ret = ufshcd_wb_ctrl(hba, true);
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if (ret)
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dev_err(hba->dev, "%s: Enable WB failed: %d\n", __func__, ret);
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else
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dev_info(hba->dev, "%s: Write Booster Configured\n", __func__);
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ret = ufshcd_wb_toggle_flush_during_h8(hba, true);
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if (ret)
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dev_err(hba->dev, "%s: En WB flush during H8: failed: %d\n",
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__func__, ret);
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ufshcd_wb_toggle_flush(hba, true);
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}
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static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
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{
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if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
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@ -1150,10 +1178,17 @@ static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
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/* scale up the gear after scaling up clocks */
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if (scale_up) {
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ret = ufshcd_scale_gear(hba, true);
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if (ret)
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if (ret) {
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ufshcd_scale_clks(hba, false);
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goto out_unprepare;
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}
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}
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/* Enable Write Booster if we have scaled up else disable it */
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up_write(&hba->clk_scaling_lock);
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ufshcd_wb_ctrl(hba, scale_up);
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down_write(&hba->clk_scaling_lock);
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out_unprepare:
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ufshcd_clock_scaling_unprepare(hba);
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out:
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@ -5161,6 +5196,166 @@ static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
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__func__, err);
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}
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static bool ufshcd_wb_sup(struct ufs_hba *hba)
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{
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return ufshcd_is_wb_allowed(hba);
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}
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static int ufshcd_wb_ctrl(struct ufs_hba *hba, bool enable)
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{
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int ret;
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enum query_opcode opcode;
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if (!ufshcd_wb_sup(hba))
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return 0;
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if (!(enable ^ hba->wb_enabled))
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return 0;
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if (enable)
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opcode = UPIU_QUERY_OPCODE_SET_FLAG;
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else
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opcode = UPIU_QUERY_OPCODE_CLEAR_FLAG;
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ret = ufshcd_query_flag_retry(hba, opcode,
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QUERY_FLAG_IDN_WB_EN, NULL);
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if (ret) {
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dev_err(hba->dev, "%s write booster %s failed %d\n",
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__func__, enable ? "enable" : "disable", ret);
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return ret;
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}
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hba->wb_enabled = enable;
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dev_dbg(hba->dev, "%s write booster %s %d\n",
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__func__, enable ? "enable" : "disable", ret);
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return ret;
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}
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static int ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set)
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{
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int val;
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if (set)
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val = UPIU_QUERY_OPCODE_SET_FLAG;
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else
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val = UPIU_QUERY_OPCODE_CLEAR_FLAG;
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return ufshcd_query_flag_retry(hba, val,
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QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8,
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NULL);
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}
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static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable)
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{
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if (enable)
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ufshcd_wb_buf_flush_enable(hba);
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else
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ufshcd_wb_buf_flush_disable(hba);
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}
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static int ufshcd_wb_buf_flush_enable(struct ufs_hba *hba)
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{
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int ret;
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if (!ufshcd_wb_sup(hba) || hba->wb_buf_flush_enabled)
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return 0;
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ret = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
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QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN, NULL);
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if (ret)
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dev_err(hba->dev, "%s WB - buf flush enable failed %d\n",
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__func__, ret);
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else
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hba->wb_buf_flush_enabled = true;
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dev_dbg(hba->dev, "WB - Flush enabled: %d\n", ret);
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return ret;
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}
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static int ufshcd_wb_buf_flush_disable(struct ufs_hba *hba)
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{
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int ret;
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if (!ufshcd_wb_sup(hba) || !hba->wb_buf_flush_enabled)
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return 0;
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ret = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
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QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN, NULL);
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if (ret) {
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dev_warn(hba->dev, "%s: WB - buf flush disable failed %d\n",
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__func__, ret);
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} else {
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hba->wb_buf_flush_enabled = false;
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dev_dbg(hba->dev, "WB - Flush disabled: %d\n", ret);
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}
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return ret;
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}
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static bool ufshcd_wb_presrv_usrspc_keep_vcc_on(struct ufs_hba *hba,
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u32 avail_buf)
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{
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u32 cur_buf;
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int ret;
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ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
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QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE,
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0, 0, &cur_buf);
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if (ret) {
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dev_err(hba->dev, "%s dCurWriteBoosterBufferSize read failed %d\n",
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__func__, ret);
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return false;
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}
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if (!cur_buf) {
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dev_info(hba->dev, "dCurWBBuf: %d WB disabled until free-space is available\n",
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cur_buf);
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return false;
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}
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/* Let it continue to flush when >60% full */
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if (avail_buf < UFS_WB_40_PERCENT_BUF_REMAIN)
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return true;
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return false;
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}
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static bool ufshcd_wb_keep_vcc_on(struct ufs_hba *hba)
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{
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int ret;
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u32 avail_buf;
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if (!ufshcd_wb_sup(hba))
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return false;
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/*
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* The ufs device needs the vcc to be ON to flush.
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* With user-space reduction enabled, it's enough to enable flush
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* by checking only the available buffer. The threshold
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* defined here is > 90% full.
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* With user-space preserved enabled, the current-buffer
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* should be checked too because the wb buffer size can reduce
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* when disk tends to be full. This info is provided by current
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* buffer (dCurrentWriteBoosterBufferSize). There's no point in
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* keeping vcc on when current buffer is empty.
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*/
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ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
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QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE,
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0, 0, &avail_buf);
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if (ret) {
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dev_warn(hba->dev, "%s dAvailableWriteBoosterBufferSize read failed %d\n",
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__func__, ret);
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return false;
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}
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if (!hba->dev_info.b_presrv_uspc_en) {
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if (avail_buf <= UFS_WB_10_PERCENT_BUF_REMAIN)
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return true;
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return false;
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}
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return ufshcd_wb_presrv_usrspc_keep_vcc_on(hba, avail_buf);
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}
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/**
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* ufshcd_exception_event_handler - handle exceptions raised by device
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* @work: pointer to work data
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@ -6603,6 +6798,33 @@ static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
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return ret;
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}
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static void ufshcd_wb_probe(struct ufs_hba *hba, u8 *desc_buf)
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{
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hba->dev_info.d_ext_ufs_feature_sup =
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get_unaligned_be32(desc_buf +
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DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP);
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/*
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* WB may be supported but not configured while provisioning.
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* The spec says, in dedicated wb buffer mode,
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* a max of 1 lun would have wb buffer configured.
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* Now only shared buffer mode is supported.
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*/
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hba->dev_info.b_wb_buffer_type =
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desc_buf[DEVICE_DESC_PARAM_WB_TYPE];
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hba->dev_info.d_wb_alloc_units =
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get_unaligned_be32(desc_buf +
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DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS);
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hba->dev_info.b_presrv_uspc_en =
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desc_buf[DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN];
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if (!((hba->dev_info.d_ext_ufs_feature_sup &
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UFS_DEV_WRITE_BOOSTER_SUP) &&
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hba->dev_info.b_wb_buffer_type &&
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hba->dev_info.d_wb_alloc_units))
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hba->caps &= ~UFSHCD_CAP_WB_EN;
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}
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static int ufs_get_device_desc(struct ufs_hba *hba)
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{
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int err;
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@ -6639,6 +6861,11 @@ static int ufs_get_device_desc(struct ufs_hba *hba)
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desc_buf[DEVICE_DESC_PARAM_SPEC_VER + 1];
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model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
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/* Enable WB only for UFS-3.1 */
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if (dev_info->wspecversion >= 0x310)
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ufshcd_wb_probe(hba, desc_buf);
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err = ufshcd_read_string_desc(hba, model_index,
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&dev_info->model, SD_ASCII_STD);
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if (err < 0) {
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@ -7149,6 +7376,7 @@ static int ufshcd_probe_hba(struct ufs_hba *hba, bool async)
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/* set the state as operational after switching to desired gear */
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hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
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ufshcd_wb_config(hba);
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/* Enable Auto-Hibernate if configured */
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ufshcd_auto_hibern8_enable(hba);
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@ -7809,12 +8037,16 @@ static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
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*
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* Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
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* in low power state which would save some power.
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*
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* If Write Booster is enabled and the device needs to flush the WB
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* buffer OR if bkops status is urgent for WB, keep Vcc on.
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*/
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if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
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!hba->dev_info.is_lu_power_on_wp) {
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ufshcd_setup_vreg(hba, false);
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} else if (!ufshcd_is_ufs_dev_active(hba)) {
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ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
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if (!hba->dev_info.keep_vcc_on)
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ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
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if (!ufshcd_is_link_active(hba)) {
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ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
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ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
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@ -7938,11 +8170,23 @@ static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
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/* make sure that auto bkops is disabled */
|
||||
ufshcd_disable_auto_bkops(hba);
|
||||
}
|
||||
/*
|
||||
* With wb enabled, if the bkops is enabled or if the
|
||||
* configured WB type is 70% full, keep vcc ON
|
||||
* for the device to flush the wb buffer
|
||||
*/
|
||||
if ((hba->auto_bkops_enabled && ufshcd_wb_sup(hba)) ||
|
||||
ufshcd_wb_keep_vcc_on(hba))
|
||||
hba->dev_info.keep_vcc_on = true;
|
||||
else
|
||||
hba->dev_info.keep_vcc_on = false;
|
||||
} else if (!ufshcd_is_runtime_pm(pm_op)) {
|
||||
hba->dev_info.keep_vcc_on = false;
|
||||
}
|
||||
|
||||
if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
|
||||
((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
|
||||
!ufshcd_is_runtime_pm(pm_op))) {
|
||||
((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
|
||||
!ufshcd_is_runtime_pm(pm_op))) {
|
||||
/* ensure that bkops is disabled */
|
||||
ufshcd_disable_auto_bkops(hba);
|
||||
ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
|
||||
|
@ -555,6 +555,13 @@ enum ufshcd_caps {
|
||||
* for userspace to control the power management.
|
||||
*/
|
||||
UFSHCD_CAP_RPM_AUTOSUSPEND = 1 << 6,
|
||||
|
||||
/*
|
||||
* This capability allows the host controller driver to turn-on
|
||||
* WriteBooster, if the underlying device supports it and is
|
||||
* provisioned to be used. This would increase the write performance.
|
||||
*/
|
||||
UFSHCD_CAP_WB_EN = 1 << 7,
|
||||
};
|
||||
|
||||
/**
|
||||
@ -727,6 +734,8 @@ struct ufs_hba {
|
||||
|
||||
struct device bsg_dev;
|
||||
struct request_queue *bsg_queue;
|
||||
bool wb_buf_flush_enabled;
|
||||
bool wb_enabled;
|
||||
};
|
||||
|
||||
/* Returns true if clocks can be gated. Otherwise false */
|
||||
@ -775,6 +784,11 @@ static inline bool ufshcd_is_auto_hibern8_enabled(struct ufs_hba *hba)
|
||||
return FIELD_GET(UFSHCI_AHIBERN8_TIMER_MASK, hba->ahit) ? true : false;
|
||||
}
|
||||
|
||||
static inline bool ufshcd_is_wb_allowed(struct ufs_hba *hba)
|
||||
{
|
||||
return hba->caps & UFSHCD_CAP_WB_EN;
|
||||
}
|
||||
|
||||
#define ufshcd_writel(hba, val, reg) \
|
||||
writel((val), (hba)->mmio_base + (reg))
|
||||
#define ufshcd_readl(hba, reg) \
|
||||
|
Loading…
Reference in New Issue
Block a user