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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-22 08:53:18 +07:00
i40e/i40evf: Fix for UDP/TCP RSS for X722
The PCTYPES for the X710 and X722 families are different. This patch makes adjustments for that. Signed-off-by: Anjali Singhai Jain <anjali.singhai@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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95a7378092
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@ -2168,6 +2168,10 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
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case 0:
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return -EINVAL;
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case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
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if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)
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hena |=
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
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hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP);
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break;
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default:
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@ -2179,6 +2183,10 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
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case 0:
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return -EINVAL;
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case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
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if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)
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hena |=
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK);
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hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP);
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break;
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default:
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@ -2190,6 +2198,11 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
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case 0:
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return -EINVAL;
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case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
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if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)
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hena |=
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) |
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP);
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hena |= (BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_UDP) |
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BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4));
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break;
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@ -2202,6 +2215,11 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
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case 0:
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return -EINVAL;
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case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
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if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)
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hena |=
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) |
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP);
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hena |= (BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_UDP) |
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BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6));
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break;
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@ -1213,6 +1213,12 @@ static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)
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vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG;
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}
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if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
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if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
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vfres->vf_offload_flags |=
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I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2;
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}
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if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING)
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vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING;
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@ -459,6 +459,7 @@ static int i40evf_set_rss_hash_opt(struct i40evf_adapter *adapter,
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struct ethtool_rxnfc *nfc)
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{
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struct i40e_hw *hw = &adapter->hw;
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u32 flags = adapter->vf_res->vf_offload_flags;
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u64 hena = (u64)rd32(hw, I40E_VFQF_HENA(0)) |
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((u64)rd32(hw, I40E_VFQF_HENA(1)) << 32);
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@ -477,19 +478,34 @@ static int i40evf_set_rss_hash_opt(struct i40evf_adapter *adapter,
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switch (nfc->flow_type) {
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case TCP_V4_FLOW:
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if (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3))
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if (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
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if (flags & I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
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hena |=
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
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hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP);
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else
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} else {
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return -EINVAL;
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}
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break;
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case TCP_V6_FLOW:
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if (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3))
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if (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
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if (flags & I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
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hena |=
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK);
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hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP);
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else
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} else {
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return -EINVAL;
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}
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break;
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case UDP_V4_FLOW:
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if (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
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if (flags & I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
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hena |=
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) |
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP);
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hena |= (BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_UDP) |
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BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4));
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} else {
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@ -498,6 +514,11 @@ static int i40evf_set_rss_hash_opt(struct i40evf_adapter *adapter,
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break;
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case UDP_V6_FLOW:
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if (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
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if (flags & I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
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hena |=
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) |
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BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP);
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hena |= (BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_UDP) |
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BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6));
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} else {
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@ -1456,7 +1456,11 @@ static int i40evf_init_rss(struct i40evf_adapter *adapter)
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int ret;
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/* Enable PCTYPES for RSS, TCP/UDP with IPv4/IPv6 */
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hena = I40E_DEFAULT_RSS_HENA;
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if (adapter->vf_res->vf_offload_flags &
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I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
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hena = I40E_DEFAULT_RSS_HENA_EXPANDED;
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else
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hena = I40E_DEFAULT_RSS_HENA;
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wr32(hw, I40E_VFQF_HENA(0), (u32)hena);
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wr32(hw, I40E_VFQF_HENA(1), (u32)(hena >> 32));
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@ -2507,8 +2511,6 @@ static void i40evf_init_task(struct work_struct *work)
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if (adapter->vf_res->vf_offload_flags &
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I40E_VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)
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adapter->flags |= I40EVF_FLAG_WB_ON_ITR_CAPABLE;
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if (!RSS_AQ(adapter))
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i40evf_init_rss(adapter);
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err = i40evf_request_misc_irq(adapter);
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if (err)
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goto err_sw_init;
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