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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-15 10:56:49 +07:00
[media] rtl2832: style changes and minor cleanup
Most of those were reported by checkpatch.pl... debug module parameter is not used anywhere so remove it. Signed-off-by: Antti Palosaari <crope@iki.fi> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
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@ -24,11 +24,6 @@
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/* Max transfer size done by I2C transfer functions */
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#define MAX_XFER_SIZE 64
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int rtl2832_debug;
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module_param_named(debug, rtl2832_debug, int, 0644);
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MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
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#define REG_MASK(b) (BIT(b + 1) - 1)
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static const struct rtl2832_reg_entry registers[] = {
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@ -189,8 +184,9 @@ static int rtl2832_wr(struct rtl2832_priv *priv, u8 reg, u8 *val, int len)
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if (ret == 1) {
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ret = 0;
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} else {
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dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%02x " \
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"len=%d\n", KBUILD_MODNAME, ret, reg, len);
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dev_warn(&priv->i2c->dev,
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"%s: i2c wr failed=%d reg=%02x len=%d\n",
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KBUILD_MODNAME, ret, reg, len);
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ret = -EREMOTEIO;
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}
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return ret;
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@ -218,8 +214,9 @@ static int rtl2832_rd(struct rtl2832_priv *priv, u8 reg, u8 *val, int len)
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if (ret == 2) {
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ret = 0;
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} else {
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dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%02x " \
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"len=%d\n", KBUILD_MODNAME, ret, reg, len);
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dev_warn(&priv->i2c->dev,
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"%s: i2c rd failed=%d reg=%02x len=%d\n",
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KBUILD_MODNAME, ret, reg, len);
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ret = -EREMOTEIO;
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}
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return ret;
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@ -417,7 +414,7 @@ static int rtl2832_set_if(struct dvb_frontend *fe, u32 if_freq)
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ret = rtl2832_wr_demod_reg(priv, DVBT_PSET_IFFREQ, pset_iffreq);
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return (ret);
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return ret;
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}
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static int rtl2832_init(struct dvb_frontend *fe)
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@ -516,7 +513,8 @@ static int rtl2832_init(struct dvb_frontend *fe)
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/*
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* r820t NIM code does a software reset here at the demod -
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* may not be needed, as there's already a software reset at set_params()
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* may not be needed, as there's already a software reset at
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* set_params()
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*/
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#if 1
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/* soft reset */
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@ -593,9 +591,9 @@ static int rtl2832_set_frontend(struct dvb_frontend *fe)
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};
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dev_dbg(&priv->i2c->dev, "%s: frequency=%d bandwidth_hz=%d " \
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"inversion=%d\n", __func__, c->frequency,
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c->bandwidth_hz, c->inversion);
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dev_dbg(&priv->i2c->dev,
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"%s: frequency=%d bandwidth_hz=%d inversion=%d\n",
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__func__, c->frequency, c->bandwidth_hz, c->inversion);
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/* program tuner */
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if (fe->ops.tuner_ops.set_params)
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@ -51,7 +51,7 @@ struct rtl2832_config {
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};
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#if IS_ENABLED(CONFIG_DVB_RTL2832)
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extern struct dvb_frontend *rtl2832_attach(
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struct dvb_frontend *rtl2832_attach(
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const struct rtl2832_config *cfg,
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struct i2c_adapter *i2c
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);
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@ -267,7 +267,7 @@ static const struct rtl2832_reg_value rtl2832_tuner_init_tua9001[] = {
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{DVBT_OPT_ADC_IQ, 0x1},
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{DVBT_AD_AVI, 0x0},
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{DVBT_AD_AVQ, 0x0},
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{DVBT_SPEC_INV, 0x0},
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{DVBT_SPEC_INV, 0x0},
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};
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static const struct rtl2832_reg_value rtl2832_tuner_init_fc0012[] = {
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@ -301,7 +301,7 @@ static const struct rtl2832_reg_value rtl2832_tuner_init_fc0012[] = {
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{DVBT_GI_PGA_STATE, 0x0},
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{DVBT_EN_AGC_PGA, 0x1},
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{DVBT_IF_AGC_MAN, 0x0},
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{DVBT_SPEC_INV, 0x0},
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{DVBT_SPEC_INV, 0x0},
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};
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static const struct rtl2832_reg_value rtl2832_tuner_init_e4000[] = {
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@ -339,32 +339,32 @@ static const struct rtl2832_reg_value rtl2832_tuner_init_e4000[] = {
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{DVBT_REG_MONSEL, 0x1},
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{DVBT_REG_MON, 0x1},
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{DVBT_REG_4MSEL, 0x0},
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{DVBT_SPEC_INV, 0x0},
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{DVBT_SPEC_INV, 0x0},
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};
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static const struct rtl2832_reg_value rtl2832_tuner_init_r820t[] = {
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{DVBT_DAGC_TRG_VAL, 0x39},
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{DVBT_AGC_TARG_VAL_0, 0x0},
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{DVBT_AGC_TARG_VAL_8_1, 0x40},
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{DVBT_AAGC_LOOP_GAIN, 0x16},
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{DVBT_LOOP_GAIN2_3_0, 0x8},
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{DVBT_LOOP_GAIN2_4, 0x1},
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{DVBT_LOOP_GAIN3, 0x18},
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{DVBT_VTOP1, 0x35},
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{DVBT_VTOP2, 0x21},
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{DVBT_VTOP3, 0x21},
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{DVBT_KRF1, 0x0},
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{DVBT_KRF2, 0x40},
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{DVBT_KRF3, 0x10},
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{DVBT_KRF4, 0x10},
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{DVBT_IF_AGC_MIN, 0x80},
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{DVBT_IF_AGC_MAX, 0x7f},
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{DVBT_RF_AGC_MIN, 0x80},
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{DVBT_RF_AGC_MAX, 0x7f},
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{DVBT_POLAR_RF_AGC, 0x0},
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{DVBT_POLAR_IF_AGC, 0x0},
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{DVBT_AD7_SETTING, 0xe9f4},
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{DVBT_SPEC_INV, 0x1},
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{DVBT_DAGC_TRG_VAL, 0x39},
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{DVBT_AGC_TARG_VAL_0, 0x0},
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{DVBT_AGC_TARG_VAL_8_1, 0x40},
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{DVBT_AAGC_LOOP_GAIN, 0x16},
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{DVBT_LOOP_GAIN2_3_0, 0x8},
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{DVBT_LOOP_GAIN2_4, 0x1},
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{DVBT_LOOP_GAIN3, 0x18},
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{DVBT_VTOP1, 0x35},
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{DVBT_VTOP2, 0x21},
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{DVBT_VTOP3, 0x21},
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{DVBT_KRF1, 0x0},
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{DVBT_KRF2, 0x40},
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{DVBT_KRF3, 0x10},
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{DVBT_KRF4, 0x10},
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{DVBT_IF_AGC_MIN, 0x80},
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{DVBT_IF_AGC_MAX, 0x7f},
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{DVBT_RF_AGC_MIN, 0x80},
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{DVBT_RF_AGC_MAX, 0x7f},
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{DVBT_POLAR_RF_AGC, 0x0},
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{DVBT_POLAR_IF_AGC, 0x0},
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{DVBT_AD7_SETTING, 0xe9f4},
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{DVBT_SPEC_INV, 0x1},
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};
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#endif /* RTL2832_PRIV_H */
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