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drm/amd/display: Disable PG on NV12
[Why] According to HW team, PG is dropped for NV12, but programming the registers will still cause power to be consumed, so don't program for NV12. [How] Set function pointer to NULL if NV12 Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1268,7 +1268,8 @@ void dcn10_init_hw(struct dc *dc)
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}
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//Enable ability to power gate / don't force power on permanently
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hws->funcs.enable_power_gating_plane(hws, true);
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if (hws->funcs.enable_power_gating_plane)
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hws->funcs.enable_power_gating_plane(hws, true);
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return;
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}
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@ -1385,8 +1386,8 @@ void dcn10_init_hw(struct dc *dc)
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REG_UPDATE(DCFCLK_CNTL, DCFCLK_GATE_DIS, 0);
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}
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hws->funcs.enable_power_gating_plane(dc->hwseq, true);
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if (hws->funcs.enable_power_gating_plane)
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hws->funcs.enable_power_gating_plane(dc->hwseq, true);
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if (dc->clk_mgr->funcs->notify_wm_ranges)
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dc->clk_mgr->funcs->notify_wm_ranges(dc->clk_mgr);
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@ -3760,6 +3760,15 @@ static bool dcn20_resource_construct(
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dcn20_hw_sequencer_construct(dc);
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// IF NV12, set PG function pointer to NULL. It's not that
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// PG isn't supported for NV12, it's that we don't want to
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// program the registers because that will cause more power
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// to be consumed. We could have created dcn20_init_hw to get
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// the same effect by checking ASIC rev, but there was a
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// request at some point to not check ASIC rev on hw sequencer.
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if (ASICREV_IS_NAVI12_P(dc->ctx->asic_id.hw_internal_rev))
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dc->hwseq->funcs.enable_power_gating_plane = NULL;
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dc->caps.max_planes = pool->base.pipe_count;
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for (i = 0; i < dc->caps.max_planes; ++i)
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