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mmc: meson-gx: cfg init overwrite values

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cfg init function overwrite values set in the clk init function
Remove the cfg pokes from the clk init. Actually, trying to use
the CLK_AUTO, like initially tried in clk_init, would break
the card initialization

Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Jerome Brunet 2017-08-28 16:29:04 +02:00 committed by Ulf Hansson
parent ef5c48157e
commit 3c39e2ca88
1 changed files with 4 additions and 10 deletions
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14
drivers/mmc/host/meson-gx-mmc.c
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@ -337,7 +337,7 @@ static int meson_mmc_clk_init(struct meson_host *host)
int i, ret = 0; int i, ret = 0;
const char *mux_parent_names[MUX_CLK_NUM_PARENTS]; const char *mux_parent_names[MUX_CLK_NUM_PARENTS];
const char *clk_div_parents[1]; const char *clk_div_parents[1];
u32 clk_reg, cfg; u32 clk_reg;
/* init SD_EMMC_CLOCK to sane defaults w/min clock rate */ /* init SD_EMMC_CLOCK to sane defaults w/min clock rate */
clk_reg = 0; clk_reg = 0;
@ -402,12 +402,6 @@ static int meson_mmc_clk_init(struct meson_host *host)
if (WARN_ON(PTR_ERR_OR_ZERO(host->cfg_div_clk))) if (WARN_ON(PTR_ERR_OR_ZERO(host->cfg_div_clk)))
return PTR_ERR(host->cfg_div_clk); return PTR_ERR(host->cfg_div_clk);
/* Ensure clock starts in "auto" mode, not "always on" */
cfg = readl(host->regs + SD_EMMC_CFG);
cfg &= ~CFG_CLK_ALWAYS_ON;
cfg |= CFG_AUTO_CLK;
writel(cfg, host->regs + SD_EMMC_CFG);
ret = clk_prepare_enable(host->cfg_div_clk); ret = clk_prepare_enable(host->cfg_div_clk);
if (ret) if (ret)
return ret; return ret;
@ -956,6 +950,9 @@ static int meson_mmc_probe(struct platform_device *pdev)
if (ret) if (ret)
goto err_core_clk; goto err_core_clk;
/* set config to sane default */
meson_mmc_cfg_init(host);
/* Stop execution */ /* Stop execution */
writel(0, host->regs + SD_EMMC_START); writel(0, host->regs + SD_EMMC_START);
@ -964,9 +961,6 @@ static int meson_mmc_probe(struct platform_device *pdev)
writel(IRQ_EN_MASK, host->regs + SD_EMMC_STATUS); writel(IRQ_EN_MASK, host->regs + SD_EMMC_STATUS);
writel(IRQ_EN_MASK, host->regs + SD_EMMC_IRQ_EN); writel(IRQ_EN_MASK, host->regs + SD_EMMC_IRQ_EN);
/* set config to sane default */
meson_mmc_cfg_init(host);
ret = devm_request_threaded_irq(&pdev->dev, irq, meson_mmc_irq, ret = devm_request_threaded_irq(&pdev->dev, irq, meson_mmc_irq,
meson_mmc_irq_thread, IRQF_SHARED, meson_mmc_irq_thread, IRQF_SHARED,
NULL, host); NULL, host);