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drm/amd/display: add support for VSIP info packet
[Why] The vendor specific infoframe is needed for HDMI while displaying specific modes. DC supports sending it, but we aren't currently building it [How] Add mod_build_hf_vsif_infopacket() to build the vendor specific info packet. Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -35,4 +35,7 @@ struct mod_vrr_params;
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void mod_build_vsc_infopacket(const struct dc_stream_state *stream,
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struct dc_info_packet *info_packet);
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void mod_build_hf_vsif_infopacket(const struct dc_stream_state *stream,
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struct dc_info_packet *info_packet, int ALLMEnabled, int ALLMValue);
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#endif
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@ -31,6 +31,7 @@
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#include "dc.h"
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#define HDMI_INFOFRAME_TYPE_VENDOR 0x81
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#define HF_VSIF_VERSION 1
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// VTEM Byte Offset
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#define VTEM_PB0 0
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@ -395,3 +396,100 @@ void mod_build_vsc_infopacket(const struct dc_stream_state *stream,
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}
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/**
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*****************************************************************************
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* Function: mod_build_hf_vsif_infopacket
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*
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* @brief
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* Prepare HDMI Vendor Specific info frame.
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* Follows HDMI Spec to build up Vendor Specific info frame
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*
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* @param [in] stream: contains data we may need to construct VSIF (i.e. timing_3d_format, etc.)
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* @param [out] info_packet: output structure where to store VSIF
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*****************************************************************************
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*/
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void mod_build_hf_vsif_infopacket(const struct dc_stream_state *stream,
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struct dc_info_packet *info_packet, int ALLMEnabled, int ALLMValue)
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{
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unsigned int length = 5;
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bool hdmi_vic_mode = false;
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uint8_t checksum = 0;
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uint32_t i = 0;
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enum dc_timing_3d_format format;
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bool bALLM = (bool)ALLMEnabled;
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bool bALLMVal = (bool)ALLMValue;
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info_packet->valid = false;
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format = stream->timing.timing_3d_format;
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if (stream->view_format == VIEW_3D_FORMAT_NONE)
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format = TIMING_3D_FORMAT_NONE;
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if (stream->timing.hdmi_vic != 0
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&& stream->timing.h_total >= 3840
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&& stream->timing.v_total >= 2160
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&& format == TIMING_3D_FORMAT_NONE)
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hdmi_vic_mode = true;
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if ((format == TIMING_3D_FORMAT_NONE) && !hdmi_vic_mode && !bALLM)
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return;
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info_packet->sb[1] = 0x03;
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info_packet->sb[2] = 0x0C;
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info_packet->sb[3] = 0x00;
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if (bALLM) {
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info_packet->sb[1] = 0xD8;
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info_packet->sb[2] = 0x5D;
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info_packet->sb[3] = 0xC4;
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info_packet->sb[4] = HF_VSIF_VERSION;
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}
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if (format != TIMING_3D_FORMAT_NONE)
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info_packet->sb[4] = (2 << 5);
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else if (hdmi_vic_mode)
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info_packet->sb[4] = (1 << 5);
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switch (format) {
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case TIMING_3D_FORMAT_HW_FRAME_PACKING:
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case TIMING_3D_FORMAT_SW_FRAME_PACKING:
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info_packet->sb[5] = (0x0 << 4);
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break;
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case TIMING_3D_FORMAT_SIDE_BY_SIDE:
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case TIMING_3D_FORMAT_SBS_SW_PACKED:
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info_packet->sb[5] = (0x8 << 4);
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length = 6;
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break;
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case TIMING_3D_FORMAT_TOP_AND_BOTTOM:
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case TIMING_3D_FORMAT_TB_SW_PACKED:
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info_packet->sb[5] = (0x6 << 4);
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break;
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default:
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break;
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}
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if (hdmi_vic_mode)
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info_packet->sb[5] = stream->timing.hdmi_vic;
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info_packet->hb0 = HDMI_INFOFRAME_TYPE_VENDOR;
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info_packet->hb1 = 0x01;
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info_packet->hb2 = (uint8_t) (length);
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if (bALLM)
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info_packet->sb[5] = (info_packet->sb[5] & ~0x02) | (bALLMVal << 1);
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checksum += info_packet->hb0;
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checksum += info_packet->hb1;
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checksum += info_packet->hb2;
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for (i = 1; i <= length; i++)
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checksum += info_packet->sb[i];
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info_packet->sb[0] = (uint8_t) (0x100 - checksum);
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info_packet->valid = true;
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}
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