mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-09 03:26:38 +07:00
drm/i915/glk: Enable pipe CSC
Now that the pre-csc degamma table is set up correctly in Geminilake, pipe CSC can be enabled without causing a black screen. v2: Rebase. Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170217120630.6143-3-ander.conselvan.de.oliveira@intel.com
This commit is contained in:
parent
8d371db4b0
commit
3bb56da781
@ -3327,6 +3327,7 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
|
||||
if (IS_GEMINILAKE(dev_priv)) {
|
||||
I915_WRITE(PLANE_COLOR_CTL(pipe, plane_id),
|
||||
PLANE_COLOR_PIPE_GAMMA_ENABLE |
|
||||
PLANE_COLOR_PIPE_CSC_ENABLE |
|
||||
PLANE_COLOR_PLANE_GAMMA_DISABLE);
|
||||
} else {
|
||||
plane_ctl |=
|
||||
|
@ -224,6 +224,7 @@ skl_update_plane(struct drm_plane *drm_plane,
|
||||
if (IS_GEMINILAKE(dev_priv)) {
|
||||
I915_WRITE(PLANE_COLOR_CTL(pipe, plane_id),
|
||||
PLANE_COLOR_PIPE_GAMMA_ENABLE |
|
||||
PLANE_COLOR_PIPE_CSC_ENABLE |
|
||||
PLANE_COLOR_PLANE_GAMMA_DISABLE);
|
||||
} else {
|
||||
plane_ctl |=
|
||||
|
Loading…
Reference in New Issue
Block a user