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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-02 23:06:50 +07:00
Merge remote-tracking branch 'asoc/topic/wm2200' into asoc-next
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commit
3bb26706d9
@ -12,6 +12,7 @@
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#define __LINUX_SND_WM2200_H
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#define WM2200_GPIO_SET 0x10000
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#define WM2200_MAX_MICBIAS 2
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enum wm2200_in_mode {
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WM2200_IN_SE = 0,
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@ -25,6 +26,24 @@ enum wm2200_dmic_sup {
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WM2200_DMIC_SUP_MICBIAS2 = 2,
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};
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enum wm2200_mbias_lvl {
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WM2200_MBIAS_LVL_1V5 = 1,
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WM2200_MBIAS_LVL_1V8 = 2,
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WM2200_MBIAS_LVL_1V9 = 3,
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WM2200_MBIAS_LVL_2V0 = 4,
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WM2200_MBIAS_LVL_2V2 = 5,
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WM2200_MBIAS_LVL_2V4 = 6,
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WM2200_MBIAS_LVL_2V5 = 7,
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WM2200_MBIAS_LVL_2V6 = 8,
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};
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struct wm2200_micbias {
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enum wm2200_mbias_lvl mb_lvl; /** Regulated voltage */
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unsigned int discharge:1; /** Actively discharge */
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unsigned int fast_start:1; /** Enable aggressive startup ramp rate */
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unsigned int bypass:1; /** Use bypass mode */
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};
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struct wm2200_pdata {
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int reset; /** GPIO controlling /RESET, if any */
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int ldo_ena; /** GPIO controlling LODENA, if any */
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@ -35,7 +54,8 @@ struct wm2200_pdata {
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enum wm2200_in_mode in_mode[3];
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enum wm2200_dmic_sup dmic_sup[3];
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int micbias_cfg[2]; /** Register value to configure MICBIAS */
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/** MICBIAS configurations */
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struct wm2200_micbias micbias[WM2200_MAX_MICBIAS];
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};
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#endif
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@ -1109,6 +1109,16 @@ static int wm2200_mixer_values[] = {
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static WM2200_MUX_CTL_DECL(name##_aux5); \
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static WM2200_MUX_CTL_DECL(name##_aux6);
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static const char *wm2200_rxanc_input_sel_texts[] = {
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"None", "IN1", "IN2", "IN3",
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};
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static const struct soc_enum wm2200_rxanc_input_sel =
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SOC_ENUM_SINGLE(WM2200_RXANC_SRC,
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WM2200_IN_RXANC_SEL_SHIFT,
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ARRAY_SIZE(wm2200_rxanc_input_sel_texts),
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wm2200_rxanc_input_sel_texts);
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static const struct snd_kcontrol_new wm2200_snd_controls[] = {
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SOC_SINGLE("IN1 High Performance Switch", WM2200_IN1L_CONTROL,
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WM2200_IN1_OSR_SHIFT, 1, 0),
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@ -1141,6 +1151,12 @@ SOC_DOUBLE_R_TLV("IN3 Digital Volume", WM2200_ADC_DIGITAL_VOLUME_3L,
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WM2200_ADC_DIGITAL_VOLUME_3R, WM2200_IN3L_DIG_VOL_SHIFT,
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0xbf, 0, digital_tlv),
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SND_SOC_BYTES_MASK("EQL Coefficients", WM2200_EQL_1, 20, WM2200_EQL_ENA),
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SND_SOC_BYTES_MASK("EQR Coefficients", WM2200_EQR_1, 20, WM2200_EQR_ENA),
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SND_SOC_BYTES("LHPF1 Coefficeints", WM2200_HPLPF1_2, 1),
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SND_SOC_BYTES("LHPF2 Coefficeints", WM2200_HPLPF2_2, 1),
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SOC_SINGLE("OUT1 High Performance Switch", WM2200_DAC_DIGITAL_VOLUME_1L,
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WM2200_OUT1_OSR_SHIFT, 1, 0),
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SOC_SINGLE("OUT2 High Performance Switch", WM2200_DAC_DIGITAL_VOLUME_2L,
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@ -1162,6 +1178,7 @@ SOC_DOUBLE_R_TLV("OUT2 Digital Volume", WM2200_DAC_DIGITAL_VOLUME_2L,
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digital_tlv),
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SOC_DOUBLE("OUT2 Switch", WM2200_PDM_1, WM2200_SPK1L_MUTE_SHIFT,
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WM2200_SPK1R_MUTE_SHIFT, 1, 1),
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SOC_ENUM("RxANC Src", wm2200_rxanc_input_sel),
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};
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WM2200_MIXER_ENUMS(OUT1L, WM2200_OUT1LMIX_INPUT_1_SOURCE);
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@ -1548,6 +1565,10 @@ static int wm2200_probe(struct snd_soc_codec *codec)
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return ret;
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}
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ret = snd_soc_add_codec_controls(codec, wm_adsp_fw_controls, 2);
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if (ret != 0)
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return ret;
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return ret;
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}
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@ -2182,6 +2203,7 @@ static int wm2200_i2c_probe(struct i2c_client *i2c,
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struct wm2200_priv *wm2200;
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unsigned int reg;
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int ret, i;
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int val;
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wm2200 = devm_kzalloc(&i2c->dev, sizeof(struct wm2200_priv),
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GFP_KERNEL);
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@ -2205,6 +2227,9 @@ static int wm2200_i2c_probe(struct i2c_client *i2c,
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wm2200->dsp[i].num = i + 1;
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wm2200->dsp[i].dev = &i2c->dev;
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wm2200->dsp[i].regmap = wm2200->regmap;
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wm2200->dsp[i].sysclk_reg = WM2200_CLOCKING_3;
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wm2200->dsp[i].sysclk_mask = WM2200_SYSCLK_FREQ_MASK;
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wm2200->dsp[i].sysclk_shift = WM2200_SYSCLK_FREQ_SHIFT;
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}
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wm2200->dsp[0].base = WM2200_DSP1_CONTROL_1;
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@ -2215,6 +2240,9 @@ static int wm2200_i2c_probe(struct i2c_client *i2c,
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wm2200->dsp[1].mem = wm2200_dsp2_regions;
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wm2200->dsp[1].num_mems = ARRAY_SIZE(wm2200_dsp2_regions);
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for (i = 0; i < ARRAY_SIZE(wm2200->dsp); i++)
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wm_adsp1_init(&wm2200->dsp[i]);
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if (pdata)
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wm2200->pdata = *pdata;
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@ -2326,6 +2354,36 @@ static int wm2200_i2c_probe(struct i2c_client *i2c,
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regmap_write(wm2200->regmap, WM2200_AUDIO_IF_1_16 + i, i);
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}
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for (i = 0; i < WM2200_MAX_MICBIAS; i++) {
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if (!wm2200->pdata.micbias[i].mb_lvl &&
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!wm2200->pdata.micbias[i].bypass)
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continue;
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/* Apply default for bypass mode */
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if (!wm2200->pdata.micbias[i].mb_lvl)
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wm2200->pdata.micbias[i].mb_lvl
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= WM2200_MBIAS_LVL_1V5;
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val = (wm2200->pdata.micbias[i].mb_lvl -1)
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<< WM2200_MICB1_LVL_SHIFT;
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if (wm2200->pdata.micbias[i].discharge)
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val |= WM2200_MICB1_DISCH;
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if (wm2200->pdata.micbias[i].fast_start)
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val |= WM2200_MICB1_RATE;
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if (wm2200->pdata.micbias[i].bypass)
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val |= WM2200_MICB1_MODE;
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regmap_update_bits(wm2200->regmap,
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WM2200_MIC_BIAS_CTRL_1 + i,
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WM2200_MICB1_LVL_MASK |
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WM2200_MICB1_DISCH |
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WM2200_MICB1_MODE |
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WM2200_MICB1_RATE, val);
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}
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for (i = 0; i < ARRAY_SIZE(wm2200->pdata.in_mode); i++) {
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regmap_update_bits(wm2200->regmap, wm2200_mic_ctrl_reg[i],
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WM2200_IN1_MODE_MASK |
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