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ARM: l2c: provide enable method
Providing an enable method gives L2 cache controllers a chance to do special handling at enable time. This allows us to remove a hack in l2x0_unlock() for Marvell Aurora L2 caches. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King
parent
da3627fbda
commit
3b8bad5758
@ -29,7 +29,9 @@
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#include "cache-aurora-l2.h"
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struct l2c_init_data {
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unsigned num_lock;
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void (*of_parse)(const struct device_node *, u32 *, u32 *);
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void (*enable)(void __iomem *, u32, unsigned);
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void (*save)(void __iomem *);
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struct outer_cache_fns outer_cache;
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};
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@ -82,6 +84,36 @@ static inline void l2c_unlock(void __iomem *base, unsigned num)
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}
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}
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/*
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* Enable the L2 cache controller. This function must only be
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* called when the cache controller is known to be disabled.
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*/
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static void l2c_enable(void __iomem *base, u32 aux, unsigned num_lock)
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{
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unsigned long flags;
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l2c_unlock(base, num_lock);
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writel_relaxed(aux, base + L2X0_AUX_CTRL);
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local_irq_save(flags);
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__l2c_op_way(base + L2X0_INV_WAY);
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writel_relaxed(0, base + sync_reg_offset);
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l2c_wait_mask(base + sync_reg_offset, 1);
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local_irq_restore(flags);
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writel_relaxed(L2X0_CTRL_EN, base + L2X0_CTRL);
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}
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static void l2c_disable(void)
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{
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void __iomem *base = l2x0_base;
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outer_cache.flush_all();
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writel_relaxed(0, base + L2X0_CTRL);
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dsb(st);
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}
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#ifdef CONFIG_CACHE_PL310
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static inline void cache_wait(void __iomem *reg, unsigned long mask)
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{
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@ -325,9 +357,6 @@ static void l2x0_unlock(u32 cache_id)
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case L2X0_CACHE_ID_PART_L310:
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lockregs = 8;
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break;
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case AURORA_CACHE_ID:
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lockregs = 4;
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break;
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default:
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/* L210 and unknown types */
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lockregs = 1;
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@ -337,7 +366,22 @@ static void l2x0_unlock(u32 cache_id)
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l2c_unlock(l2x0_base, lockregs);
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}
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static void l2x0_enable(void __iomem *base, u32 aux, unsigned num_lock)
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{
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/* Make sure that I&D is not locked down when starting */
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l2x0_unlock(readl_relaxed(base + L2X0_CACHE_ID));
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/* l2x0 controller is disabled */
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writel_relaxed(aux, base + L2X0_AUX_CTRL);
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l2x0_inv_all();
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/* enable L2X0 */
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writel_relaxed(L2X0_CTRL_EN, base + L2X0_CTRL);
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}
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static const struct l2c_init_data l2x0_init_fns __initconst = {
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.enable = l2x0_enable,
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.outer_cache = {
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.inv_range = l2x0_inv_range,
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.clean_range = l2x0_clean_range,
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@ -412,22 +456,11 @@ static void __init __l2c_init(const struct l2c_init_data *data,
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l2x0_size = ways * way_size * SZ_1K;
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/*
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* Check if l2x0 controller is already enabled.
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* If you are booting from non-secure mode
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* accessing the below registers will fault.
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* Check if l2x0 controller is already enabled. If we are booting
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* in non-secure mode accessing the below registers will fault.
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*/
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if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
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/* Make sure that I&D is not locked down when starting */
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l2x0_unlock(cache_id);
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/* l2x0 controller is disabled */
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writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL);
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l2x0_inv_all();
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/* enable L2X0 */
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writel_relaxed(L2X0_CTRL_EN, l2x0_base + L2X0_CTRL);
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}
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if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN))
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data->enable(l2x0_base, aux, data->num_lock);
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/* Re-read it in case some bits are reserved. */
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aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
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@ -515,6 +548,7 @@ static void l2x0_resume(void)
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static const struct l2c_init_data of_l2x0_data __initconst = {
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.of_parse = l2x0_of_parse,
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.enable = l2x0_enable,
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.outer_cache = {
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.inv_range = l2x0_inv_range,
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.clean_range = l2x0_clean_range,
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@ -620,7 +654,9 @@ static void pl310_resume(void)
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}
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static const struct l2c_init_data of_pl310_data __initconst = {
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.num_lock = 8,
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.of_parse = pl310_of_parse,
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.enable = l2c_enable,
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.save = pl310_save,
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.outer_cache = {
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.inv_range = l2x0_inv_range,
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@ -779,7 +815,9 @@ static void __init aurora_of_parse(const struct device_node *np,
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}
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static const struct l2c_init_data of_aurora_with_outer_data __initconst = {
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.num_lock = 4,
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.of_parse = aurora_of_parse,
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.enable = l2c_enable,
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.save = aurora_save,
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.outer_cache = {
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.inv_range = aurora_inv_range,
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@ -793,7 +831,9 @@ static const struct l2c_init_data of_aurora_with_outer_data __initconst = {
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};
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static const struct l2c_init_data of_aurora_no_outer_data __initconst = {
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.num_lock = 4,
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.of_parse = aurora_of_parse,
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.enable = l2c_enable,
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.save = aurora_save,
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.outer_cache = {
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.resume = aurora_resume,
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@ -942,7 +982,9 @@ static void bcm_flush_range(unsigned long start, unsigned long end)
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}
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static const struct l2c_init_data of_bcm_l2x0_data __initconst = {
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.num_lock = 8,
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.of_parse = pl310_of_parse,
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.enable = l2c_enable,
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.save = pl310_save,
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.outer_cache = {
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.inv_range = bcm_inv_range,
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@ -976,6 +1018,8 @@ static void tauros3_resume(void)
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}
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static const struct l2c_init_data of_tauros3_data __initconst = {
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.num_lock = 8,
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.enable = l2c_enable,
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.save = tauros3_save,
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/* Tauros3 broadcasts L1 cache operations to L2 */
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.outer_cache = {
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