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[ARM] 4171/1: i.MX/MX1 optimize interrupt source retrieval

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The macro "get_irqnr_and_base" in "entry-macro.S" optimized
according to Lennert Buytenhek suggestion.

Comments from Pavel Pisa:

 Sascha has approved patch some days ago

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Pavel Pisa 2007-02-12 23:34:38 +01:00 committed by Russell King
parent cb36bb7516
commit 3b581f5485
1 changed files with 6 additions and 12 deletions
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18
include/asm-arm/arch-imx/entry-macro.S
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@ -13,19 +13,13 @@
.endm
#define AITC_NIVECSR 0x40
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqstat, =IO_ADDRESS(IMX_AITC_BASE)
ldr \base, =IO_ADDRESS(IMX_AITC_BASE)
@ Load offset & priority of the highest priority
@ interrupt pending.
ldr \irqnr, [\irqstat, #AITC_NIVECSR]
ldr \irqstat, [\base, #AITC_NIVECSR]
@ Shift off the priority leaving the offset or
@ "interrupt number"
mov \irqnr, \irqnr, lsr #16
ldr \irqstat, =1 @ dummy compare
ldr \base, =0xFFFF // invalid interrupt
cmp \irqnr, \base
bne 1001f
ldr \irqstat, =0
1001:
tst \irqstat, #1 @ to make the condition code = TRUE
@ "interrupt number", use arithmetic shift to
@ transform illegal source (0xffff) as -1
mov \irqnr, \irqstat, asr #16
adds \tmp, \irqnr, #1
.endm