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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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staging: netlogic: Fix several parentheses alignments
Align arguments with the open parenthesis. Checkpatch found these issues. Signed-off-by: Laura Garcia Liebana <nevola@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Laura Garcia Liebana
Greg Kroah-Hartman
parent
c3397c1b06
commit
3a694d0c29
@ -170,7 +170,7 @@ static void xls_gmac_init(void)
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xlr_net_dev0.num_resources = 2;
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xlr_resource_init(&xlr_net0_res[0], xlr_gmac_offsets[0],
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xlr_gmac_irqs[0]);
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xlr_gmac_irqs[0]);
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platform_device_register(&xlr_net_dev0);
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/* second block is XAUI, not supported yet */
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@ -183,7 +183,7 @@ static void xls_gmac_init(void)
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ndata0.phy_addr[mac] = mac + 0x10;
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xlr_resource_init(&xlr_net0_res[mac * 2],
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xlr_gmac_offsets[mac],
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xlr_gmac_offsets[mac],
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xlr_gmac_irqs[mac]);
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}
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xlr_net_dev0.num_resources = 8;
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@ -223,7 +223,7 @@ static void xlr_gmac_init(void)
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ndata0.tx_stnid[mac] = FMN_STNID_GMAC0_TX0 + mac;
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ndata0.phy_addr[mac] = mac;
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xlr_resource_init(&xlr_net0_res[mac * 2], xlr_gmac_offsets[mac],
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xlr_gmac_irqs[mac]);
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xlr_gmac_irqs[mac]);
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}
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xlr_net_dev0.num_resources = 8;
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xlr_net_dev0.resource = xlr_net0_res;
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@ -69,8 +69,7 @@ static inline u32 xlr_nae_rdreg(u32 __iomem *base, unsigned int reg)
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return __raw_readl(base + reg);
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}
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static inline void xlr_reg_update(u32 *base_addr,
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u32 off, u32 val, u32 mask)
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static inline void xlr_reg_update(u32 *base_addr, u32 off, u32 val, u32 mask)
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{
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u32 tmp;
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@ -122,8 +121,8 @@ static inline unsigned char *xlr_alloc_skb(void)
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return skb->data;
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}
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static void xlr_net_fmn_handler(int bkt, int src_stnid, int size,
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int code, struct nlm_fmn_msg *msg, void *arg)
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static void xlr_net_fmn_handler(int bkt, int src_stnid, int size, int code,
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struct nlm_fmn_msg *msg, void *arg)
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{
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struct sk_buff *skb;
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void *skb_data = NULL;
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@ -252,7 +251,7 @@ static int xlr_net_stop(struct net_device *ndev)
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}
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static void xlr_make_tx_desc(struct nlm_fmn_msg *msg, unsigned long addr,
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struct sk_buff *skb)
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struct sk_buff *skb)
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{
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unsigned long physkb = virt_to_phys(skb);
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int cpu_core = nlm_core_id();
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@ -280,7 +279,7 @@ static void __maybe_unused xlr_wakeup_queue(unsigned long dev)
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}
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static netdev_tx_t xlr_net_start_xmit(struct sk_buff *skb,
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struct net_device *ndev)
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struct net_device *ndev)
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{
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struct nlm_fmn_msg msg;
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struct xlr_net_priv *priv = netdev_priv(ndev);
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@ -309,10 +308,10 @@ static void xlr_hw_set_mac_addr(struct net_device *ndev)
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/* set mac station address */
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xlr_nae_wreg(priv->base_addr, R_MAC_ADDR0,
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((ndev->dev_addr[5] << 24) | (ndev->dev_addr[4] << 16) |
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(ndev->dev_addr[3] << 8) | (ndev->dev_addr[2])));
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((ndev->dev_addr[5] << 24) | (ndev->dev_addr[4] << 16) |
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(ndev->dev_addr[3] << 8) | (ndev->dev_addr[2])));
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xlr_nae_wreg(priv->base_addr, R_MAC_ADDR0 + 1,
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((ndev->dev_addr[1] << 24) | (ndev->dev_addr[0] << 16)));
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((ndev->dev_addr[1] << 24) | (ndev->dev_addr[0] << 16)));
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xlr_nae_wreg(priv->base_addr, R_MAC_ADDR_MASK2, 0xffffffff);
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xlr_nae_wreg(priv->base_addr, R_MAC_ADDR_MASK2 + 1, 0xffffffff);
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@ -320,13 +319,13 @@ static void xlr_hw_set_mac_addr(struct net_device *ndev)
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xlr_nae_wreg(priv->base_addr, R_MAC_ADDR_MASK3 + 1, 0xffffffff);
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xlr_nae_wreg(priv->base_addr, R_MAC_FILTER_CONFIG,
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(1 << O_MAC_FILTER_CONFIG__BROADCAST_EN) |
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(1 << O_MAC_FILTER_CONFIG__ALL_MCAST_EN) |
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(1 << O_MAC_FILTER_CONFIG__MAC_ADDR0_VALID));
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(1 << O_MAC_FILTER_CONFIG__BROADCAST_EN) |
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(1 << O_MAC_FILTER_CONFIG__ALL_MCAST_EN) |
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(1 << O_MAC_FILTER_CONFIG__MAC_ADDR0_VALID));
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if (priv->nd->phy_interface == PHY_INTERFACE_MODE_RGMII ||
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priv->nd->phy_interface == PHY_INTERFACE_MODE_SGMII)
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xlr_reg_update(priv->base_addr, R_IPG_IFG, MAC_B2B_IPG, 0x7f);
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priv->nd->phy_interface == PHY_INTERFACE_MODE_SGMII)
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xlr_reg_update(priv->base_addr, R_IPG_IFG, MAC_B2B_IPG, 0x7f);
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}
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static int xlr_net_set_mac_addr(struct net_device *ndev, void *data)
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@ -406,7 +405,8 @@ static void xlr_stats(struct net_device *ndev, struct rtnl_link_stats64 *stats)
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}
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static struct rtnl_link_stats64 *xlr_get_stats64(struct net_device *ndev,
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struct rtnl_link_stats64 *stats)
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struct rtnl_link_stats64 *stats
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)
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{
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xlr_stats(ndev, stats);
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return stats;
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@ -426,7 +426,7 @@ static struct net_device_ops xlr_netdev_ops = {
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* Gmac init
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*/
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static void *xlr_config_spill(struct xlr_net_priv *priv, int reg_start_0,
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int reg_start_1, int reg_size, int size)
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int reg_start_1, int reg_size, int size)
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{
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void *spill;
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u32 *base;
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@ -442,7 +442,7 @@ static void *xlr_config_spill(struct xlr_net_priv *priv, int reg_start_0,
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spill = PTR_ALIGN(spill, SMP_CACHE_BYTES);
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phys_addr = virt_to_phys(spill);
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dev_dbg(&priv->ndev->dev, "Allocated spill %d bytes at %lx\n",
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size, phys_addr);
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size, phys_addr);
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xlr_nae_wreg(base, reg_start_0, (phys_addr >> 5) & 0xffffffff);
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xlr_nae_wreg(base, reg_start_1, ((u64)phys_addr >> 37) & 0x07);
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xlr_nae_wreg(base, reg_size, spill_size);
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@ -511,19 +511,19 @@ static void xlr_config_pde(struct xlr_net_priv *priv)
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xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_0, (bkt_map & 0xffffffff));
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xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_0 + 1,
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((bkt_map >> 32) & 0xffffffff));
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((bkt_map >> 32) & 0xffffffff));
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xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_1, (bkt_map & 0xffffffff));
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xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_1 + 1,
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((bkt_map >> 32) & 0xffffffff));
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((bkt_map >> 32) & 0xffffffff));
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xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_2, (bkt_map & 0xffffffff));
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xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_2 + 1,
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((bkt_map >> 32) & 0xffffffff));
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((bkt_map >> 32) & 0xffffffff));
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xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_3, (bkt_map & 0xffffffff));
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xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_3 + 1,
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((bkt_map >> 32) & 0xffffffff));
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((bkt_map >> 32) & 0xffffffff));
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}
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/*
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@ -541,8 +541,8 @@ static int xlr_config_common(struct xlr_net_priv *priv)
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/* Setting non-core MsgBktSize(0x321 - 0x325) */
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for (i = start_stn_id; i <= end_stn_id; i++) {
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xlr_nae_wreg(priv->base_addr,
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R_GMAC_RFR0_BUCKET_SIZE + i - start_stn_id,
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bucket_size[i]);
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R_GMAC_RFR0_BUCKET_SIZE + i - start_stn_id,
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bucket_size[i]);
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}
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/*
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@ -552,8 +552,8 @@ static int xlr_config_common(struct xlr_net_priv *priv)
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for (i = 0; i < 8; i++) {
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for (j = 0; j < 8; j++)
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xlr_nae_wreg(priv->base_addr,
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(R_CC_CPU0_0 + (i * 8)) + j,
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gmac->credit_config[(i * 8) + j]);
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(R_CC_CPU0_0 + (i * 8)) + j,
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gmac->credit_config[(i * 8) + j]);
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}
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xlr_nae_wreg(priv->base_addr, R_MSG_TX_THRESHOLD, 3);
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@ -567,7 +567,7 @@ static int xlr_config_common(struct xlr_net_priv *priv)
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if (err)
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return err;
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nlm_register_fmn_handler(start_stn_id, end_stn_id, xlr_net_fmn_handler,
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priv->adapter);
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priv->adapter);
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return 0;
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}
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@ -583,7 +583,7 @@ static void xlr_config_translate_table(struct xlr_net_priv *priv)
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cpu_mask = priv->nd->cpu_mask;
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pr_info("Using %s-based distribution\n",
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(use_bkt) ? "bucket" : "class");
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(use_bkt) ? "bucket" : "class");
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j = 0;
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for (i = 0; i < 32; i++) {
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if ((1 << i) & cpu_mask) {
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@ -614,7 +614,7 @@ static void xlr_config_translate_table(struct xlr_net_priv *priv)
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val = ((c1 << 23) | (b1 << 17) | (use_bkt << 16) |
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(c2 << 7) | (b2 << 1) | (use_bkt << 0));
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dev_dbg(&priv->ndev->dev, "Table[%d] b1=%d b2=%d c1=%d c2=%d\n",
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i, b1, b2, c1, c2);
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i, b1, b2, c1, c2);
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xlr_nae_wreg(priv->base_addr, R_TRANSLATETABLE + i, val);
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c1 = c2;
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}
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@ -629,16 +629,16 @@ static void xlr_config_parser(struct xlr_net_priv *priv)
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/* Use 7bit CRChash for flow classification with 127 as CRC polynomial*/
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xlr_nae_wreg(priv->base_addr, R_PARSERCONFIGREG,
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((0x7f << 8) | (1 << 1)));
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((0x7f << 8) | (1 << 1)));
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/* configure the parser : L2 Type is configured in the bootloader */
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/* extract IP: src, dest protocol */
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xlr_nae_wreg(priv->base_addr, R_L3CTABLE,
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(9 << 20) | (1 << 19) | (1 << 18) | (0x01 << 16) |
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(0x0800 << 0));
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(9 << 20) | (1 << 19) | (1 << 18) | (0x01 << 16) |
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(0x0800 << 0));
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xlr_nae_wreg(priv->base_addr, R_L3CTABLE + 1,
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(9 << 25) | (1 << 21) | (12 << 14) | (4 << 10) |
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(16 << 4) | 4);
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(9 << 25) | (1 << 21) | (12 << 14) | (4 << 10) |
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(16 << 4) | 4);
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/* Configure to extract SRC port and Dest port for TCP and UDP pkts */
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xlr_nae_wreg(priv->base_addr, R_L4CTABLE, 6);
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@ -692,11 +692,11 @@ static int xlr_phy_read(u32 *base_addr, int phy_addr, int regnum)
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/* setup the phy reg to be used */
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xlr_nae_wreg(base_addr, R_MII_MGMT_ADDRESS,
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(phy_addr << 8) | (regnum << 0));
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(phy_addr << 8) | (regnum << 0));
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/* Issue the read command */
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xlr_nae_wreg(base_addr, R_MII_MGMT_COMMAND,
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(1 << O_MII_MGMT_COMMAND__rstat));
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(1 << O_MII_MGMT_COMMAND__rstat));
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/* poll for the read cycle to complete */
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while (!timedout) {
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@ -724,7 +724,7 @@ static int xlr_mii_write(struct mii_bus *bus, int phy_addr, int regnum, u16 val)
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ret = xlr_phy_write(priv->mii_addr, phy_addr, regnum, val);
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dev_dbg(&priv->ndev->dev, "mii_write phy %d : %d <- %x [%x]\n",
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phy_addr, regnum, val, ret);
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phy_addr, regnum, val, ret);
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return ret;
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}
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@ -735,7 +735,7 @@ static int xlr_mii_read(struct mii_bus *bus, int phy_addr, int regnum)
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ret = xlr_phy_read(priv->mii_addr, phy_addr, regnum);
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dev_dbg(&priv->ndev->dev, "mii_read phy %d : %d [%x]\n",
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phy_addr, regnum, ret);
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phy_addr, regnum, ret);
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return ret;
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}
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@ -797,13 +797,16 @@ void xlr_set_gmac_speed(struct xlr_net_priv *priv)
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if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
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if (speed == SPEED_10)
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xlr_nae_wreg(priv->base_addr,
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R_INTERFACE_CONTROL, SGMII_SPEED_10);
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R_INTERFACE_CONTROL,
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SGMII_SPEED_10);
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if (speed == SPEED_100)
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xlr_nae_wreg(priv->base_addr,
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R_INTERFACE_CONTROL, SGMII_SPEED_100);
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R_INTERFACE_CONTROL,
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SGMII_SPEED_100);
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if (speed == SPEED_1000)
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xlr_nae_wreg(priv->base_addr,
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R_INTERFACE_CONTROL, SGMII_SPEED_1000);
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R_INTERFACE_CONTROL,
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SGMII_SPEED_1000);
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}
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if (speed == SPEED_10)
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xlr_nae_wreg(priv->base_addr, R_CORECONTROL, 0x2);
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@ -864,7 +867,7 @@ static int xlr_mii_probe(struct xlr_net_priv *priv)
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}
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static int xlr_setup_mdio(struct xlr_net_priv *priv,
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struct platform_device *pdev)
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struct platform_device *pdev)
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{
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int err;
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@ -877,7 +880,7 @@ static int xlr_setup_mdio(struct xlr_net_priv *priv,
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priv->mii_bus->priv = priv;
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priv->mii_bus->name = "xlr-mdio";
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snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%d",
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priv->mii_bus->name, priv->port_id);
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priv->mii_bus->name, priv->port_id);
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priv->mii_bus->read = xlr_mii_read;
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priv->mii_bus->write = xlr_mii_write;
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priv->mii_bus->parent = &pdev->dev;
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@ -910,25 +913,31 @@ static void xlr_port_enable(struct xlr_net_priv *priv)
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/* Setup MAC_CONFIG reg if (xls & rgmii) */
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if ((prid == 0x8000 || prid == 0x4000 || prid == 0xc000) &&
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priv->nd->phy_interface == PHY_INTERFACE_MODE_RGMII)
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priv->nd->phy_interface == PHY_INTERFACE_MODE_RGMII)
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xlr_reg_update(priv->base_addr, R_RX_CONTROL,
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(1 << O_RX_CONTROL__RGMII), (1 << O_RX_CONTROL__RGMII));
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(1 << O_RX_CONTROL__RGMII),
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(1 << O_RX_CONTROL__RGMII));
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/* Rx Tx enable */
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xlr_reg_update(priv->base_addr, R_MAC_CONFIG_1,
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((1 << O_MAC_CONFIG_1__rxen) | (1 << O_MAC_CONFIG_1__txen) |
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(1 << O_MAC_CONFIG_1__rxfc) | (1 << O_MAC_CONFIG_1__txfc)),
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((1 << O_MAC_CONFIG_1__rxen) | (1 << O_MAC_CONFIG_1__txen) |
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(1 << O_MAC_CONFIG_1__rxfc) | (1 << O_MAC_CONFIG_1__txfc)));
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((1 << O_MAC_CONFIG_1__rxen) |
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(1 << O_MAC_CONFIG_1__txen) |
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(1 << O_MAC_CONFIG_1__rxfc) |
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(1 << O_MAC_CONFIG_1__txfc)),
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((1 << O_MAC_CONFIG_1__rxen) |
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(1 << O_MAC_CONFIG_1__txen) |
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(1 << O_MAC_CONFIG_1__rxfc) |
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(1 << O_MAC_CONFIG_1__txfc)));
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/* Setup tx control reg */
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xlr_reg_update(priv->base_addr, R_TX_CONTROL,
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((1 << O_TX_CONTROL__TxEnable) |
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(512 << O_TX_CONTROL__TxThreshold)), 0x3fff);
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((1 << O_TX_CONTROL__TxEnable) |
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(512 << O_TX_CONTROL__TxThreshold)), 0x3fff);
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/* Setup rx control reg */
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xlr_reg_update(priv->base_addr, R_RX_CONTROL,
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1 << O_RX_CONTROL__RxEnable, 1 << O_RX_CONTROL__RxEnable);
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1 << O_RX_CONTROL__RxEnable,
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1 << O_RX_CONTROL__RxEnable);
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}
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static void xlr_port_disable(struct xlr_net_priv *priv)
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@ -936,25 +945,26 @@ static void xlr_port_disable(struct xlr_net_priv *priv)
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/* Setup MAC_CONFIG reg */
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/* Rx Tx disable*/
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xlr_reg_update(priv->base_addr, R_MAC_CONFIG_1,
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((1 << O_MAC_CONFIG_1__rxen) | (1 << O_MAC_CONFIG_1__txen) |
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(1 << O_MAC_CONFIG_1__rxfc) | (1 << O_MAC_CONFIG_1__txfc)),
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0x0);
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((1 << O_MAC_CONFIG_1__rxen) |
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(1 << O_MAC_CONFIG_1__txen) |
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(1 << O_MAC_CONFIG_1__rxfc) |
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(1 << O_MAC_CONFIG_1__txfc)), 0x0);
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/* Setup tx control reg */
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xlr_reg_update(priv->base_addr, R_TX_CONTROL,
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((1 << O_TX_CONTROL__TxEnable) |
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||||
(512 << O_TX_CONTROL__TxThreshold)), 0);
|
||||
((1 << O_TX_CONTROL__TxEnable) |
|
||||
(512 << O_TX_CONTROL__TxThreshold)), 0);
|
||||
|
||||
/* Setup rx control reg */
|
||||
xlr_reg_update(priv->base_addr, R_RX_CONTROL,
|
||||
1 << O_RX_CONTROL__RxEnable, 0);
|
||||
1 << O_RX_CONTROL__RxEnable, 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialization of gmac
|
||||
*/
|
||||
static int xlr_gmac_init(struct xlr_net_priv *priv,
|
||||
struct platform_device *pdev)
|
||||
struct platform_device *pdev)
|
||||
{
|
||||
int ret;
|
||||
|
||||
@ -963,9 +973,9 @@ static int xlr_gmac_init(struct xlr_net_priv *priv,
|
||||
xlr_port_disable(priv);
|
||||
|
||||
xlr_nae_wreg(priv->base_addr, R_DESC_PACK_CTRL,
|
||||
(1 << O_DESC_PACK_CTRL__MaxEntry)
|
||||
| (BYTE_OFFSET << O_DESC_PACK_CTRL__ByteOffset)
|
||||
| (1600 << O_DESC_PACK_CTRL__RegularSize));
|
||||
(1 << O_DESC_PACK_CTRL__MaxEntry) |
|
||||
(BYTE_OFFSET << O_DESC_PACK_CTRL__ByteOffset) |
|
||||
(1600 << O_DESC_PACK_CTRL__RegularSize));
|
||||
|
||||
ret = xlr_setup_mdio(priv, pdev);
|
||||
if (ret)
|
||||
@ -977,21 +987,14 @@ static int xlr_gmac_init(struct xlr_net_priv *priv,
|
||||
/* speed 2.5Mhz */
|
||||
xlr_nae_wreg(priv->base_addr, R_CORECONTROL, 0x02);
|
||||
/* Setup Interrupt mask reg */
|
||||
xlr_nae_wreg(priv->base_addr, R_INTMASK,
|
||||
(1 << O_INTMASK__TxIllegal) |
|
||||
(1 << O_INTMASK__MDInt) |
|
||||
(1 << O_INTMASK__TxFetchError) |
|
||||
(1 << O_INTMASK__P2PSpillEcc) |
|
||||
(1 << O_INTMASK__TagFull) |
|
||||
(1 << O_INTMASK__Underrun) |
|
||||
(1 << O_INTMASK__Abort)
|
||||
);
|
||||
xlr_nae_wreg(priv->base_addr, R_INTMASK, (1 << O_INTMASK__TxIllegal) |
|
||||
(1 << O_INTMASK__MDInt) | (1 << O_INTMASK__TxFetchError) |
|
||||
(1 << O_INTMASK__P2PSpillEcc) | (1 << O_INTMASK__TagFull) |
|
||||
(1 << O_INTMASK__Underrun) | (1 << O_INTMASK__Abort));
|
||||
|
||||
/* Clear all stats */
|
||||
xlr_reg_update(priv->base_addr, R_STATCTRL,
|
||||
0, 1 << O_STATCTRL__ClrCnt);
|
||||
xlr_reg_update(priv->base_addr, R_STATCTRL, 1 << 2,
|
||||
1 << 2);
|
||||
xlr_reg_update(priv->base_addr, R_STATCTRL, 0, 1 << O_STATCTRL__ClrCnt);
|
||||
xlr_reg_update(priv->base_addr, R_STATCTRL, 1 << 2, 1 << 2);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1035,7 +1038,7 @@ static int xlr_net_probe(struct platform_device *pdev)
|
||||
|
||||
if (res == NULL) {
|
||||
pr_err("No memory resource for MAC %d\n",
|
||||
priv->port_id);
|
||||
priv->port_id);
|
||||
err = -ENODEV;
|
||||
goto err_gmac;
|
||||
}
|
||||
@ -1098,7 +1101,7 @@ static int xlr_net_probe(struct platform_device *pdev)
|
||||
err = register_netdev(ndev);
|
||||
if (err) {
|
||||
pr_err("Registering netdev failed for gmac%d\n",
|
||||
priv->port_id);
|
||||
priv->port_id);
|
||||
goto err_netdev;
|
||||
}
|
||||
platform_set_drvdata(pdev, priv);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user