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arm64: dts: msm8996: Add UFS PHY reset controller

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Add the reset controller for the UFS controller, and wire it up
so that the UFS PHY can initialize itself without relying on
implicit sequencing between the two drivers.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
This commit is contained in:
Evan Green 2019-03-21 10:17:57 -07:00 committed by Andy Gross
parent a188339ca5
commit 3a2b37b09f
1 changed files with 3 additions and 1 deletions
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4
arch/arm64/boot/dts/qcom/msm8996.dtsi
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@ -854,10 +854,11 @@ ufsphy: phy@627000 {
clock-names = "ref_clk_src", "ref_clk";
clocks = <&rpmcc RPM_SMD_LN_BB_CLK>,
<&gcc GCC_UFS_CLKREF_CLK>;
resets = <&ufshc 0>;
status = "disabled";
};
ufshc@624000 {
ufshc: ufshc@624000 {
compatible = "qcom,ufshc";
reg = <0x624000 0x2500>;
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
@ -913,6 +914,7 @@ ufshc@624000 {
<0 0>;
lanes-per-direction = <1>;
#reset-cells = <1>;
status = "disabled";
ufs_variant {