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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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drm/amd/dc/dm: remove redundant display structs
Now that the mc_access functions are gone, we no longer need separate structs for all the different dce families in dm. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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4562236b3b
commit
39cc5be276
@ -1386,48 +1386,7 @@ static int amdgpu_notify_freesync(struct drm_device *dev, void *data,
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return r;
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}
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#ifdef CONFIG_DRM_AMDGPU_CIK
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static const struct amdgpu_display_funcs dm_dce_v8_0_display_funcs = {
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.bandwidth_update = dm_bandwidth_update, /* called unconditionally */
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.vblank_get_counter = dm_vblank_get_counter,/* called unconditionally */
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.vblank_wait = NULL,
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.backlight_set_level =
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dm_set_backlight_level,/* called unconditionally */
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.backlight_get_level =
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dm_get_backlight_level,/* called unconditionally */
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.hpd_sense = NULL,/* called unconditionally */
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.hpd_set_polarity = NULL, /* called unconditionally */
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.hpd_get_gpio_reg = NULL, /* VBIOS parsing. DAL does it. */
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.page_flip = dm_page_flip, /* called unconditionally */
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.page_flip_get_scanoutpos =
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dm_crtc_get_scanoutpos,/* called unconditionally */
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.add_encoder = NULL, /* VBIOS parsing. DAL does it. */
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.add_connector = NULL, /* VBIOS parsing. DAL does it. */
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.notify_freesync = amdgpu_notify_freesync,
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};
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#endif
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static const struct amdgpu_display_funcs dm_dce_v10_0_display_funcs = {
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.bandwidth_update = dm_bandwidth_update, /* called unconditionally */
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.vblank_get_counter = dm_vblank_get_counter,/* called unconditionally */
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.vblank_wait = NULL,
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.backlight_set_level =
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dm_set_backlight_level,/* called unconditionally */
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.backlight_get_level =
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dm_get_backlight_level,/* called unconditionally */
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.hpd_sense = NULL,/* called unconditionally */
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.hpd_set_polarity = NULL, /* called unconditionally */
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.hpd_get_gpio_reg = NULL, /* VBIOS parsing. DAL does it. */
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.page_flip = dm_page_flip, /* called unconditionally */
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.page_flip_get_scanoutpos =
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dm_crtc_get_scanoutpos,/* called unconditionally */
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.add_encoder = NULL, /* VBIOS parsing. DAL does it. */
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.add_connector = NULL, /* VBIOS parsing. DAL does it. */
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.notify_freesync = amdgpu_notify_freesync,
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};
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static const struct amdgpu_display_funcs dm_dce_v11_0_display_funcs = {
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static const struct amdgpu_display_funcs dm_display_funcs = {
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.bandwidth_update = dm_bandwidth_update, /* called unconditionally */
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.vblank_get_counter = dm_vblank_get_counter,/* called unconditionally */
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.vblank_wait = NULL,
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@ -1491,52 +1450,41 @@ static int dm_early_init(void *handle)
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adev->mode_info.num_crtc = 6;
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adev->mode_info.num_hpd = 6;
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adev->mode_info.num_dig = 6;
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#ifdef CONFIG_DRM_AMDGPU_CIK
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if (adev->mode_info.funcs == NULL)
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adev->mode_info.funcs = &dm_dce_v8_0_display_funcs;
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#endif
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break;
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case CHIP_FIJI:
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case CHIP_TONGA:
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adev->mode_info.num_crtc = 6;
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adev->mode_info.num_hpd = 6;
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adev->mode_info.num_dig = 7;
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if (adev->mode_info.funcs == NULL)
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adev->mode_info.funcs = &dm_dce_v10_0_display_funcs;
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break;
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case CHIP_CARRIZO:
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adev->mode_info.num_crtc = 3;
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adev->mode_info.num_hpd = 6;
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adev->mode_info.num_dig = 9;
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if (adev->mode_info.funcs == NULL)
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adev->mode_info.funcs = &dm_dce_v11_0_display_funcs;
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break;
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case CHIP_STONEY:
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adev->mode_info.num_crtc = 2;
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adev->mode_info.num_hpd = 6;
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adev->mode_info.num_dig = 9;
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if (adev->mode_info.funcs == NULL)
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adev->mode_info.funcs = &dm_dce_v11_0_display_funcs;
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break;
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case CHIP_POLARIS11:
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adev->mode_info.num_crtc = 5;
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adev->mode_info.num_hpd = 5;
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adev->mode_info.num_dig = 5;
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if (adev->mode_info.funcs == NULL)
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adev->mode_info.funcs = &dm_dce_v11_0_display_funcs;
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break;
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case CHIP_POLARIS10:
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adev->mode_info.num_crtc = 6;
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adev->mode_info.num_hpd = 6;
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adev->mode_info.num_dig = 6;
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if (adev->mode_info.funcs == NULL)
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adev->mode_info.funcs = &dm_dce_v11_0_display_funcs;
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break;
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default:
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DRM_ERROR("Usupported ASIC type: 0x%X\n", adev->asic_type);
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return -EINVAL;
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}
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if (adev->mode_info.funcs == NULL)
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adev->mode_info.funcs = &dm_display_funcs;
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/* Note: Do NOT change adev->audio_endpt_rreg and
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* adev->audio_endpt_wreg because they are initialised in
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* amdgpu_device_init() */
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