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x86/tsc: Convert to use x86_match_cpu() and INTEL_CPU_FAM6()
Move the code to use recently introduced INTEL_CPU_FAM6() macro and drop custom version of x86_match_cpu() function. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Pavel Tatashin <pasha.tatashin@oracle.com> Link: https://lkml.kernel.org/r/20180629193113.84425-3-andriy.shevchenko@linux.intel.com
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@ -8,9 +8,11 @@
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*/
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#include <linux/kernel.h>
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#include <asm/processor.h>
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#include <asm/setup.h>
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#include <asm/apic.h>
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#include <asm/cpu_device_id.h>
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#include <asm/intel-family.h>
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#include <asm/msr.h>
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#include <asm/param.h>
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#include <asm/tsc.h>
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@ -24,44 +26,43 @@
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* field msr_plat does.
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*/
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struct freq_desc {
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u8 x86_family; /* CPU family */
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u8 x86_model; /* model */
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u8 msr_plat; /* 1: use MSR_PLATFORM_INFO, 0: MSR_IA32_PERF_STATUS */
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u32 freqs[MAX_NUM_FREQS];
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};
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static struct freq_desc freq_desc_tables[] = {
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/* PNW */
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{ 6, 0x27, 0, { 0, 0, 0, 0, 0, 99840, 0, 83200 } },
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/* CLV+ */
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{ 6, 0x35, 0, { 0, 133200, 0, 0, 0, 99840, 0, 83200 } },
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/* TNG - Intel Atom processor Z3400 series */
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{ 6, 0x4a, 1, { 0, 100000, 133300, 0, 0, 0, 0, 0 } },
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/* VLV2 - Intel Atom processor E3000, Z3600, Z3700 series */
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{ 6, 0x37, 1, { 83300, 100000, 133300, 116700, 80000, 0, 0, 0 } },
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/* ANN - Intel Atom processor Z3500 series */
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{ 6, 0x5a, 1, { 83300, 100000, 133300, 100000, 0, 0, 0, 0 } },
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/* AMT - Intel Atom processor X7-Z8000 and X5-Z8000 series */
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{ 6, 0x4c, 1, { 83300, 100000, 133300, 116700,
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80000, 93300, 90000, 88900, 87500 } },
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static const struct freq_desc freq_desc_pnw = {
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0, { 0, 0, 0, 0, 0, 99840, 0, 83200 }
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};
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static int match_cpu(u8 family, u8 model)
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{
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int i;
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static const struct freq_desc freq_desc_clv = {
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0, { 0, 133200, 0, 0, 0, 99840, 0, 83200 }
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};
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for (i = 0; i < ARRAY_SIZE(freq_desc_tables); i++) {
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if ((family == freq_desc_tables[i].x86_family) &&
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(model == freq_desc_tables[i].x86_model))
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return i;
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}
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static const struct freq_desc freq_desc_byt = {
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1, { 83300, 100000, 133300, 116700, 80000, 0, 0, 0 }
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};
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return -1;
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}
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static const struct freq_desc freq_desc_cht = {
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1, { 83300, 100000, 133300, 116700, 80000, 93300, 90000, 88900, 87500 }
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};
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/* Map CPU reference clock freq ID(0-7) to CPU reference clock freq(KHz) */
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#define id_to_freq(cpu_index, freq_id) \
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(freq_desc_tables[cpu_index].freqs[freq_id])
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static const struct freq_desc freq_desc_tng = {
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1, { 0, 100000, 133300, 0, 0, 0, 0, 0 }
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};
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static const struct freq_desc freq_desc_ann = {
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1, { 83300, 100000, 133300, 100000, 0, 0, 0, 0 }
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};
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static const struct x86_cpu_id tsc_msr_cpu_ids[] = {
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INTEL_CPU_FAM6(ATOM_PENWELL, freq_desc_pnw),
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INTEL_CPU_FAM6(ATOM_CLOVERVIEW, freq_desc_clv),
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INTEL_CPU_FAM6(ATOM_SILVERMONT1, freq_desc_byt),
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INTEL_CPU_FAM6(ATOM_AIRMONT, freq_desc_cht),
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INTEL_CPU_FAM6(ATOM_MERRIFIELD, freq_desc_tng),
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INTEL_CPU_FAM6(ATOM_MOOREFIELD, freq_desc_ann),
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{}
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};
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/*
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* MSR-based CPU/TSC frequency discovery for certain CPUs.
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@ -71,18 +72,17 @@ static int match_cpu(u8 family, u8 model)
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*/
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unsigned long cpu_khz_from_msr(void)
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{
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u32 lo, hi, ratio, freq_id, freq;
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u32 lo, hi, ratio, freq;
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const struct freq_desc *freq_desc;
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const struct x86_cpu_id *id;
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unsigned long res;
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int cpu_index;
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if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
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id = x86_match_cpu(tsc_msr_cpu_ids);
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if (!id)
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return 0;
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cpu_index = match_cpu(boot_cpu_data.x86, boot_cpu_data.x86_model);
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if (cpu_index < 0)
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return 0;
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if (freq_desc_tables[cpu_index].msr_plat) {
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freq_desc = (struct freq_desc *)id->driver_data;
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if (freq_desc->msr_plat) {
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rdmsr(MSR_PLATFORM_INFO, lo, hi);
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ratio = (lo >> 8) & 0xff;
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} else {
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@ -92,8 +92,9 @@ unsigned long cpu_khz_from_msr(void)
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/* Get FSB FREQ ID */
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rdmsr(MSR_FSB_FREQ, lo, hi);
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freq_id = lo & 0x7;
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freq = id_to_freq(cpu_index, freq_id);
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/* Map CPU reference clock freq ID(0-7) to CPU reference clock freq(KHz) */
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freq = freq_desc->freqs[lo & 0x7];
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/* TSC frequency = maximum resolved freq * maximum resolved bus ratio */
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res = freq * ratio;
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