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ARM: kprobes: Decode 16-bit Thumb branch instructions
We previously changed the behaviour of probes so that conditional instructions don't fire when the condition isn't met. For ARM branches, and Thumb branches in IT blocks, this means they don't fire if the branch isn't taken. For consistency, we implement the same for Thumb conditional branch instructions. This involves setting up insn_check_cc to point to the relevant condition checking function. As the emulation routine is only called when this condition passes, it doesn't need to check again and can unconditionally update PC. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
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@ -141,6 +141,35 @@ t16_decode_it(kprobe_opcode_t insn, struct arch_specific_insn *asi)
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return INSN_GOOD_NO_SLOT;
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}
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static void __kprobes
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t16_simulate_cond_branch(struct kprobe *p, struct pt_regs *regs)
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{
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kprobe_opcode_t insn = p->opcode;
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unsigned long pc = thumb_probe_pc(p);
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long offset = insn & 0x7f;
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offset -= insn & 0x80; /* Apply sign bit */
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regs->ARM_pc = pc + (offset * 2);
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}
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static enum kprobe_insn __kprobes
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t16_decode_cond_branch(kprobe_opcode_t insn, struct arch_specific_insn *asi)
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{
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int cc = (insn >> 8) & 0xf;
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asi->insn_check_cc = kprobe_condition_checks[cc];
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asi->insn_handler = t16_simulate_cond_branch;
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return INSN_GOOD_NO_SLOT;
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}
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static void __kprobes
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t16_simulate_branch(struct kprobe *p, struct pt_regs *regs)
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{
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kprobe_opcode_t insn = p->opcode;
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unsigned long pc = thumb_probe_pc(p);
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long offset = insn & 0x3ff;
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offset -= insn & 0x400; /* Apply sign bit */
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regs->ARM_pc = pc + (offset * 2);
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}
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static unsigned long __kprobes
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t16_emulate_loregs(struct kprobe *p, struct pt_regs *regs)
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{
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@ -472,6 +501,15 @@ const union decode_item kprobe_decode_thumb16_table[] = {
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/* SVC 1101 1111 xxxx xxxx */
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DECODE_REJECT (0xfe00, 0xde00),
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/* Conditional branch 1101 xxxx xxxx xxxx */
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DECODE_CUSTOM (0xf000, 0xd000, t16_decode_cond_branch),
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/*
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* Unconditional branch
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* B 1110 0xxx xxxx xxxx
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*/
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DECODE_SIMULATE (0xf800, 0xe000, t16_simulate_branch),
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DECODE_END
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};
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